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-rw-r--r--hw/apb_pci.c4
-rw-r--r--hw/grackle_pci.c4
-rw-r--r--hw/gt64xxx.c3
-rw-r--r--hw/pci.c6
-rw-r--r--hw/pci.h6
-rw-r--r--hw/piix_pci.c5
-rw-r--r--hw/ppc4xx_pci.c4
-rw-r--r--hw/ppce500_pci.c4
-rw-r--r--hw/prep_pci.c4
-rw-r--r--hw/r2d.c4
-rw-r--r--hw/sh_pci.c4
-rw-r--r--hw/unin_pci.c4
-rw-r--r--hw/versatile_pci.c4
13 files changed, 37 insertions, 19 deletions
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index d114e555b8..f1088aa9f4 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -218,8 +218,10 @@ static int pci_pbm_map_irq(PCIDevice *pci_dev, int irq_num)
return bus_offset + irq_num;
}
-static void pci_apb_set_irq(qemu_irq *pic, int irq_num, int level)
+static void pci_apb_set_irq(void *opaque, int irq_num, int level)
{
+ qemu_irq *pic = opaque;
+
/* PCI IRQ map onto the first 32 INO. */
qemu_set_irq(pic[irq_num], level);
}
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c
index 38e2fe4869..177c88877a 100644
--- a/hw/grackle_pci.c
+++ b/hw/grackle_pci.c
@@ -102,8 +102,10 @@ static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
return (irq_num + (pci_dev->devfn >> 3)) & 3;
}
-static void pci_grackle_set_irq(qemu_irq *pic, int irq_num, int level)
+static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
{
+ qemu_irq *pic = opaque;
+
GRACKLE_DPRINTF("set_irq num %d level %d\n", irq_num, level);
qemu_set_irq(pic[irq_num + 0x15], level);
}
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index 211513081a..8f9ae4a20c 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
@@ -893,9 +893,10 @@ static int pci_gt64120_map_irq(PCIDevice *pci_dev, int irq_num)
static int pci_irq_levels[4];
-static void pci_gt64120_set_irq(qemu_irq *pic, int irq_num, int level)
+static void pci_gt64120_set_irq(void *opaque, int irq_num, int level)
{
int i, pic_irq, pic_level;
+ qemu_irq *pic = opaque;
pci_irq_levels[irq_num] = level;
diff --git a/hw/pci.c b/hw/pci.c
index a9034a74ab..c12b0beaae 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -41,7 +41,7 @@ struct PCIBus {
pci_set_irq_fn set_irq;
pci_map_irq_fn map_irq;
uint32_t config_reg; /* XXX: suppress */
- qemu_irq *irq_opaque;
+ void *irq_opaque;
PCIDevice *devices[256];
PCIDevice *parent_dev;
PCIBus *next;
@@ -100,7 +100,7 @@ static void pci_bus_reset(void *opaque)
PCIBus *pci_register_bus(DeviceState *parent, const char *name,
pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
- qemu_irq *pic, int devfn_min, int nirq)
+ void *irq_opaque, int devfn_min, int nirq)
{
PCIBus *bus;
static int nbus = 0;
@@ -108,7 +108,7 @@ PCIBus *pci_register_bus(DeviceState *parent, const char *name,
bus = FROM_QBUS(PCIBus, qbus_create(&pci_bus_info, parent, name));
bus->set_irq = set_irq;
bus->map_irq = map_irq;
- bus->irq_opaque = pic;
+ bus->irq_opaque = irq_opaque;
bus->devfn_min = devfn_min;
bus->nirq = nirq;
bus->irq_count = qemu_mallocz(nirq * sizeof(bus->irq_count[0]));
diff --git a/hw/pci.h b/hw/pci.h
index fd1d35c70d..5340bbbcb9 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -239,11 +239,11 @@ void pci_default_write_config(PCIDevice *d,
void pci_device_save(PCIDevice *s, QEMUFile *f);
int pci_device_load(PCIDevice *s, QEMUFile *f);
-typedef void (*pci_set_irq_fn)(qemu_irq *pic, int irq_num, int level);
+typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level);
typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
PCIBus *pci_register_bus(DeviceState *parent, const char *name,
pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
- qemu_irq *pic, int devfn_min, int nirq);
+ void *irq_opaque, int devfn_min, int nirq);
PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model,
const char *default_devaddr);
@@ -353,6 +353,6 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
/* sh_pci.c */
PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
- qemu_irq *pic, int devfn_min, int nirq);
+ void *pic, int devfn_min, int nirq);
#endif
diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 378b7bf8cf..1a51ec55e9 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -51,7 +51,7 @@ static uint32_t i440fx_addr_readl(void* opaque, uint32_t addr)
return s->config_reg;
}
-static void piix3_set_irq(qemu_irq *pic, int irq_num, int level);
+static void piix3_set_irq(void *opaque, int irq_num, int level);
/* return the global irq number corresponding to a given device irq
pin. We could also use the bus number to have a more precise
@@ -233,9 +233,10 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, qemu_irq *pic)
static PCIDevice *piix3_dev;
-static void piix3_set_irq(qemu_irq *pic, int irq_num, int level)
+static void piix3_set_irq(void *opaque, int irq_num, int level)
{
int i, pic_irq, pic_level;
+ qemu_irq *pic = opaque;
pci_irq_levels[irq_num] = level;
diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c
index 98877cf129..655fe86571 100644
--- a/hw/ppc4xx_pci.c
+++ b/hw/ppc4xx_pci.c
@@ -304,8 +304,10 @@ static int ppc4xx_pci_map_irq(PCIDevice *pci_dev, int irq_num)
return slot - 1;
}
-static void ppc4xx_pci_set_irq(qemu_irq *pci_irqs, int irq_num, int level)
+static void ppc4xx_pci_set_irq(void *opaque, int irq_num, int level)
{
+ qemu_irq *pci_irqs = opaque;
+
DPRINTF("%s: PCI irq %d\n", __func__, irq_num);
qemu_set_irq(pci_irqs[irq_num], level);
}
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index 6328f7392e..64fccfdbc6 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -253,8 +253,10 @@ static int mpc85xx_pci_map_irq(PCIDevice *pci_dev, int irq_num)
return ret;
}
-static void mpc85xx_pci_set_irq(qemu_irq *pic, int irq_num, int level)
+static void mpc85xx_pci_set_irq(void *opaque, int irq_num, int level)
{
+ qemu_irq *pic = opaque;
+
pci_debug("%s: PCI irq %d, level:%d\n", __func__, irq_num, level);
qemu_set_irq(pic[irq_num], level);
diff --git a/hw/prep_pci.c b/hw/prep_pci.c
index 2a1d0f9faa..2d8a0fa956 100644
--- a/hw/prep_pci.c
+++ b/hw/prep_pci.c
@@ -124,8 +124,10 @@ static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
return (irq_num + (pci_dev->devfn >> 3)) & 1;
}
-static void prep_set_irq(qemu_irq *pic, int irq_num, int level)
+static void prep_set_irq(void *opaque, int irq_num, int level)
{
+ qemu_irq *pic = opaque;
+
qemu_set_irq(pic[(irq_num & 1) ? 11 : 9] , level);
}
diff --git a/hw/r2d.c b/hw/r2d.c
index 4667a5d2fc..6ce556e801 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -183,8 +183,10 @@ static qemu_irq *r2d_fpga_init(target_phys_addr_t base, qemu_irq irl)
return qemu_allocate_irqs(r2d_fpga_irq_set, s, NR_IRQS);
}
-static void r2d_pci_set_irq(qemu_irq *p, int n, int l)
+static void r2d_pci_set_irq(void *opaque, int n, int l)
{
+ qemu_irq *p = opaque;
+
qemu_set_irq(p[n], l);
}
diff --git a/hw/sh_pci.c b/hw/sh_pci.c
index 659935fc90..ea8635dd51 100644
--- a/hw/sh_pci.c
+++ b/hw/sh_pci.c
@@ -168,14 +168,14 @@ static MemOp sh_pci_iop = {
};
PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
- qemu_irq *pic, int devfn_min, int nirq)
+ void *opaque, int devfn_min, int nirq)
{
SHPCIC *p;
int mem, reg, iop;
p = qemu_mallocz(sizeof(SHPCIC));
p->bus = pci_register_bus(NULL, "pci",
- set_irq, map_irq, pic, devfn_min, nirq);
+ set_irq, map_irq, opaque, devfn_min, nirq);
p->dev = pci_register_device(p->bus, "SH PCIC", sizeof(PCIDevice),
-1, NULL, NULL);
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index 9b5b8c84f1..e6d9a703e7 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -141,8 +141,10 @@ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
return (irq_num + (pci_dev->devfn >> 3)) & 3;
}
-static void pci_unin_set_irq(qemu_irq *pic, int irq_num, int level)
+static void pci_unin_set_irq(void *opaque, int irq_num, int level)
{
+ qemu_irq *pic = opaque;
+
qemu_set_irq(pic[irq_num + 8], level);
}
diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c
index 6f9151ce33..a0d7d07ad2 100644
--- a/hw/versatile_pci.c
+++ b/hw/versatile_pci.c
@@ -90,8 +90,10 @@ static int pci_vpb_map_irq(PCIDevice *d, int irq_num)
return irq_num;
}
-static void pci_vpb_set_irq(qemu_irq *pic, int irq_num, int level)
+static void pci_vpb_set_irq(void *opaque, int irq_num, int level)
{
+ qemu_irq *pic = opaque;
+
qemu_set_irq(pic[irq_num], level);
}
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-19 03:44:33 +0000