diff options
Diffstat (limited to 'hw')
123 files changed, 1790 insertions, 728 deletions
diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c index 23ac7bb532..f8bbac251d 100644 --- a/hw/9pfs/9p.c +++ b/hw/9pfs/9p.c @@ -3234,7 +3234,7 @@ static void coroutine_fn v9fs_xattrwalk(void *opaque) xattr_fidp->fid_type = P9_FID_XATTR; xattr_fidp->fs.xattr.xattrwalk_fid = true; if (size) { - xattr_fidp->fs.xattr.value = g_malloc(size); + xattr_fidp->fs.xattr.value = g_malloc0(size); err = v9fs_co_llistxattr(pdu, &xattr_fidp->path, xattr_fidp->fs.xattr.value, xattr_fidp->fs.xattr.len); @@ -3267,7 +3267,7 @@ static void coroutine_fn v9fs_xattrwalk(void *opaque) xattr_fidp->fid_type = P9_FID_XATTR; xattr_fidp->fs.xattr.xattrwalk_fid = true; if (size) { - xattr_fidp->fs.xattr.value = g_malloc(size); + xattr_fidp->fs.xattr.value = g_malloc0(size); err = v9fs_co_lgetxattr(pdu, &xattr_fidp->path, &name, xattr_fidp->fs.xattr.value, xattr_fidp->fs.xattr.len); diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index f4fd5907b8..a0fb1ce037 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -718,6 +718,7 @@ static const TypeInfo piix4_pm_info = { .interfaces = (InterfaceInfo[]) { { TYPE_HOTPLUG_HANDLER }, { TYPE_ACPI_DEVICE_IF }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } }; diff --git a/hw/acpi/vmgenid.c b/hw/acpi/vmgenid.c index 2876d8a639..105044f666 100644 --- a/hw/acpi/vmgenid.c +++ b/hw/acpi/vmgenid.c @@ -124,7 +124,7 @@ void vmgenid_add_fw_cfg(VmGenIdState *vms, FWCfgState *s, GArray *guid) fw_cfg_add_file(s, VMGENID_GUID_FW_CFG_FILE, guid->data, VMGENID_FW_CFG_SIZE); /* Create a read-write fw_cfg file for Address */ - fw_cfg_add_file_callback(s, VMGENID_ADDR_FW_CFG_FILE, NULL, NULL, + fw_cfg_add_file_callback(s, VMGENID_ADDR_FW_CFG_FILE, NULL, NULL, NULL, vms->vmgenid_addr_le, ARRAY_SIZE(vms->vmgenid_addr_le), false); } diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c index 959c786261..337402e9c6 100644 --- a/hw/audio/ac97.c +++ b/hw/audio/ac97.c @@ -1431,6 +1431,10 @@ static const TypeInfo ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (AC97LinkState), .class_init = ac97_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void ac97_register_types (void) diff --git a/hw/audio/es1370.c b/hw/audio/es1370.c index dd7c23d185..59cf252754 100644 --- a/hw/audio/es1370.c +++ b/hw/audio/es1370.c @@ -1082,6 +1082,10 @@ static const TypeInfo es1370_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (ES1370State), .class_init = es1370_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void es1370_register_types (void) diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index 18a50a8f83..a3e670c188 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -1263,6 +1263,10 @@ static const TypeInfo intel_hda_info = { .instance_size = sizeof(IntelHDAState), .class_init = intel_hda_class_init, .abstract = true, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static const TypeInfo intel_hda_info_ich6 = { diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 9aa32692a3..441e21ed1f 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -1110,6 +1110,10 @@ static const TypeInfo nvme_info = { .instance_size = sizeof(NvmeCtrl), .class_init = nvme_class_init, .instance_init = nvme_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void nvme_register_types(void) diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 303104dd19..cb0d04c1d9 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -250,6 +250,10 @@ static const TypeInfo serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCISerialState), .class_init = serial_pci_class_initfn, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static const TypeInfo multi_2x_serial_pci_info = { @@ -257,6 +261,10 @@ static const TypeInfo multi_2x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_2x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static const TypeInfo multi_4x_serial_pci_info = { @@ -264,6 +272,10 @@ static const TypeInfo multi_4x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_4x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void serial_pci_register_types(void) diff --git a/hw/core/loader.c b/hw/core/loader.c index 4593061445..91669d65aa 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -1023,7 +1023,7 @@ MemoryRegion *rom_add_blob(const char *name, const void *blob, size_t len, } fw_cfg_add_file_callback(fw_cfg, fw_file_name, - fw_callback, callback_opaque, + fw_callback, NULL, callback_opaque, data, rom->datasize, read_only); } return mr; diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index afc290ab91..bc32bf1e39 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -2038,15 +2038,14 @@ static void cirrus_mem_writeb_mode4and5_8bpp(CirrusVGAState * s, unsigned val = mem_value; uint8_t *dst; - dst = s->vga.vram_ptr + (offset &= s->cirrus_addr_mask); for (x = 0; x < 8; x++) { + dst = s->vga.vram_ptr + ((offset + x) & s->cirrus_addr_mask); if (val & 0x80) { *dst = s->cirrus_shadow_gr1; } else if (mode == 5) { *dst = s->cirrus_shadow_gr0; } val <<= 1; - dst++; } memory_region_set_dirty(&s->vga.vram, offset, 8); } @@ -2060,8 +2059,8 @@ static void cirrus_mem_writeb_mode4and5_16bpp(CirrusVGAState * s, unsigned val = mem_value; uint8_t *dst; - dst = s->vga.vram_ptr + (offset &= s->cirrus_addr_mask); for (x = 0; x < 8; x++) { + dst = s->vga.vram_ptr + ((offset + 2 * x) & s->cirrus_addr_mask & ~1); if (val & 0x80) { *dst = s->cirrus_shadow_gr1; *(dst + 1) = s->vga.gr[0x11]; @@ -2070,7 +2069,6 @@ static void cirrus_mem_writeb_mode4and5_16bpp(CirrusVGAState * s, *(dst + 1) = s->vga.gr[0x10]; } val <<= 1; - dst += 2; } memory_region_set_dirty(&s->vga.vram, offset, 16); } @@ -3162,6 +3160,10 @@ static const TypeInfo cirrus_vga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCICirrusVGAState), .class_init = cirrus_vga_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void cirrus_vga_register_types(void) diff --git a/hw/display/qxl.c b/hw/display/qxl.c index d92fe05f1a..99365c3e8f 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -2432,6 +2432,10 @@ static const TypeInfo qxl_pci_type_info = { .instance_size = sizeof(PCIQXLDevice), .abstract = true, .class_init = qxl_pci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void qxl_primary_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 9aa515b3da..6eddac911e 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1843,6 +1843,10 @@ static const TypeInfo sm501_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SM501PCIState), .class_init = sm501_pci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void sm501_register_types(void) diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index ac9a76499e..7adb89fcb4 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -338,6 +338,10 @@ static const TypeInfo vga_pci_type_info = { .instance_size = sizeof(PCIVGAState), .abstract = true, .class_init = vga_pci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void vga_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/vga.c b/hw/display/vga.c index ed24ef7076..1d19f6bc48 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -1464,14 +1464,14 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) { DisplaySurface *surface = qemu_console_surface(s->con); int y1, y, update, linesize, y_start, double_scan, mask, depth; - int width, height, shift_control, line_offset, bwidth, bits; - ram_addr_t page0, page1; + int width, height, shift_control, bwidth, bits; + ram_addr_t page0, page1, region_start, region_end; DirtyBitmapSnapshot *snap = NULL; int disp_width, multi_scan, multi_run; uint8_t *d; uint32_t v, addr1, addr; vga_draw_line_func *vga_draw_line = NULL; - bool share_surface; + bool share_surface, force_shadow = false; pixman_format_code_t format; #ifdef HOST_WORDS_BIGENDIAN bool byteswap = !s->big_endian_fb; @@ -1484,6 +1484,15 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) s->get_resolution(s, &width, &height); disp_width = width; + region_start = (s->start_addr * 4); + region_end = region_start + (ram_addr_t)s->line_offset * height; + if (region_end > s->vbe_size) { + /* wraps around (can happen with cirrus vbe modes) */ + region_start = 0; + region_end = s->vbe_size; + force_shadow = true; + } + shift_control = (s->gr[VGA_GFX_MODE] >> 5) & 3; double_scan = (s->cr[VGA_CRTC_MAX_SCAN] >> 7); if (shift_control != 1) { @@ -1523,7 +1532,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) format = qemu_default_pixman_format(depth, !byteswap); if (format) { share_surface = dpy_gfx_check_format(s->con, format) - && !s->force_shadow; + && !s->force_shadow && !force_shadow; } else { share_surface = false; } @@ -1614,7 +1623,6 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) s->cursor_invalidate(s); } - line_offset = s->line_offset; #if 0 printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n", width, height, v, line_offset, s->cr[9], s->cr[VGA_CRTC_MODE], @@ -1628,8 +1636,6 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) y1 = 0; if (!full_update) { - ram_addr_t region_start = addr1; - ram_addr_t region_end = addr1 + line_offset * height; vga_sync_dirty_bitmap(s); if (s->line_compare < height) { /* split screen mode */ @@ -1652,10 +1658,17 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) addr = (addr & ~0x8000) | ((y1 & 2) << 14); } update = full_update; - page0 = addr; - page1 = addr + bwidth - 1; + page0 = addr & s->vbe_size_mask; + page1 = (addr + bwidth - 1) & s->vbe_size_mask; if (full_update) { update = 1; + } else if (page1 < page0) { + /* scanline wraps from end of video memory to the start */ + assert(force_shadow); + update = memory_region_snapshot_get_dirty(&s->vram, snap, + page0, 0); + update |= memory_region_snapshot_get_dirty(&s->vram, snap, + page1, 0); } else { update = memory_region_snapshot_get_dirty(&s->vram, snap, page0, page1 - page0); @@ -1681,7 +1694,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) if (!multi_run) { mask = (s->cr[VGA_CRTC_MODE] & 3) ^ 3; if ((y1 & mask) == mask) - addr1 += line_offset; + addr1 += s->line_offset; y1++; multi_run = multi_scan; } else { diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index 4a64b41259..cdc3fed6ca 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -1350,6 +1350,10 @@ static const TypeInfo vmsvga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(struct pci_vmsvga_state_s), .class_init = vmsvga_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void vmsvga_register_types(void) diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c index ea51e09186..e47556c9d8 100644 --- a/hw/i2c/smbus_ich9.c +++ b/hw/i2c/smbus_ich9.c @@ -119,6 +119,10 @@ static const TypeInfo ich9_smb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(ICH9SMBState), .class_init = ich9_smb_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void ich9_smb_register(void) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 2af37a9129..73519ab3ac 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2911,7 +2911,7 @@ void acpi_setup(void) build_state->rsdp = g_memdup(tables.rsdp->data, rsdp_size); fw_cfg_add_file_callback(pcms->fw_cfg, ACPI_BUILD_RSDP_FILE, - acpi_build_update, build_state, + acpi_build_update, NULL, build_state, build_state->rsdp, rsdp_size, true); build_state->rsdp_mr = NULL; } else { diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 334938a280..ad8155ca4c 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1227,6 +1227,10 @@ static const TypeInfo amdviPCI = { .name = "AMDVI-PCI", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(AMDVIPCIState), + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void amdvi_iommu_memory_region_class_init(ObjectClass *klass, void *data) diff --git a/hw/i386/kvm/pci-assign.c b/hw/i386/kvm/pci-assign.c index 33e20cb3e8..d8559d8342 100644 --- a/hw/i386/kvm/pci-assign.c +++ b/hw/i386/kvm/pci-assign.c @@ -1864,6 +1864,10 @@ static const TypeInfo assign_info = { .instance_size = sizeof(AssignedDevice), .class_init = assign_class_init, .instance_init = assigned_dev_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void assign_register_types(void) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 9ff79b1fd9..f79d5cb694 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -378,8 +378,6 @@ static void pc_compat_0_13(MachineState *machine) static void pc_init_isa(MachineState *machine) { - x86_cpu_change_kvm_default("kvm-pv-eoi", NULL); - enable_compat_apic_id_mode(); pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE); } @@ -428,7 +426,6 @@ static void pc_i440fx_machine_options(MachineClass *m) { m->family = "pc_piix"; m->desc = "Standard PC (i440FX + PIIX, 1996)"; - m->hot_add_cpu = pc_hot_add_cpu; m->default_machine_opts = "firmware=bios-256k.bin"; m->default_display = "std"; } @@ -1055,6 +1052,10 @@ static TypeInfo isa_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = isa_bridge_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void pt_graphics_register_types(void) @@ -1123,7 +1124,6 @@ static void xenfv_machine_options(MachineClass *m) m->desc = "Xen Fully-virtualized PC"; m->max_cpus = HVM_MAX_VCPUS; m->default_machine_opts = "accel=xen"; - m->hot_add_cpu = pc_hot_add_cpu; } DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init, diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 6c4ec4be4e..da3ea602e1 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -295,7 +295,6 @@ static void pc_q35_machine_options(MachineClass *m) { m->family = "pc_q35"; m->desc = "Standard PC (Q35 + ICH9, 2009)"; - m->hot_add_cpu = pc_hot_add_cpu; m->units_per_default_bus = 1; m->default_machine_opts = "firmware=bios-256k.bin"; m->default_display = "std"; diff --git a/hw/i386/xen/xen_platform.c b/hw/i386/xen/xen_platform.c index 9ba7474566..056b87de0b 100644 --- a/hw/i386/xen/xen_platform.c +++ b/hw/i386/xen/xen_platform.c @@ -517,6 +517,10 @@ static const TypeInfo xen_platform_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIXenPlatformState), .class_init = xen_platform_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void xen_platform_register_types(void) diff --git a/hw/i386/xen/xen_pvdevice.c b/hw/i386/xen/xen_pvdevice.c index c093b34458..f748823658 100644 --- a/hw/i386/xen/xen_pvdevice.c +++ b/hw/i386/xen/xen_pvdevice.c @@ -127,6 +127,10 @@ static const TypeInfo xen_pv_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(XenPVDevice), .class_init = xen_pv_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void xen_pv_register_types(void) diff --git a/hw/ide/ich.c b/hw/ide/ich.c index 9472a60cab..8dd0ced6b3 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -184,6 +184,10 @@ static const TypeInfo ich_ahci_info = { .instance_size = sizeof(AHCIPCIState), .instance_init = pci_ich9_ahci_init, .class_init = ich_ahci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void ich_ahci_register_types(void) diff --git a/hw/ide/macio.c b/hw/ide/macio.c index ce194c6cec..2e043ef1ea 100644 --- a/hw/ide/macio.c +++ b/hw/ide/macio.c @@ -353,12 +353,14 @@ static const MemoryRegionOps pmac_ide_ops = { static const VMStateDescription vmstate_pmac = { .name = "ide", - .version_id = 4, + .version_id = 5, .minimum_version_id = 0, .fields = (VMStateField[]) { VMSTATE_IDE_BUS(bus, MACIOIDEState), VMSTATE_IDE_DRIVES(bus.ifs, MACIOIDEState), VMSTATE_BOOL(dma_active, MACIOIDEState), + VMSTATE_UINT32(timing_reg, MACIOIDEState), + VMSTATE_UINT32(irq_reg, MACIOIDEState), VMSTATE_END_OF_LIST() } }; diff --git a/hw/ide/pci.c b/hw/ide/pci.c index d53ff5341c..25f1d36f3a 100644 --- a/hw/ide/pci.c +++ b/hw/ide/pci.c @@ -453,6 +453,10 @@ static const TypeInfo pci_ide_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIIDEState), .abstract = true, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void pci_ide_register_types(void) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 22d5e6e6af..be46639b63 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -698,7 +698,7 @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) return ((s->num_irq - NVIC_FIRST_IRQ) / 32) - 1; case 0x380 ... 0x3bf: /* NVIC_ITNS<n> */ { - int startvec = 32 * (offset - 0x380) + NVIC_FIRST_IRQ; + int startvec = 8 * (offset - 0x380) + NVIC_FIRST_IRQ; int i; if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) { @@ -1102,7 +1102,7 @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, switch (offset) { case 0x380 ... 0x3bf: /* NVIC_ITNS<n> */ { - int startvec = 32 * (offset - 0x380) + NVIC_FIRST_IRQ; + int startvec = 8 * (offset - 0x380) + NVIC_FIRST_IRQ; int i; if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) { @@ -1447,6 +1447,7 @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, return; } cpu->env.sau.ctrl = value & 3; + break; case 0xdd4: /* SAU_TYPE */ if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) { goto bad_offset; diff --git a/hw/ipack/tpci200.c b/hw/ipack/tpci200.c index 4dfa6b33f3..da05c8589d 100644 --- a/hw/ipack/tpci200.c +++ b/hw/ipack/tpci200.c @@ -646,6 +646,10 @@ static const TypeInfo tpci200_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(TPCI200State), .class_init = tpci200_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void tpci200_register_types(void) diff --git a/hw/isa/i82378.c b/hw/isa/i82378.c index 4d29a9900c..d20ea4c2ee 100644 --- a/hw/isa/i82378.c +++ b/hw/isa/i82378.c @@ -138,6 +138,10 @@ static const TypeInfo i82378_type_info = { .instance_size = sizeof(I82378State), .instance_init = i82378_init, .class_init = i82378_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void i82378_register_types(void) diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index ac8416d42b..ec3c9f7d0b 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -402,12 +402,12 @@ void ich9_lpc_pm_init(PCIDevice *lpc_pci, bool smm_enabled) * just link them into fw_cfg here. */ fw_cfg_add_file_callback(fw_cfg, "etc/smi/requested-features", - NULL, NULL, + NULL, NULL, NULL, lpc->smi_guest_features_le, sizeof lpc->smi_guest_features_le, false); fw_cfg_add_file_callback(fw_cfg, "etc/smi/features-ok", - smi_features_ok_callback, lpc, + smi_features_ok_callback, NULL, lpc, &lpc->smi_features_ok, sizeof lpc->smi_features_ok, true); @@ -823,6 +823,7 @@ static const TypeInfo ich9_lpc_info = { .interfaces = (InterfaceInfo[]) { { TYPE_HOTPLUG_HANDLER }, { TYPE_ACPI_DEVICE_IF }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } }; diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index f811eba59d..6b8bc3faf0 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -132,6 +132,10 @@ static const TypeInfo piix4_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIX4State), .class_init = piix4_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void piix4_register_types(void) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 50dc83df77..c129985e2a 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -301,6 +301,10 @@ static const TypeInfo via_ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686AC97State), .class_init = via_ac97_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void vt82c686b_mc97_realize(PCIDevice *dev, Error **errp) @@ -341,6 +345,10 @@ static const TypeInfo via_mc97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686MC97State), .class_init = via_mc97_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; /* vt82c686 pm init */ @@ -419,6 +427,10 @@ static const TypeInfo via_pm_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686PMState), .class_init = via_pm_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static const VMStateDescription vmstate_via = { @@ -502,6 +514,10 @@ static const TypeInfo via_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT82C686BState), .class_init = via_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void vt82c686b_register_types(void) diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c index 9002c460e5..db634cbe89 100644 --- a/hw/m68k/an5206.c +++ b/hw/m68k/an5206.c @@ -66,7 +66,7 @@ static void an5206_init(MachineState *machine) if (qtest_enabled()) { return; } - fprintf(stderr, "Kernel image must be specified\n"); + error_report("Kernel image must be specified"); exit(1); } @@ -83,7 +83,7 @@ static void an5206_init(MachineState *machine) entry = KERNEL_LOAD_ADDR; } if (kernel_size < 0) { - fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename); + error_report("Could not load kernel '%s'", kernel_filename); exit(1); } diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c index b81901fdfd..bd8e993c58 100644 --- a/hw/m68k/mcf5206.c +++ b/hw/m68k/mcf5206.c @@ -6,6 +6,7 @@ * This code is licensed under the GPL */ #include "qemu/osdep.h" +#include "qemu/error-report.h" #include "qemu-common.h" #include "cpu.h" #include "hw/hw.h" @@ -137,7 +138,7 @@ static m5206_timer_state *m5206_timer_init(qemu_irq irq) m5206_timer_state *s; QEMUBH *bh; - s = (m5206_timer_state *)g_malloc0(sizeof(m5206_timer_state)); + s = g_new0(m5206_timer_state, 1); bh = qemu_bh_new(m5206_timer_trigger, s); s->timer = ptimer_init(bh, PTIMER_POLICY_DEFAULT); s->irq = irq; @@ -220,7 +221,7 @@ static void m5206_mbar_update(m5206_mbar_state *s) break; default: /* Unknown vector. */ - fprintf(stderr, "Unhandled vector for IRQ %d\n", irq); + error_report("Unhandled vector for IRQ %d", irq); vector = 0xf; break; } @@ -533,7 +534,7 @@ qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, M68kCPU *cpu) m5206_mbar_state *s; qemu_irq *pic; - s = (m5206_mbar_state *)g_malloc0(sizeof(m5206_mbar_state)); + s = g_new0(m5206_mbar_state, 1); memory_region_init_io(&s->iomem, NULL, &m5206_mbar_ops, s, "mbar", 0x00001000); diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index b9dde75106..68589c36d2 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -6,6 +6,7 @@ * This code is licensed under the GPL */ #include "qemu/osdep.h" +#include "qemu/error-report.h" #include "qapi/error.h" #include "qemu-common.h" #include "cpu.h" @@ -183,7 +184,7 @@ static void mcf5208_sys_init(MemoryRegion *address_space, qemu_irq *pic) memory_region_add_subregion(address_space, 0xfc0a8000, iomem); /* Timers. */ for (i = 0; i < 2; i++) { - s = (m5208_timer_state *)g_malloc0(sizeof(m5208_timer_state)); + s = g_new0(m5208_timer_state, 1); bh = qemu_bh_new(m5208_timer_trigger, s); s->timer = ptimer_init(bh, PTIMER_POLICY_DEFAULT); memory_region_init_io(&s->iomem, NULL, &m5208_timer_ops, s, @@ -257,7 +258,7 @@ static void mcf5208evb_init(MachineState *machine) mcf5208_sys_init(address_space_mem, pic); if (nb_nics > 1) { - fprintf(stderr, "Too many NICs\n"); + error_report("Too many NICs"); exit(1); } if (nd_table[0].used) { @@ -292,7 +293,7 @@ static void mcf5208evb_init(MachineState *machine) if (qtest_enabled()) { return; } - fprintf(stderr, "Kernel image must be specified\n"); + error_report("Kernel image must be specified"); exit(1); } @@ -309,7 +310,7 @@ static void mcf5208evb_init(MachineState *machine) entry = 0x40000000; } if (kernel_size < 0) { - fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename); + error_report("Could not load kernel '%s'", kernel_filename); exit(1); } diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index e8b2eef688..5a9dad9aae 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1232,6 +1232,10 @@ static const TypeInfo gt64120_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = gt64120_pci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void gt64120_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index e8f0a02f35..19202d90cf 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -9,6 +9,7 @@ common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o common-obj-$(CONFIG_EDU) += edu.o common-obj-y += unimp.o +common-obj-y += vmcoreinfo.o obj-$(CONFIG_VMPORT) += vmport.o diff --git a/hw/misc/edu.c b/hw/misc/edu.c index 01acacf142..34eb05d213 100644 --- a/hw/misc/edu.c +++ b/hw/misc/edu.c @@ -408,12 +408,17 @@ static void edu_class_init(ObjectClass *class, void *data) static void pci_edu_register_types(void) { + static InterfaceInfo interfaces[] = { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }; static const TypeInfo edu_info = { .name = "edu", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(EduState), .instance_init = edu_instance_init, .class_init = edu_class_init, + .interfaces = interfaces, }; type_register_static(&edu_info); diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c index b3ef3ec1e3..a5a46827fe 100644 --- a/hw/misc/ivshmem.c +++ b/hw/misc/ivshmem.c @@ -1010,6 +1010,10 @@ static const TypeInfo ivshmem_common_info = { .instance_size = sizeof(IVShmemState), .abstract = true, .class_init = ivshmem_common_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static const VMStateDescription ivshmem_plain_vmsd = { diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 9aa7e7559b..44f91d1e7f 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -426,6 +426,10 @@ static const TypeInfo macio_type_info = { .instance_init = macio_instance_init, .abstract = true, .class_init = macio_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void macio_register_types(void) diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c index 7d5990213e..32041f535f 100644 --- a/hw/misc/pci-testdev.c +++ b/hw/misc/pci-testdev.c @@ -326,6 +326,10 @@ static const TypeInfo pci_testdev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCITestDevState), .class_init = pci_testdev_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void pci_testdev_register_types(void) diff --git a/hw/misc/vmcoreinfo.c b/hw/misc/vmcoreinfo.c new file mode 100644 index 0000000000..a618e12677 --- /dev/null +++ b/hw/misc/vmcoreinfo.c @@ -0,0 +1,96 @@ +/* + * Virtual Machine coreinfo device + * + * Copyright (C) 2017 Red Hat, Inc. + * + * Authors: Marc-André Lureau <marcandre.lureau@redhat.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * + */ +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/nvram/fw_cfg.h" +#include "hw/misc/vmcoreinfo.h" + +static void fw_cfg_vmci_write(void *dev, off_t offset, size_t len) +{ + VMCoreInfoState *s = VMCOREINFO(dev); + + s->has_vmcoreinfo = offset == 0 && len == sizeof(s->vmcoreinfo) + && s->vmcoreinfo.guest_format != VMCOREINFO_FORMAT_NONE; +} + +static void vmcoreinfo_reset(void *dev) +{ + VMCoreInfoState *s = VMCOREINFO(dev); + + s->has_vmcoreinfo = false; + memset(&s->vmcoreinfo, 0, sizeof(s->vmcoreinfo)); + s->vmcoreinfo.host_format = cpu_to_le16(VMCOREINFO_FORMAT_ELF); +} + +static void vmcoreinfo_realize(DeviceState *dev, Error **errp) +{ + VMCoreInfoState *s = VMCOREINFO(dev); + FWCfgState *fw_cfg = fw_cfg_find(); + + /* Given that this function is executing, there is at least one VMCOREINFO + * device. Check if there are several. + */ + if (!vmcoreinfo_find()) { + error_setg(errp, "at most one %s device is permitted", + VMCOREINFO_DEVICE); + return; + } + + if (!fw_cfg || !fw_cfg->dma_enabled) { + error_setg(errp, "%s device requires fw_cfg with DMA", + VMCOREINFO_DEVICE); + return; + } + + fw_cfg_add_file_callback(fw_cfg, "etc/vmcoreinfo", + NULL, fw_cfg_vmci_write, s, + &s->vmcoreinfo, sizeof(s->vmcoreinfo), false); + + qemu_register_reset(vmcoreinfo_reset, dev); +} + +static const VMStateDescription vmstate_vmcoreinfo = { + .name = "vmcoreinfo", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_BOOL(has_vmcoreinfo, VMCoreInfoState), + VMSTATE_UINT16(vmcoreinfo.host_format, VMCoreInfoState), + VMSTATE_UINT16(vmcoreinfo.guest_format, VMCoreInfoState), + VMSTATE_UINT32(vmcoreinfo.size, VMCoreInfoState), + VMSTATE_UINT64(vmcoreinfo.paddr, VMCoreInfoState), + VMSTATE_END_OF_LIST() + }, +}; + +static void vmcoreinfo_device_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->vmsd = &vmstate_vmcoreinfo; + dc->realize = vmcoreinfo_realize; + dc->hotpluggable = false; +} + +static const TypeInfo vmcoreinfo_device_info = { + .name = VMCOREINFO_DEVICE, + .parent = TYPE_DEVICE, + .instance_size = sizeof(VMCoreInfoState), + .class_init = vmcoreinfo_device_class_init, +}; + +static void vmcoreinfo_register_types(void) +{ + type_register_static(&vmcoreinfo_device_info); +} + +type_init(vmcoreinfo_register_types) diff --git a/hw/net/e1000.c b/hw/net/e1000.c index cae95185a5..c0abee4f7e 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -1687,6 +1687,10 @@ static const TypeInfo e1000_base_info = { .instance_init = e1000_instance_init, .class_size = sizeof(E1000BaseClass), .abstract = true, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static const E1000Info e1000_devices[] = { diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c index 744f0f3b91..f1af279e8d 100644 --- a/hw/net/e1000e.c +++ b/hw/net/e1000e.c @@ -710,6 +710,10 @@ static const TypeInfo e1000e_info = { .instance_size = sizeof(E1000EState), .class_init = e1000e_class_init, .instance_init = e1000e_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void e1000e_register_types(void) diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c index a7b9f77519..80b8f47c4b 100644 --- a/hw/net/eepro100.c +++ b/hw/net/eepro100.c @@ -2116,6 +2116,10 @@ static void eepro100_register_types(void) type_info.class_init = eepro100_class_init; type_info.instance_size = sizeof(EEPRO100State); type_info.instance_init = eepro100_instance_init; + type_info.interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }; type_register(&type_info); } diff --git a/hw/net/ne2000.c b/hw/net/ne2000.c index 798d681e25..3938e6ddd8 100644 --- a/hw/net/ne2000.c +++ b/hw/net/ne2000.c @@ -786,6 +786,10 @@ static const TypeInfo ne2000_info = { .instance_size = sizeof(PCINE2000State), .class_init = ne2000_class_init, .instance_init = ne2000_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void ne2000_register_types(void) diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index 0acf8a4879..0ae5ca4701 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -365,6 +365,10 @@ static const TypeInfo pcnet_info = { .instance_size = sizeof(PCIPCNetState), .class_init = pcnet_class_init, .instance_init = pcnet_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void pci_pcnet_register_types(void) diff --git a/hw/net/rocker/rocker.c b/hw/net/rocker/rocker.c index 9273473d59..823a29df03 100644 --- a/hw/net/rocker/rocker.c +++ b/hw/net/rocker/rocker.c @@ -1525,6 +1525,10 @@ static const TypeInfo rocker_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(Rocker), .class_init = rocker_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void rocker_register_types(void) diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c index d6c8188ae1..a6b2a9f7a4 100644 --- a/hw/net/rtl8139.c +++ b/hw/net/rtl8139.c @@ -3444,6 +3444,10 @@ static const TypeInfo rtl8139_info = { .instance_size = sizeof(RTL8139State), .class_init = rtl8139_class_init, .instance_init = rtl8139_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void rtl8139_register_types(void) diff --git a/hw/net/sungem.c b/hw/net/sungem.c index dffa0c90f3..6aa8d1117b 100644 --- a/hw/net/sungem.c +++ b/hw/net/sungem.c @@ -1437,6 +1437,10 @@ static const TypeInfo sungem_info = { .instance_size = sizeof(SunGEMState), .class_init = sungem_class_init, .instance_init = sungem_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } }; static void sungem_register_types(void) diff --git a/hw/net/sunhme.c b/hw/net/sunhme.c index 60277adcf1..b1efa1b88d 100644 --- a/hw/net/sunhme.c +++ b/hw/net/sunhme.c @@ -968,6 +968,10 @@ static const TypeInfo sunhme_info = { .class_init = sunhme_class_init, .instance_size = sizeof(SunHMEState), .instance_init = sunhme_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } }; static void sunhme_register_types(void) diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c index b43b58be2b..8c4bae5394 100644 --- a/hw/net/vmxnet3.c +++ b/hw/net/vmxnet3.c @@ -2653,6 +2653,11 @@ static const TypeInfo vmxnet3_info = { .instance_size = sizeof(VMXNET3State), .class_init = vmxnet3_class_init, .instance_init = vmxnet3_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, }; static void vmxnet3_register_types(void) diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index e3bd626b8c..753ac0e4ea 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -56,6 +56,7 @@ struct FWCfgEntry { uint8_t *data; void *callback_opaque; FWCfgCallback select_cb; + FWCfgWriteCallback write_cb; }; #define JPG_FILE 0 @@ -370,6 +371,8 @@ static void fw_cfg_dma_transfer(FWCfgState *s) dma_memory_read(s->dma_as, dma.address, &e->data[s->cur_offset], len)) { dma.control |= FW_CFG_DMA_CTL_ERROR; + } else if (e->write_cb) { + e->write_cb(e->callback_opaque, s->cur_offset, len); } } @@ -570,6 +573,7 @@ static const VMStateDescription vmstate_fw_cfg = { static void fw_cfg_add_bytes_callback(FWCfgState *s, uint16_t key, FWCfgCallback select_cb, + FWCfgWriteCallback write_cb, void *callback_opaque, void *data, size_t len, bool read_only) @@ -584,6 +588,7 @@ static void fw_cfg_add_bytes_callback(FWCfgState *s, uint16_t key, s->entries[arch][key].data = data; s->entries[arch][key].len = (uint32_t)len; s->entries[arch][key].select_cb = select_cb; + s->entries[arch][key].write_cb = write_cb; s->entries[arch][key].callback_opaque = callback_opaque; s->entries[arch][key].allow_write = !read_only; } @@ -610,7 +615,7 @@ static void *fw_cfg_modify_bytes_read(FWCfgState *s, uint16_t key, void fw_cfg_add_bytes(FWCfgState *s, uint16_t key, void *data, size_t len) { - fw_cfg_add_bytes_callback(s, key, NULL, NULL, data, len, true); + fw_cfg_add_bytes_callback(s, key, NULL, NULL, NULL, data, len, true); } void fw_cfg_add_string(FWCfgState *s, uint16_t key, const char *value) @@ -737,6 +742,7 @@ static int get_fw_cfg_order(FWCfgState *s, const char *name) void fw_cfg_add_file_callback(FWCfgState *s, const char *filename, FWCfgCallback select_cb, + FWCfgWriteCallback write_cb, void *callback_opaque, void *data, size_t len, bool read_only) { @@ -800,7 +806,7 @@ void fw_cfg_add_file_callback(FWCfgState *s, const char *filename, } fw_cfg_add_bytes_callback(s, FW_CFG_FILE_FIRST + index, - select_cb, + select_cb, write_cb, callback_opaque, data, len, read_only); @@ -815,7 +821,7 @@ void fw_cfg_add_file_callback(FWCfgState *s, const char *filename, void fw_cfg_add_file(FWCfgState *s, const char *filename, void *data, size_t len) { - fw_cfg_add_file_callback(s, filename, NULL, NULL, data, len, true); + fw_cfg_add_file_callback(s, filename, NULL, NULL, NULL, data, len, true); } void *fw_cfg_modify_file(FWCfgState *s, const char *filename, @@ -838,7 +844,7 @@ void *fw_cfg_modify_file(FWCfgState *s, const char *filename, } } /* add new one */ - fw_cfg_add_file_callback(s, filename, NULL, NULL, data, len, true); + fw_cfg_add_file_callback(s, filename, NULL, NULL, NULL, data, len, true); return NULL; } diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c index eb275e1a25..84492d5e5f 100644 --- a/hw/pci-bridge/dec.c +++ b/hw/pci-bridge/dec.c @@ -79,6 +79,10 @@ static const TypeInfo dec_21154_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(PCIBridge), .class_init = dec_21154_pci_bridge_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn) @@ -138,6 +142,10 @@ static const TypeInfo dec_21154_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = dec_21154_pci_host_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c index ed03ffc764..ad4e6aa7ff 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -85,6 +85,13 @@ static void gen_rp_realize(DeviceState *dev, Error **errp) rpc->parent_class.exit(d); return; } + + if (!grp->io_reserve) { + pci_word_test_and_clear_mask(d->wmask + PCI_COMMAND, + PCI_COMMAND_IO); + d->wmask[PCI_IO_BASE] = 0; + d->wmask[PCI_IO_LIMIT] = 0; + } } static const VMStateDescription vmstate_rp_dev = { diff --git a/hw/pci-bridge/i82801b11.c b/hw/pci-bridge/i82801b11.c index 2c1b747b4b..cb522bf30c 100644 --- a/hw/pci-bridge/i82801b11.c +++ b/hw/pci-bridge/i82801b11.c @@ -106,6 +106,10 @@ static const TypeInfo i82801b11_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(I82801b11Bridge), .class_init = i82801b11_bridge_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void d2pbr_register(void) diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c index da4e5bdf04..5f56a2feb6 100644 --- a/hw/pci-bridge/ioh3420.c +++ b/hw/pci-bridge/ioh3420.c @@ -64,15 +64,13 @@ static uint8_t ioh3420_aer_vector(const PCIDevice *d) static int ioh3420_interrupts_init(PCIDevice *d, Error **errp) { int rc; - Error *local_err = NULL; rc = msi_init(d, IOH_EP_MSI_OFFSET, IOH_EP_MSI_NR_VECTOR, IOH_EP_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_64BIT, IOH_EP_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_MASKBIT, - &local_err); + errp); if (rc < 0) { assert(rc == -ENOTSUP); - error_propagate(errp, local_err); } return rc; diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index 4373f1d3e2..d56f6638c2 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -238,6 +238,7 @@ static const TypeInfo pci_bridge_dev_info = { .instance_finalize = pci_bridge_dev_instance_finalize, .interfaces = (InterfaceInfo[]) { { TYPE_HOTPLUG_HANDLER }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } }; diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index ff59abf208..8c8ac737ad 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -316,6 +316,10 @@ static const TypeInfo pxb_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_dev_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp) @@ -350,6 +354,10 @@ static const TypeInfo pxb_pcie_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_pcie_dev_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void pxb_register_types(void) diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c index 9aa5cc3e45..a4d827c99d 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -65,10 +65,18 @@ static void pcie_pci_bridge_realize(PCIDevice *d, Error **errp) goto aer_error; } + Error *local_err = NULL; if (pcie_br->msi != ON_OFF_AUTO_OFF) { - rc = msi_init(d, 0, 1, true, true, errp); + rc = msi_init(d, 0, 1, true, true, &local_err); if (rc < 0) { - goto msi_error; + assert(rc == -ENOTSUP); + if (pcie_br->msi != ON_OFF_AUTO_ON) { + error_free(local_err); + } else { + /* failed to satisfy user's explicit request for MSI */ + error_propagate(errp, local_err); + goto msi_error; + } } } pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | @@ -81,7 +89,7 @@ aer_error: pm_error: pcie_cap_exit(d); cap_error: - shpc_free(d); + shpc_cleanup(d, &pcie_br->shpc_bar); error: pci_bridge_exitfn(d); } @@ -98,7 +106,9 @@ static void pcie_pci_bridge_reset(DeviceState *qdev) { PCIDevice *d = PCI_DEVICE(qdev); pci_bridge_reset(qdev); - msi_reset(d); + if (msi_present(d)) { + msi_reset(d); + } shpc_reset(d); } @@ -106,12 +116,14 @@ static void pcie_pci_bridge_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len) { pci_bridge_write_config(d, address, val, len); - msi_write_config(d, address, val, len); + if (msi_present(d)) { + msi_write_config(d, address, val, len); + } shpc_cap_write_config(d, address, val, len); } static Property pcie_pci_bridge_dev_properties[] = { - DEFINE_PROP_ON_OFF_AUTO("msi", PCIEPCIBridge, msi, ON_OFF_AUTO_ON), + DEFINE_PROP_ON_OFF_AUTO("msi", PCIEPCIBridge, msi, ON_OFF_AUTO_AUTO), DEFINE_PROP_END_OF_LIST(), }; @@ -180,6 +192,7 @@ static const TypeInfo pcie_pci_bridge_info = { .class_init = pcie_pci_bridge_class_init, .interfaces = (InterfaceInfo[]) { { TYPE_HOTPLUG_HANDLER }, + { INTERFACE_PCIE_DEVICE }, { }, } }; diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index 4d588cb22e..9b6e4ce512 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -161,6 +161,10 @@ static const TypeInfo rp_info = { .class_init = rp_class_init, .abstract = true, .class_size = sizeof(PCIERootPortClass), + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void rp_register_types(void) diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c index e706f36cb7..1e09d2afb7 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -94,6 +94,7 @@ static void xio3130_downstream_realize(PCIDevice *d, Error **errp) pcie_chassis_create(s->chassis); rc = pcie_chassis_add_slot(s); if (rc < 0) { + error_setg(errp, "Can't add chassis slot, error %d", rc); goto err_pcie_cap; } @@ -195,6 +196,10 @@ static const TypeInfo xio3130_downstream_info = { .name = "xio3130-downstream", .parent = TYPE_PCIE_SLOT, .class_init = xio3130_downstream_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void xio3130_downstream_register_types(void) diff --git a/hw/pci-bridge/xio3130_upstream.c b/hw/pci-bridge/xio3130_upstream.c index a052224bbf..227997ce46 100644 --- a/hw/pci-bridge/xio3130_upstream.c +++ b/hw/pci-bridge/xio3130_upstream.c @@ -166,6 +166,10 @@ static const TypeInfo xio3130_upstream_info = { .name = "x3130-upstream", .parent = TYPE_PCIE_PORT, .class_init = xio3130_upstream_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void xio3130_upstream_register_types(void) diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c index b709456b97..1edf57f600 100644 --- a/hw/pci-host/apb.c +++ b/hw/pci-host/apb.c @@ -836,6 +836,10 @@ static const TypeInfo pbm_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = pbm_pci_host_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void pbm_host_class_init(ObjectClass *klass, void *data) @@ -883,6 +887,10 @@ static const TypeInfo pbm_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .class_init = pbm_pci_bridge_class_init, .instance_size = sizeof(PBMPCIBridge), + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void pbm_iommu_memory_region_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 89133a9dd3..9f61e27edc 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -833,6 +833,10 @@ static const TypeInfo bonito_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIBonitoState), .class_init = bonito_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void bonito_pcihost_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index be25245219..4090793cf0 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -166,6 +166,10 @@ static const TypeInfo gpex_root_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(GPEXRootState), .class_init = gpex_root_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void gpex_register(void) diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index 2e281f6155..38cd279b6b 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -142,6 +142,10 @@ static const TypeInfo grackle_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = grackle_pci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void pci_grackle_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index dec345fd24..a7e2256870 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -696,6 +696,10 @@ static const TypeInfo piix3_pci_type_info = { .instance_size = sizeof(PIIX3State), .abstract = true, .class_init = pci_piix3_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void piix3_class_init(ObjectClass *klass, void *data) @@ -750,6 +754,10 @@ static const TypeInfo i440fx_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCII440FXState), .class_init = i440fx_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; /* IGD Passthrough Host Bridge. */ diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index becc0eeb76..39cd24464d 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -516,6 +516,10 @@ static const TypeInfo e500_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PPCE500PCIBridgeState), .class_init = e500_host_bridge_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static Property pcihost_properties[] = { diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 8b293ba0f1..92eed0f3e1 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -372,6 +372,10 @@ static const TypeInfo raven_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(RavenPCIState), .class_init = raven_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static Property raven_pcihost_properties[] = { diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 1ff648e80c..ddaa7d1b44 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -591,6 +591,10 @@ static const TypeInfo mch_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MCHPCIState), .class_init = mch_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void q35_register(void) diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index 6cf5e59f86..ea5c265718 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -374,6 +374,10 @@ static const TypeInfo unin_main_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_main_pci_host_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void u3_agp_pci_host_class_init(ObjectClass *klass, void *data) @@ -398,6 +402,10 @@ static const TypeInfo u3_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = u3_agp_pci_host_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void unin_agp_pci_host_class_init(ObjectClass *klass, void *data) @@ -422,6 +430,10 @@ static const TypeInfo unin_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_agp_pci_host_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void unin_internal_pci_host_class_init(ObjectClass *klass, void *data) @@ -446,6 +458,10 @@ static const TypeInfo unin_internal_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_internal_pci_host_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void pci_unin_main_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index aa1fdf75fd..6394a520fc 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -487,6 +487,10 @@ static const TypeInfo versatile_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = versatile_pci_host_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static Property pci_vpb_properties[] = { diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index 4613dda1d2..7659253090 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -317,6 +317,10 @@ static const TypeInfo xilinx_pcie_root_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(XilinxPCIERoot), .class_init = xilinx_pcie_root_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void xilinx_pcie_register(void) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 1e6fb88eba..5ed3c8dca4 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -170,6 +170,16 @@ static const TypeInfo pci_bus_info = { .class_init = pci_bus_class_init, }; +static const TypeInfo pcie_interface_info = { + .name = INTERFACE_PCIE_DEVICE, + .parent = TYPE_INTERFACE, +}; + +static const TypeInfo conventional_pci_interface_info = { + .name = INTERFACE_CONVENTIONAL_PCI_DEVICE, + .parent = TYPE_INTERFACE, +}; + static const TypeInfo pcie_bus_info = { .name = TYPE_PCIE_BUS, .parent = TYPE_PCI_BUS, @@ -2537,6 +2547,17 @@ static void pci_device_class_init(ObjectClass *klass, void *data) pc->realize = pci_default_realize; } +static void pci_device_class_base_init(ObjectClass *klass, void *data) +{ + if (!object_class_is_abstract(klass)) { + ObjectClass *conventional = + object_class_dynamic_cast(klass, INTERFACE_CONVENTIONAL_PCI_DEVICE); + ObjectClass *pcie = + object_class_dynamic_cast(klass, INTERFACE_PCIE_DEVICE); + assert(conventional || pcie); + } +} + AddressSpace *pci_device_iommu_address_space(PCIDevice *dev) { PCIBus *bus = PCI_BUS(dev->bus); @@ -2661,12 +2682,15 @@ static const TypeInfo pci_device_type_info = { .abstract = true, .class_size = sizeof(PCIDeviceClass), .class_init = pci_device_class_init, + .class_base_init = pci_device_class_base_init, }; static void pci_register_types(void) { type_register_static(&pci_bus_info); type_register_static(&pcie_bus_info); + type_register_static(&conventional_pci_interface_info); + type_register_static(&pcie_interface_info); type_register_static(&pci_device_type_info); } diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 17feae5ed8..a47d257149 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -379,7 +379,8 @@ void pci_bridge_initfn(PCIDevice *dev, const char *typename) sec_bus->address_space_mem = &br->address_space_mem; memory_region_init(&br->address_space_mem, OBJECT(br), "pci_bridge_pci", UINT64_MAX); sec_bus->address_space_io = &br->address_space_io; - memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io", 65536); + memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io", + UINT32_MAX); br->windows = pci_bridge_region_init(br); QLIST_INIT(&sec_bus->child); QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling); diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c index dcebf57ed4..553db56778 100644 --- a/hw/pci/pcie_host.c +++ b/hw/pci/pcie_host.c @@ -81,7 +81,7 @@ static uint64_t pcie_mmcfg_data_read(void *opaque, static const MemoryRegionOps pcie_mmcfg_ops = { .read = pcie_mmcfg_data_read, .write = pcie_mmcfg_data_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void pcie_host_init(Object *obj) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index db0e49ab8f..9178e70132 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -803,11 +803,6 @@ void ppce500_init(MachineState *machine, PPCE500Params *params) SysBusDevice *s; PPCE500CCSRState *ccsr; - /* Setup CPUs */ - if (machine->cpu_model == NULL) { - machine->cpu_model = "e500v2_v30"; - } - irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *)); irqs[0] = g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); for (i = 0; i < smp_cpus; i++) { @@ -815,8 +810,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params) CPUState *cs; qemu_irq *input; - cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, - machine->cpu_model)); + cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); env = &cpu->env; cs = CPU(cpu); diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c index 94b454551f..e59e80fb9e 100644 --- a/hw/ppc/e500plat.c +++ b/hw/ppc/e500plat.c @@ -64,6 +64,7 @@ static void e500plat_machine_init(MachineClass *mc) mc->init = e500plat_init; mc->max_cpus = 32; mc->has_dynamic_sysbus = true; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30"); } DEFINE_MACHINE("ppce500", e500plat_machine_init) diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 6d0ace20ca..3fa7c429d5 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -174,16 +174,8 @@ static void ppc_core99_init(MachineState *machine) linux_boot = (kernel_filename != NULL); /* init CPUs */ - if (machine->cpu_model == NULL) { -#ifdef TARGET_PPC64 - machine->cpu_model = "970fx"; -#else - machine->cpu_model = "G4"; -#endif - } for (i = 0; i < smp_cpus; i++) { - cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, - machine->cpu_model)); + cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); env = &cpu->env; /* Set time-base frequency to 100 Mhz */ @@ -520,6 +512,11 @@ static void core99_machine_class_init(ObjectClass *oc, void *data) mc->max_cpus = MAX_CPUS; mc->default_boot_order = "cd"; mc->kvm_type = core99_kvm_type; +#ifdef TARGET_PPC64 + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1"); +#else + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9"); +#endif } static const TypeInfo core99_machine_info = { diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index bc7c8b7bd7..010ea36bf2 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -108,11 +108,8 @@ static void ppc_heathrow_init(MachineState *machine) linux_boot = (kernel_filename != NULL); /* init CPUs */ - if (machine->cpu_model == NULL) - machine->cpu_model = "G3"; for (i = 0; i < smp_cpus; i++) { - cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, - machine->cpu_model)); + cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); env = &cpu->env; /* Set time-base frequency to 16.6 Mhz */ @@ -385,6 +382,7 @@ static void heathrow_class_init(ObjectClass *oc, void *data) /* TOFIX "cad" when Mac floppy is implemented */ mc->default_boot_order = "cd"; mc->kvm_type = heathrow_kvm_type; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1"); } static const TypeInfo ppc_heathrow_machine_info = { diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c index 27b8289016..1717953ec7 100644 --- a/hw/ppc/mpc8544ds.c +++ b/hw/ppc/mpc8544ds.c @@ -16,6 +16,7 @@ #include "sysemu/device_tree.h" #include "hw/ppc/openpic.h" #include "qemu/error-report.h" +#include "cpu.h" static void mpc8544ds_fixup_devtree(PPCE500Params *params, void *fdt) { @@ -55,6 +56,7 @@ static void ppce500_machine_init(MachineClass *mc) mc->desc = "mpc8544ds"; mc->init = mpc8544ds_init; mc->max_cpus = 15; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30"); } DEFINE_MACHINE("mpc8544ds", ppce500_machine_init) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index d46d91c76f..c35c439d81 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -55,6 +55,16 @@ #define KERNEL_LOAD_ADDR 0x20000000 #define INITRD_LOAD_ADDR 0x40000000 +static const char *pnv_chip_core_typename(const PnvChip *o) +{ + const char *chip_type = object_class_get_name(object_get_class(OBJECT(o))); + int len = strlen(chip_type) - strlen(PNV_CHIP_TYPE_SUFFIX); + char *s = g_strdup_printf(PNV_CORE_TYPE_NAME("%.*s"), len, chip_type); + const char *core_type = object_class_get_name(object_class_by_name(s)); + g_free(s); + return core_type; +} + /* * On Power Systems E880 (POWER8), the max cpus (threads) should be : * 4 * 4 sockets * 12 cores * 8 threads = 1536 @@ -92,8 +102,7 @@ static int get_cpus_node(void *fdt) int cpus_offset = fdt_path_offset(fdt, "/cpus"); if (cpus_offset < 0) { - cpus_offset = fdt_add_subnode(fdt, fdt_path_offset(fdt, "/"), - "cpus"); + cpus_offset = fdt_add_subnode(fdt, 0, "cpus"); if (cpus_offset) { _FDT((fdt_setprop_cell(fdt, cpus_offset, "#address-cells", 0x1))); _FDT((fdt_setprop_cell(fdt, cpus_offset, "#size-cells", 0x0))); @@ -270,8 +279,7 @@ static int pnv_chip_lpc_offset(PnvChip *chip, void *fdt) static void powernv_populate_chip(PnvChip *chip, void *fdt) { - PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip); - char *typename = pnv_core_typename(pcc->cpu_model); + const char *typename = pnv_chip_core_typename(chip); size_t typesize = object_type_get_instance_size(typename); int i; @@ -301,7 +309,6 @@ static void powernv_populate_chip(PnvChip *chip, void *fdt) powernv_populate_memory_node(fdt, chip->chip_id, chip->ram_start, chip->ram_size); } - g_free(typename); } static void powernv_populate_rtc(ISADevice *d, void *fdt, int lpc_off) @@ -607,16 +614,13 @@ static void ppc_powernv_init(MachineState *machine) } } - /* We need some cpu model to instantiate the PnvChip class */ - if (machine->cpu_model == NULL) { - machine->cpu_model = "POWER8"; - } - /* Create the processor chips */ - chip_typename = g_strdup_printf(TYPE_PNV_CHIP "-%s", machine->cpu_model); + i = strlen(machine->cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX); + chip_typename = g_strdup_printf(PNV_CHIP_TYPE_NAME("%.*s"), + i, machine->cpu_type); if (!object_class_by_name(chip_typename)) { - error_report("invalid CPU model '%s' for %s machine", - machine->cpu_model, MACHINE_GET_CLASS(machine)->name); + error_report("invalid CPU model '%.*s' for %s machine", + i, machine->cpu_type, MACHINE_GET_CLASS(machine)->name); exit(1); } @@ -716,7 +720,6 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "POWER8E"; k->chip_type = PNV_CHIP_POWER8E; k->chip_cfam_id = 0x221ef04980000000ull; /* P8 Murano DD2.1 */ k->cores_mask = POWER8E_CORE_MASK; @@ -726,19 +729,11 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data) dc->desc = "PowerNV Chip POWER8E"; } -static const TypeInfo pnv_chip_power8e_info = { - .name = TYPE_PNV_CHIP_POWER8E, - .parent = TYPE_PNV_CHIP, - .instance_size = sizeof(PnvChip), - .class_init = pnv_chip_power8e_class_init, -}; - static void pnv_chip_power8_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "POWER8"; k->chip_type = PNV_CHIP_POWER8; k->chip_cfam_id = 0x220ea04980000000ull; /* P8 Venice DD2.0 */ k->cores_mask = POWER8_CORE_MASK; @@ -748,19 +743,11 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data) dc->desc = "PowerNV Chip POWER8"; } -static const TypeInfo pnv_chip_power8_info = { - .name = TYPE_PNV_CHIP_POWER8, - .parent = TYPE_PNV_CHIP, - .instance_size = sizeof(PnvChip), - .class_init = pnv_chip_power8_class_init, -}; - static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "POWER8NVL"; k->chip_type = PNV_CHIP_POWER8NVL; k->chip_cfam_id = 0x120d304980000000ull; /* P8 Naples DD1.0 */ k->cores_mask = POWER8_CORE_MASK; @@ -770,19 +757,11 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data) dc->desc = "PowerNV Chip POWER8NVL"; } -static const TypeInfo pnv_chip_power8nvl_info = { - .name = TYPE_PNV_CHIP_POWER8NVL, - .parent = TYPE_PNV_CHIP, - .instance_size = sizeof(PnvChip), - .class_init = pnv_chip_power8nvl_class_init, -}; - static void pnv_chip_power9_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PnvChipClass *k = PNV_CHIP_CLASS(klass); - k->cpu_model = "POWER9"; k->chip_type = PNV_CHIP_POWER9; k->chip_cfam_id = 0x100d104980000000ull; /* P9 Nimbus DD1.0 */ k->cores_mask = POWER9_CORE_MASK; @@ -792,13 +771,6 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data) dc->desc = "PowerNV Chip POWER9"; } -static const TypeInfo pnv_chip_power9_info = { - .name = TYPE_PNV_CHIP_POWER9, - .parent = TYPE_PNV_CHIP, - .instance_size = sizeof(PnvChip), - .class_init = pnv_chip_power9_class_init, -}; - static void pnv_chip_core_sanitize(PnvChip *chip, Error **errp) { PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip); @@ -857,7 +829,7 @@ static void pnv_chip_init(Object *obj) static void pnv_chip_icp_realize(PnvChip *chip, Error **errp) { PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip); - char *typename = pnv_core_typename(pcc->cpu_model); + const char *typename = pnv_chip_core_typename(chip); size_t typesize = object_type_get_instance_size(typename); int i, j; char *name; @@ -882,8 +854,6 @@ static void pnv_chip_icp_realize(PnvChip *chip, Error **errp) memory_region_add_subregion(&chip->icp_mmio, pir << 12, &icp->mmio); } } - - g_free(typename); } static void pnv_chip_realize(DeviceState *dev, Error **errp) @@ -891,7 +861,7 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) PnvChip *chip = PNV_CHIP(dev); Error *error = NULL; PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip); - char *typename = pnv_core_typename(pcc->cpu_model); + const char *typename = pnv_chip_core_typename(chip); size_t typesize = object_type_get_instance_size(typename); int i, core_hwid; @@ -950,7 +920,6 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) &PNV_CORE(pnv_core)->xscom_regs); i++; } - g_free(typename); /* Create LPC controller */ object_property_set_bool(OBJECT(&chip->lpc), true, "realized", @@ -1003,15 +972,6 @@ static void pnv_chip_class_init(ObjectClass *klass, void *data) dc->desc = "PowerNV Chip"; } -static const TypeInfo pnv_chip_info = { - .name = TYPE_PNV_CHIP, - .parent = TYPE_SYS_BUS_DEVICE, - .class_init = pnv_chip_class_init, - .instance_init = pnv_chip_init, - .class_size = sizeof(PnvChipClass), - .abstract = true, -}; - static ICSState *pnv_ics_get(XICSFabric *xi, int irq) { PnvMachineState *pnv = POWERNV_MACHINE(xi); @@ -1133,6 +1093,7 @@ static void powernv_machine_class_init(ObjectClass *oc, void *data) mc->init = ppc_powernv_init; mc->reset = ppc_powernv_reset; mc->max_cpus = MAX_CPUS; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0"); mc->block_default_type = IF_IDE; /* Pnv provides a AHCI device for * storage */ mc->no_parallel = 1; @@ -1146,27 +1107,40 @@ static void powernv_machine_class_init(ObjectClass *oc, void *data) powernv_machine_class_props_init(oc); } -static const TypeInfo powernv_machine_info = { - .name = TYPE_POWERNV_MACHINE, - .parent = TYPE_MACHINE, - .instance_size = sizeof(PnvMachineState), - .instance_init = powernv_machine_initfn, - .class_init = powernv_machine_class_init, - .interfaces = (InterfaceInfo[]) { - { TYPE_XICS_FABRIC }, - { TYPE_INTERRUPT_STATS_PROVIDER }, - { }, +#define DEFINE_PNV_CHIP_TYPE(type, class_initfn) \ + { \ + .name = type, \ + .class_init = class_initfn, \ + .parent = TYPE_PNV_CHIP, \ + } + +static const TypeInfo types[] = { + { + .name = TYPE_POWERNV_MACHINE, + .parent = TYPE_MACHINE, + .instance_size = sizeof(PnvMachineState), + .instance_init = powernv_machine_initfn, + .class_init = powernv_machine_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_XICS_FABRIC }, + { TYPE_INTERRUPT_STATS_PROVIDER }, + { }, + }, + }, + { + .name = TYPE_PNV_CHIP, + .parent = TYPE_SYS_BUS_DEVICE, + .class_init = pnv_chip_class_init, + .instance_init = pnv_chip_init, + .instance_size = sizeof(PnvChip), + .class_size = sizeof(PnvChipClass), + .abstract = true, }, + DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER9, pnv_chip_power9_class_init), + DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER8, pnv_chip_power8_class_init), + DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER8E, pnv_chip_power8e_class_init), + DEFINE_PNV_CHIP_TYPE(TYPE_PNV_CHIP_POWER8NVL, + pnv_chip_power8nvl_class_init), }; -static void powernv_machine_register_types(void) -{ - type_register_static(&powernv_machine_info); - type_register_static(&pnv_chip_info); - type_register_static(&pnv_chip_power8e_info); - type_register_static(&pnv_chip_power8_info); - type_register_static(&pnv_chip_power8nvl_info); - type_register_static(&pnv_chip_power9_info); -} - -type_init(powernv_machine_register_types) +DEFINE_TYPES(types) diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 67264830db..82ff440b33 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -27,6 +27,16 @@ #include "hw/ppc/pnv_xscom.h" #include "hw/ppc/xics.h" +static const char *pnv_core_cpu_typename(PnvCore *pc) +{ + const char *core_type = object_class_get_name(object_get_class(OBJECT(pc))); + int len = strlen(core_type) - strlen(PNV_CORE_TYPE_SUFFIX); + char *s = g_strdup_printf(POWERPC_CPU_TYPE_NAME("%.*s"), len, core_type); + const char *cpu_type = object_class_get_name(object_class_by_name(s)); + g_free(s); + return cpu_type; +} + static void powernv_cpu_reset(void *opaque) { PowerPCCPU *cpu = opaque; @@ -148,8 +158,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) { PnvCore *pc = PNV_CORE(OBJECT(dev)); CPUCore *cc = CPU_CORE(OBJECT(dev)); - PnvCoreClass *pcc = PNV_CORE_GET_CLASS(OBJECT(dev)); - const char *typename = object_class_get_name(pcc->cpu_oc); + const char *typename = pnv_core_cpu_typename(pc); size_t size = object_type_get_instance_size(typename); Error *local_err = NULL; void *obj; @@ -211,46 +220,30 @@ static Property pnv_core_properties[] = { static void pnv_core_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); - PnvCoreClass *pcc = PNV_CORE_CLASS(oc); dc->realize = pnv_core_realize; dc->props = pnv_core_properties; - pcc->cpu_oc = cpu_class_by_name(TYPE_POWERPC_CPU, data); } -static const TypeInfo pnv_core_info = { - .name = TYPE_PNV_CORE, - .parent = TYPE_CPU_CORE, - .instance_size = sizeof(PnvCore), - .class_size = sizeof(PnvCoreClass), - .abstract = true, -}; - -static const char *pnv_core_models[] = { - "POWER8E", "POWER8", "POWER8NVL", "POWER9" -}; - -static void pnv_core_register_types(void) -{ - int i ; - - type_register_static(&pnv_core_info); - for (i = 0; i < ARRAY_SIZE(pnv_core_models); ++i) { - TypeInfo ti = { - .parent = TYPE_PNV_CORE, - .instance_size = sizeof(PnvCore), - .class_init = pnv_core_class_init, - .class_data = (void *) pnv_core_models[i], - }; - ti.name = pnv_core_typename(pnv_core_models[i]); - type_register(&ti); - g_free((void *)ti.name); +#define DEFINE_PNV_CORE_TYPE(cpu_model) \ + { \ + .parent = TYPE_PNV_CORE, \ + .name = PNV_CORE_TYPE_NAME(cpu_model), \ } -} -type_init(pnv_core_register_types) +static const TypeInfo pnv_core_infos[] = { + { + .name = TYPE_PNV_CORE, + .parent = TYPE_CPU_CORE, + .instance_size = sizeof(PnvCore), + .class_size = sizeof(PnvCoreClass), + .class_init = pnv_core_class_init, + .abstract = true, + }, + DEFINE_PNV_CORE_TYPE("power8e_v2.1"), + DEFINE_PNV_CORE_TYPE("power8_v2.0"), + DEFINE_PNV_CORE_TYPE("power8nvl_v1.0"), + DEFINE_PNV_CORE_TYPE("power9_v2.0"), +}; -char *pnv_core_typename(const char *model) -{ - return g_strdup_printf(TYPE_PNV_CORE "-%s", model); -} +DEFINE_TYPES(pnv_core_infos) diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c index 05da316e0b..7ec35de5ae 100644 --- a/hw/ppc/ppc.c +++ b/hw/ppc/ppc.c @@ -1359,28 +1359,3 @@ void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val) break; } } - -void ppc_cpu_parse_features(const char *cpu_model) -{ - CPUClass *cc; - ObjectClass *oc; - const char *typename; - gchar **model_pieces; - - model_pieces = g_strsplit(cpu_model, ",", 2); - if (!model_pieces[0]) { - error_report("Invalid/empty CPU model name"); - exit(1); - } - - oc = cpu_class_by_name(TYPE_POWERPC_CPU, model_pieces[0]); - if (oc == NULL) { - error_report("Unable to find CPU definition: %s", model_pieces[0]); - exit(1); - } - - typename = object_class_get_name(oc); - cc = CPU_CLASS(oc); - cc->parse_features(typename, model_pieces[1], &error_fatal); - g_strfreev(model_pieces); -} diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index 8e58065f5f..205ebcea93 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -1629,7 +1629,8 @@ CPUPPCState *ppc405cr_init(MemoryRegion *address_space_mem, qemu_irq *pic, *irqs; memset(clk_setup, 0, sizeof(clk_setup)); - cpu = ppc4xx_init("405cr", &clk_setup[PPC405CR_CPU_CLK], + cpu = ppc4xx_init(POWERPC_CPU_TYPE_NAME("405crc"), + &clk_setup[PPC405CR_CPU_CLK], &clk_setup[PPC405CR_TMR_CLK], sysclk); env = &cpu->env; /* Memory mapped devices registers */ @@ -1981,7 +1982,8 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem, memset(clk_setup, 0, sizeof(clk_setup)); /* init CPUs */ - cpu = ppc4xx_init("405ep", &clk_setup[PPC405EP_CPU_CLK], + cpu = ppc4xx_init(POWERPC_CPU_TYPE_NAME("405ep"), + &clk_setup[PPC405EP_CPU_CLK], &tlb_clk_setup, sysclk); env = &cpu->env; clk_setup[PPC405EP_CPU_CLK].cb = tlb_clk_setup.cb; diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index f92d47f28d..693c215108 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -182,11 +182,7 @@ static void bamboo_init(MachineState *machine) int success; int i; - /* Setup CPU. */ - if (machine->cpu_model == NULL) { - machine->cpu_model = "440EP"; - } - cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model)); + cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); env = &cpu->env; if (env->mmu_model != POWERPC_MMU_BOOKE) { @@ -297,6 +293,7 @@ static void bamboo_machine_init(MachineClass *mc) { mc->desc = "bamboo"; mc->init = bamboo_init; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440epb"); } DEFINE_MACHINE("bamboo", bamboo_machine_init) diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index 6d7f7857fe..2e963894fe 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -48,7 +48,7 @@ static void ppc4xx_reset(void *opaque) /*****************************************************************************/ /* Generic PowerPC 4xx processor instantiation */ -PowerPCCPU *ppc4xx_init(const char *cpu_model, +PowerPCCPU *ppc4xx_init(const char *cpu_type, clk_setup_t *cpu_clk, clk_setup_t *tb_clk, uint32_t sysclk) { @@ -56,7 +56,7 @@ PowerPCCPU *ppc4xx_init(const char *cpu_model, CPUPPCState *env; /* init CPUs */ - cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model)); + cpu = POWERPC_CPU(cpu_create(cpu_type)); env = &cpu->env; cpu_clk->cb = NULL; /* We don't care about CPU clock frequency changes */ diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c index 6953f8b9ac..4765dcecca 100644 --- a/hw/ppc/ppc4xx_pci.c +++ b/hw/ppc/ppc4xx_pci.c @@ -359,6 +359,10 @@ static const TypeInfo ppc4xx_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = ppc4xx_host_bridge_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void ppc4xx_pcihost_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 94138a4e8c..6f8accc397 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -517,11 +517,8 @@ static void ppc_prep_init(MachineState *machine) linux_boot = (kernel_filename != NULL); /* init CPUs */ - if (machine->cpu_model == NULL) - machine->cpu_model = "602"; for (i = 0; i < smp_cpus; i++) { - cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, - machine->cpu_model)); + cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); env = &cpu->env; if (env->flags & POWERPC_FLAG_RTC_CLK) { @@ -684,6 +681,7 @@ static void prep_machine_init(MachineClass *mc) mc->block_default_type = IF_IDE; mc->max_cpus = MAX_CPUS; mc->default_boot_order = "cad"; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("602"); } static int prep_set_cmos_checksum(DeviceState *dev, void *opaque) @@ -718,10 +716,7 @@ static void ibm_40p_init(MachineState *machine) char boot_device; /* init CPU */ - if (!machine->cpu_model) { - machine->cpu_model = "604"; - } - cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model)); + cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); env = &cpu->env; if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) { error_report("only 6xx bus is supported on this machine"); @@ -894,6 +889,7 @@ static void ibm_40p_machine_init(MachineClass *mc) mc->default_ram_size = 128 * M_BYTE; mc->block_default_type = IF_SCSI; mc->default_boot_order = "c"; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("604"); } DEFINE_MACHINE("40p", ibm_40p_machine_init) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index ff87f155d5..d682f013d4 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -353,8 +353,7 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr) cpus_offset = fdt_path_offset(fdt, "/cpus"); if (cpus_offset < 0) { - cpus_offset = fdt_add_subnode(fdt, fdt_path_offset(fdt, "/"), - "cpus"); + cpus_offset = fdt_add_subnode(fdt, 0, "cpus"); if (cpus_offset < 0) { return cpus_offset; } @@ -820,6 +819,13 @@ int spapr_h_cas_compose_response(sPAPRMachineState *spapr, return 1; } + if (size < sizeof(hdr) || size > FW_MAX_SIZE) { + error_report("SLOF provided an unexpected CAS buffer size " + TARGET_FMT_lu " (min: %zu, max: %u)", + size, sizeof(hdr), FW_MAX_SIZE); + exit(EXIT_FAILURE); + } + size -= sizeof(hdr); /* Create skeleton */ @@ -2123,7 +2129,7 @@ static void spapr_init_cpus(sPAPRMachineState *spapr) { MachineState *machine = MACHINE(spapr); MachineClass *mc = MACHINE_GET_CLASS(machine); - char *type = spapr_get_cpu_core_type(machine->cpu_model); + const char *type = spapr_get_cpu_core_type(machine->cpu_type); int smt = kvmppc_smt_threads(); const CPUArchIdList *possible_cpus; int boot_cores_nr = smp_cpus / smp_threads; @@ -2178,7 +2184,6 @@ static void spapr_init_cpus(sPAPRMachineState *spapr) object_property_set_bool(core, true, "realized", &error_fatal); } } - g_free(type); } static void spapr_set_vsmt_mode(sPAPRMachineState *spapr, Error **errp) @@ -2335,7 +2340,8 @@ static void ppc_spapr_init(MachineState *machine) /* Set up Interrupt Controller before we create the VCPUs */ xics_system_init(machine, XICS_IRQS_SPAPR, &error_fatal); - /* Set up containers for ibm,client-set-architecture negotiated options */ + /* Set up containers for ibm,client-architecture-support negotiated options + */ spapr->ov5 = spapr_ovec_new(); spapr->ov5_cas = spapr_ovec_new(); @@ -2362,12 +2368,6 @@ static void ppc_spapr_init(MachineState *machine) } /* init CPUs */ - if (machine->cpu_model == NULL) { - machine->cpu_model = kvm_enabled() ? "host" : smc->tcg_default_cpu; - } - - spapr_cpu_parse_features(spapr); - spapr_set_vsmt_mode(spapr, &error_fatal); spapr_init_cpus(spapr); @@ -3054,14 +3054,13 @@ void spapr_lmb_release(DeviceState *dev) return; } - spapr_pending_dimm_unplugs_remove(spapr, ds); - /* * Now that all the LMBs have been removed by the guest, call the * pc-dimm unplug handler to cleanup up the pc-dimm device. */ pc_dimm_memory_unplug(dev, &spapr->hotplug_memory, mr); object_unparent(OBJECT(dev)); + spapr_pending_dimm_unplugs_remove(spapr, ds); } static void spapr_memory_unplug_request(HotplugHandler *hotplug_dev, @@ -3090,6 +3089,19 @@ static void spapr_memory_unplug_request(HotplugHandler *hotplug_dev, goto out; } + /* + * An existing pending dimm state for this DIMM means that there is an + * unplug operation in progress, waiting for the spapr_lmb_release + * callback to complete the job (BQL can't cover that far). In this case, + * bail out to avoid detaching DRCs that were already released. + */ + if (spapr_pending_dimm_unplugs_find(spapr, dimm)) { + error_setg(&local_err, + "Memory unplug already in progress for device %s", + dev->id); + goto out; + } + spapr_pending_dimm_unplugs_add(spapr, nr_lmbs, dimm); addr = addr_start; @@ -3142,8 +3154,7 @@ void spapr_core_release(DeviceState *dev) if (smc->pre_2_10_has_unused_icps) { sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc)); - const char *typename = object_class_get_name(scc->cpu_class); - size_t size = object_type_get_instance_size(typename); + size_t size = object_type_get_instance_size(scc->cpu_type); int i; for (i = 0; i < cc->nr_threads; i++) { @@ -3239,8 +3250,7 @@ static void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev, if (smc->pre_2_10_has_unused_icps) { sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc)); - const char *typename = object_class_get_name(scc->cpu_class); - size_t size = object_type_get_instance_size(typename); + size_t size = object_type_get_instance_size(scc->cpu_type); int i; for (i = 0; i < cc->nr_threads; i++) { @@ -3260,7 +3270,7 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev); Error *local_err = NULL; CPUCore *cc = CPU_CORE(dev); - char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model); + const char *base_core_type = spapr_get_cpu_core_type(machine->cpu_type); const char *type = object_get_typename(OBJECT(dev)); CPUArchId *core_slot; int index; @@ -3306,7 +3316,6 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, numa_cpu_pre_plug(core_slot, dev, &local_err); out: - g_free(base_core_type); error_propagate(errp, local_err); } @@ -3605,7 +3614,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data) hc->unplug_request = spapr_machine_device_unplug_request; smc->dr_lmb_enabled = true; - smc->tcg_default_cpu = "POWER8"; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0"); mc->has_hotpluggable_cpus = true; smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED; fwc->get_dev_path = spapr_get_fw_dev_path; @@ -3851,7 +3860,7 @@ static void spapr_machine_2_7_class_options(MachineClass *mc) sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); spapr_machine_2_8_class_options(mc); - smc->tcg_default_cpu = "POWER7"; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power7_v2.3"); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_7); smc->phb_placement = phb_placement_2_7; } diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 3e20b1d886..3a4c174012 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -21,57 +21,6 @@ #include "sysemu/hw_accel.h" #include "qemu/error-report.h" -void spapr_cpu_parse_features(sPAPRMachineState *spapr) -{ - /* - * Backwards compatibility hack: - * - * CPUs had a "compat=" property which didn't make sense for - * anything except pseries. It was replaced by "max-cpu-compat" - * machine option. This supports old command lines like - * -cpu POWER8,compat=power7 - * By stripping the compat option and applying it to the machine - * before passing it on to the cpu level parser. - */ - gchar **inpieces; - int i, j; - gchar *compat_str = NULL; - - inpieces = g_strsplit(MACHINE(spapr)->cpu_model, ",", 0); - - /* inpieces[0] is the actual model string */ - i = 1; - j = 1; - while (inpieces[i]) { - if (g_str_has_prefix(inpieces[i], "compat=")) { - /* in case of multiple compat= options */ - g_free(compat_str); - compat_str = inpieces[i]; - } else { - j++; - } - - i++; - /* Excise compat options from list */ - inpieces[j] = inpieces[i]; - } - - if (compat_str) { - char *val = compat_str + strlen("compat="); - gchar *newprops = g_strjoinv(",", inpieces); - - object_property_set_str(OBJECT(spapr), val, "max-cpu-compat", - &error_fatal); - - ppc_cpu_parse_features(newprops); - g_free(newprops); - } else { - ppc_cpu_parse_features(MACHINE(spapr)->cpu_model); - } - - g_strfreev(inpieces); -} - static void spapr_cpu_reset(void *opaque) { PowerPCCPU *cpu = opaque; @@ -112,37 +61,26 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, * Return the sPAPR CPU core type for @model which essentially is the CPU * model specified with -cpu cmdline option. */ -char *spapr_get_cpu_core_type(const char *model) +const char *spapr_get_cpu_core_type(const char *cpu_type) { - char *core_type; - gchar **model_pieces = g_strsplit(model, ",", 2); - gchar *cpu_model = g_ascii_strdown(model_pieces[0], -1); - g_strfreev(model_pieces); - - core_type = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, cpu_model); - - /* Check whether it exists or whether we have to look up an alias name */ - if (!object_class_by_name(core_type)) { - const char *realmodel; - - g_free(core_type); - core_type = NULL; - realmodel = ppc_cpu_lookup_alias(cpu_model); - if (realmodel) { - core_type = spapr_get_cpu_core_type(realmodel); - } + int len = strlen(cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX); + char *core_type = g_strdup_printf(SPAPR_CPU_CORE_TYPE_NAME("%.*s"), + len, cpu_type); + ObjectClass *oc = object_class_by_name(core_type); + + g_free(core_type); + if (!oc) { + return NULL; } - g_free(cpu_model); - return core_type; + return object_class_get_name(oc); } static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp) { sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev)); - const char *typename = object_class_get_name(scc->cpu_class); - size_t size = object_type_get_instance_size(typename); + size_t size = object_type_get_instance_size(scc->cpu_type); CPUCore *cc = CPU_CORE(dev); int i; @@ -199,22 +137,26 @@ error: static void spapr_cpu_core_realize(DeviceState *dev, Error **errp) { - sPAPRMachineState *spapr; + /* We don't use SPAPR_MACHINE() in order to exit gracefully if the user + * tries to add a sPAPR CPU core to a non-pseries machine. + */ + sPAPRMachineState *spapr = + (sPAPRMachineState *) object_dynamic_cast(qdev_get_machine(), + TYPE_SPAPR_MACHINE); sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev)); CPUCore *cc = CPU_CORE(OBJECT(dev)); - const char *typename = object_class_get_name(scc->cpu_class); - size_t size = object_type_get_instance_size(typename); + size_t size; Error *local_err = NULL; void *obj; int i, j; - spapr = (sPAPRMachineState *) qdev_get_machine(); - if (!object_dynamic_cast((Object *) spapr, TYPE_SPAPR_MACHINE)) { - error_setg(errp, "spapr-cpu-core needs a pseries machine"); + if (!spapr) { + error_setg(errp, TYPE_SPAPR_CPU_CORE " needs a pseries machine"); return; } + size = object_type_get_instance_size(scc->cpu_type); sc->threads = g_malloc0(size * cc->nr_threads); for (i = 0; i < cc->nr_threads; i++) { char id[32]; @@ -223,7 +165,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp) obj = sc->threads + i * size; - object_initialize(obj, size, typename); + object_initialize(obj, size, scc->cpu_type); cs = CPU(obj); cpu = POWERPC_CPU(cs); cs->cpu_index = cc->core_id + i; @@ -268,42 +210,12 @@ err: error_propagate(errp, local_err); } -static const char *spapr_core_models[] = { - /* 970 */ - "970_v2.2", - - /* 970MP variants */ - "970mp_v1.0", - "970mp_v1.1", - - /* POWER5+ */ - "power5+_v2.1", - - /* POWER7 */ - "power7_v2.3", - - /* POWER7+ */ - "power7+_v2.1", - - /* POWER8 */ - "power8_v2.0", - - /* POWER8E */ - "power8e_v2.1", - - /* POWER8NVL */ - "power8nvl_v1.0", - - /* POWER9 */ - "power9_v1.0", -}; - static Property spapr_cpu_core_properties[] = { DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID), DEFINE_PROP_END_OF_LIST() }; -void spapr_cpu_core_class_init(ObjectClass *oc, void *data) +static void spapr_cpu_core_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc); @@ -311,37 +223,39 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *data) dc->realize = spapr_cpu_core_realize; dc->unrealize = spapr_cpu_core_unrealizefn; dc->props = spapr_cpu_core_properties; - scc->cpu_class = cpu_class_by_name(TYPE_POWERPC_CPU, data); - g_assert(scc->cpu_class); + scc->cpu_type = data; } -static const TypeInfo spapr_cpu_core_type_info = { - .name = TYPE_SPAPR_CPU_CORE, - .parent = TYPE_CPU_CORE, - .abstract = true, - .instance_size = sizeof(sPAPRCPUCore), - .class_size = sizeof(sPAPRCPUCoreClass), -}; - -static void spapr_cpu_core_register_types(void) -{ - int i; - - type_register_static(&spapr_cpu_core_type_info); - - for (i = 0; i < ARRAY_SIZE(spapr_core_models); i++) { - TypeInfo type_info = { - .parent = TYPE_SPAPR_CPU_CORE, - .instance_size = sizeof(sPAPRCPUCore), - .class_init = spapr_cpu_core_class_init, - .class_data = (void *) spapr_core_models[i], - }; - - type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, - spapr_core_models[i]); - type_register(&type_info); - g_free((void *)type_info.name); +#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \ + { \ + .parent = TYPE_SPAPR_CPU_CORE, \ + .class_data = (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \ + .class_init = spapr_cpu_core_class_init, \ + .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \ } -} -type_init(spapr_cpu_core_register_types) +static const TypeInfo spapr_cpu_core_type_infos[] = { + { + .name = TYPE_SPAPR_CPU_CORE, + .parent = TYPE_CPU_CORE, + .abstract = true, + .instance_size = sizeof(sPAPRCPUCore), + .class_size = sizeof(sPAPRCPUCoreClass), + }, + DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"), + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"), + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"), + DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"), + DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"), + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"), + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"), +#ifdef CONFIG_KVM + DEFINE_SPAPR_CPU_CORE_TYPE("host"), +#endif +}; + +DEFINE_TYPES(spapr_cpu_core_type_infos) diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 8d72bb7c1c..0d59d1534d 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -472,7 +472,7 @@ static target_ulong h_resize_hpt_prepare(PowerPCCPU *cpu, target_ulong flags = args[0]; int shift = args[1]; sPAPRPendingHPT *pending = spapr->pending_hpt; - uint64_t current_ram_size = MACHINE(spapr)->ram_size; + uint64_t current_ram_size; int rc; if (spapr->resize_hpt == SPAPR_RESIZE_HPT_DISABLED) { @@ -494,7 +494,7 @@ static target_ulong h_resize_hpt_prepare(PowerPCCPU *cpu, return H_PARAMETER; } - current_ram_size = pc_existing_dimms_capacity(&error_fatal); + current_ram_size = MACHINE(spapr)->ram_size + get_plugged_memory_size(); /* We only allow the guest to allocate an HPT one order above what * we'd normally give them (to stop a small guest claiming a huge diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 5049ced4e8..5a3122a9f9 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1507,7 +1507,12 @@ static void spapr_pci_unplug_request(HotplugHandler *plug_handler, static void spapr_phb_realize(DeviceState *dev, Error **errp) { - sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); + /* We don't use SPAPR_MACHINE() in order to exit gracefully if the user + * tries to add a sPAPR PHB to a non-pseries machine. + */ + sPAPRMachineState *spapr = + (sPAPRMachineState *) object_dynamic_cast(qdev_get_machine(), + TYPE_SPAPR_MACHINE); SysBusDevice *s = SYS_BUS_DEVICE(dev); sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(s); PCIHostState *phb = PCI_HOST_BRIDGE(s); @@ -1519,6 +1524,11 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp) const unsigned windows_supported = sphb->ddw_enabled ? SPAPR_PCI_DMA_MAX_WINDOWS : 1; + if (!spapr) { + error_setg(errp, TYPE_SPAPR_PCI_HOST_BRIDGE " needs a pseries machine"); + return; + } + if (sphb->index != (uint32_t)-1) { sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); Error *local_err = NULL; diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index ed9b406fd3..5ac4f76613 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -89,14 +89,14 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env, static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size, int do_init, - const char *cpu_model, + const char *cpu_type, uint32_t sysclk) { PowerPCCPU *cpu; CPUPPCState *env; qemu_irq *irqs; - cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model)); + cpu = POWERPC_CPU(cpu_create(cpu_type)); env = &cpu->env; ppc_booke_timers_init(cpu, sysclk, 0/* no flags */); @@ -211,11 +211,7 @@ static void virtex_init(MachineState *machine) int i; /* init CPUs */ - if (machine->cpu_model == NULL) { - machine->cpu_model = "440-Xilinx"; - } - - cpu = ppc440_init_xilinx(&ram_size, 1, machine->cpu_model, 400000000); + cpu = ppc440_init_xilinx(&ram_size, 1, machine->cpu_type, 400000000); env = &cpu->env; if (env->mmu_model != POWERPC_MMU_BOOKE) { @@ -307,6 +303,7 @@ static void virtex_machine_init(MachineClass *mc) { mc->desc = "Xilinx Virtex ML507 reference design"; mc->init = virtex_init; + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440-xilinx"); } DEFINE_MACHINE("virtex-ml507", virtex_machine_init) diff --git a/hw/scsi/esp-pci.c b/hw/scsi/esp-pci.c index e295d88939..419fc668ac 100644 --- a/hw/scsi/esp-pci.c +++ b/hw/scsi/esp-pci.c @@ -398,6 +398,10 @@ static const TypeInfo esp_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIESPState), .class_init = esp_pci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; typedef struct { diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c index a67ee074d9..191505df5b 100644 --- a/hw/scsi/lsi53c895a.c +++ b/hw/scsi/lsi53c895a.c @@ -2246,6 +2246,10 @@ static const TypeInfo lsi_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(LSIState), .class_init = lsi_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void lsi53c810_class_init(ObjectClass *klass, void *data) diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index 0db68aacee..d5eae6239a 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -2451,6 +2451,7 @@ typedef struct MegasasInfo { int osts; const VMStateDescription *vmsd; Property *props; + InterfaceInfo *interfaces; } MegasasInfo; static struct MegasasInfo megasas_devices[] = { @@ -2467,6 +2468,10 @@ static struct MegasasInfo megasas_devices[] = { .is_express = false, .vmsd = &vmstate_megasas_gen1, .props = megasas_properties_gen1, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, },{ .name = TYPE_MEGASAS_GEN2, .desc = "LSI MegaRAID SAS 2108", @@ -2480,6 +2485,10 @@ static struct MegasasInfo megasas_devices[] = { .is_express = true, .vmsd = &vmstate_megasas_gen2, .props = megasas_properties_gen2, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, } }; @@ -2531,6 +2540,7 @@ static void megasas_register_types(void) type_info.parent = TYPE_MEGASAS_BASE; type_info.class_data = (void *)info; type_info.class_init = megasas_class_init; + type_info.interfaces = info->interfaces; type_register(&type_info); } diff --git a/hw/scsi/mptsas.c b/hw/scsi/mptsas.c index d05fa9f549..f6db1b0103 100644 --- a/hw/scsi/mptsas.c +++ b/hw/scsi/mptsas.c @@ -1439,6 +1439,10 @@ static const TypeInfo mptsas_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MPTSASState), .class_init = mptsas1068_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void mptsas_register_types(void) diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index d8079158ac..d564e5caff 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -1302,6 +1302,8 @@ static const TypeInfo pvscsi_info = { .class_init = pvscsi_class_init, .interfaces = (InterfaceInfo[]) { { TYPE_HOTPLUG_HANDLER }, + { INTERFACE_PCIE_DEVICE }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } }; diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 6d6a791ee9..b064a087c9 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1315,6 +1315,10 @@ static const TypeInfo sdhci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SDHCIState), .class_init = sdhci_pci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static Property sdhci_sysbus_properties[] = { diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c index 38395c082b..cbb01af57f 100644 --- a/hw/sh4/sh_pci.c +++ b/hw/sh4/sh_pci.c @@ -179,6 +179,10 @@ static const TypeInfo sh_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = sh_pci_host_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void sh_pci_device_class_init(ObjectClass *klass, void *data) diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index c3280aaf38..8282651aeb 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -275,6 +275,10 @@ static const TypeInfo ebus_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(EbusState), .class_init = ebus_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; #define TYPE_OPENPROM "openprom" diff --git a/hw/tpm/Makefile.objs b/hw/tpm/Makefile.objs index 64cecc3b67..41f0b7a590 100644 --- a/hw/tpm/Makefile.objs +++ b/hw/tpm/Makefile.objs @@ -1,2 +1,3 @@ common-obj-$(CONFIG_TPM_TIS) += tpm_tis.o common-obj-$(CONFIG_TPM_PASSTHROUGH) += tpm_passthrough.o tpm_util.o +common-obj-$(CONFIG_TPM_EMULATOR) += tpm_emulator.o tpm_util.o diff --git a/hw/tpm/tpm_emulator.c b/hw/tpm/tpm_emulator.c new file mode 100644 index 0000000000..95e1e041cf --- /dev/null +++ b/hw/tpm/tpm_emulator.c @@ -0,0 +1,587 @@ +/* + * Emulator TPM driver + * + * Copyright (c) 2017 Intel Corporation + * Author: Amarnath Valluri <amarnath.valluri@intel.com> + * + * Copyright (c) 2010 - 2013 IBM Corporation + * Authors: + * Stefan Berger <stefanb@us.ibm.com> + * + * Copyright (C) 2011 IAIK, Graz University of Technology + * Author: Andreas Niederl + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/> + * + */ + +#include "qemu/osdep.h" +#include "qemu/error-report.h" +#include "qemu/sockets.h" +#include "io/channel-socket.h" +#include "sysemu/tpm_backend.h" +#include "tpm_int.h" +#include "hw/hw.h" +#include "hw/i386/pc.h" +#include "tpm_util.h" +#include "tpm_ioctl.h" +#include "migration/blocker.h" +#include "qapi/error.h" +#include "qapi/clone-visitor.h" +#include "chardev/char-fe.h" + +#include <fcntl.h> +#include <sys/types.h> +#include <sys/stat.h> +#include <stdio.h> + +#define DEBUG_TPM 0 + +#define DPRINTF(fmt, ...) do { \ + if (DEBUG_TPM) { \ + fprintf(stderr, "tpm-emulator:"fmt"\n", ## __VA_ARGS__); \ + } \ +} while (0) + +#define TYPE_TPM_EMULATOR "tpm-emulator" +#define TPM_EMULATOR(obj) \ + OBJECT_CHECK(TPMEmulator, (obj), TYPE_TPM_EMULATOR) + +#define TPM_EMULATOR_IMPLEMENTS_ALL_CAPS(S, cap) (((S)->caps & (cap)) == (cap)) + +static const TPMDriverOps tpm_emulator_driver; + +/* data structures */ +typedef struct TPMEmulator { + TPMBackend parent; + + TPMEmulatorOptions *options; + CharBackend ctrl_chr; + QIOChannel *data_ioc; + TPMVersion tpm_version; + ptm_cap caps; /* capabilities of the TPM */ + uint8_t cur_locty_number; /* last set locality */ + Error *migration_blocker; +} TPMEmulator; + + +static int tpm_emulator_ctrlcmd(CharBackend *dev, unsigned long cmd, void *msg, + size_t msg_len_in, size_t msg_len_out) +{ + uint32_t cmd_no = cpu_to_be32(cmd); + ssize_t n = sizeof(uint32_t) + msg_len_in; + uint8_t *buf = NULL; + + buf = g_alloca(n); + memcpy(buf, &cmd_no, sizeof(cmd_no)); + memcpy(buf + sizeof(cmd_no), msg, msg_len_in); + + n = qemu_chr_fe_write_all(dev, buf, n); + if (n <= 0) { + return -1; + } + + if (msg_len_out != 0) { + n = qemu_chr_fe_read_all(dev, msg, msg_len_out); + if (n <= 0) { + return -1; + } + } + + return 0; +} + +static int tpm_emulator_unix_tx_bufs(TPMEmulator *tpm_emu, + const uint8_t *in, uint32_t in_len, + uint8_t *out, uint32_t out_len, + bool *selftest_done, + Error **err) +{ + ssize_t ret; + bool is_selftest = false; + const struct tpm_resp_hdr *hdr = NULL; + + if (selftest_done) { + *selftest_done = false; + is_selftest = tpm_util_is_selftest(in, in_len); + } + + ret = qio_channel_write_all(tpm_emu->data_ioc, (char *)in, in_len, err); + if (ret != 0) { + return -1; + } + + ret = qio_channel_read_all(tpm_emu->data_ioc, (char *)out, sizeof(*hdr), + err); + if (ret != 0) { + return -1; + } + + hdr = (struct tpm_resp_hdr *)out; + out += sizeof(*hdr); + ret = qio_channel_read_all(tpm_emu->data_ioc, (char *)out, + be32_to_cpu(hdr->len) - sizeof(*hdr) , err); + if (ret != 0) { + return -1; + } + + if (is_selftest) { + *selftest_done = (be32_to_cpu(hdr->errcode) == 0); + } + + return 0; +} + +static int tpm_emulator_set_locality(TPMEmulator *tpm_emu, uint8_t locty_number) +{ + ptm_loc loc; + + DPRINTF("%s : locality: 0x%x", __func__, locty_number); + + if (tpm_emu->cur_locty_number == locty_number) { + return 0; + } + + DPRINTF("setting locality : 0x%x", locty_number); + loc.u.req.loc = locty_number; + if (tpm_emulator_ctrlcmd(&tpm_emu->ctrl_chr, CMD_SET_LOCALITY, &loc, + sizeof(loc), sizeof(loc)) < 0) { + error_report("tpm-emulator: could not set locality : %s", + strerror(errno)); + return -1; + } + + loc.u.resp.tpm_result = be32_to_cpu(loc.u.resp.tpm_result); + if (loc.u.resp.tpm_result != 0) { + error_report("tpm-emulator: TPM result for set locality : 0x%x", + loc.u.resp.tpm_result); + return -1; + } + + tpm_emu->cur_locty_number = locty_number; + + return 0; +} + +static void tpm_emulator_handle_request(TPMBackend *tb, TPMBackendCmd cmd) +{ + TPMEmulator *tpm_emu = TPM_EMULATOR(tb); + TPMLocality *locty = NULL; + bool selftest_done = false; + Error *err = NULL; + + DPRINTF("processing command type %d", cmd); + + switch (cmd) { + case TPM_BACKEND_CMD_PROCESS_CMD: + locty = tb->tpm_state->locty_data; + if (tpm_emulator_set_locality(tpm_emu, + tb->tpm_state->locty_number) < 0 || + tpm_emulator_unix_tx_bufs(tpm_emu, locty->w_buffer.buffer, + locty->w_offset, locty->r_buffer.buffer, + locty->r_buffer.size, &selftest_done, + &err) < 0) { + tpm_util_write_fatal_error_response(locty->r_buffer.buffer, + locty->r_buffer.size); + error_report_err(err); + } + + tb->recv_data_callback(tb->tpm_state, tb->tpm_state->locty_number, + selftest_done); + + break; + case TPM_BACKEND_CMD_INIT: + case TPM_BACKEND_CMD_END: + case TPM_BACKEND_CMD_TPM_RESET: + /* nothing to do */ + break; + } +} + +static int tpm_emulator_probe_caps(TPMEmulator *tpm_emu) +{ + DPRINTF("%s", __func__); + if (tpm_emulator_ctrlcmd(&tpm_emu->ctrl_chr, CMD_GET_CAPABILITY, + &tpm_emu->caps, 0, sizeof(tpm_emu->caps)) < 0) { + error_report("tpm-emulator: probing failed : %s", strerror(errno)); + return -1; + } + + tpm_emu->caps = be64_to_cpu(tpm_emu->caps); + + DPRINTF("capabilities : 0x%"PRIx64, tpm_emu->caps); + + return 0; +} + +static int tpm_emulator_check_caps(TPMEmulator *tpm_emu) +{ + ptm_cap caps = 0; + const char *tpm = NULL; + + /* check for min. required capabilities */ + switch (tpm_emu->tpm_version) { + case TPM_VERSION_1_2: + caps = PTM_CAP_INIT | PTM_CAP_SHUTDOWN | PTM_CAP_GET_TPMESTABLISHED | + PTM_CAP_SET_LOCALITY | PTM_CAP_SET_DATAFD; + tpm = "1.2"; + break; + case TPM_VERSION_2_0: + caps = PTM_CAP_INIT | PTM_CAP_SHUTDOWN | PTM_CAP_GET_TPMESTABLISHED | + PTM_CAP_SET_LOCALITY | PTM_CAP_RESET_TPMESTABLISHED | + PTM_CAP_SET_DATAFD; + tpm = "2"; + break; + case TPM_VERSION_UNSPEC: + error_report("tpm-emulator: TPM version has not been set"); + return -1; + } + + if (!TPM_EMULATOR_IMPLEMENTS_ALL_CAPS(tpm_emu, caps)) { + error_report("tpm-emulator: TPM does not implement minimum set of " + "required capabilities for TPM %s (0x%x)", tpm, (int)caps); + return -1; + } + + return 0; +} + +static int tpm_emulator_startup_tpm(TPMBackend *tb) +{ + TPMEmulator *tpm_emu = TPM_EMULATOR(tb); + ptm_init init; + ptm_res res; + + DPRINTF("%s", __func__); + if (tpm_emulator_ctrlcmd(&tpm_emu->ctrl_chr, CMD_INIT, &init, sizeof(init), + sizeof(init)) < 0) { + error_report("tpm-emulator: could not send INIT: %s", + strerror(errno)); + goto err_exit; + } + + res = be32_to_cpu(init.u.resp.tpm_result); + if (res) { + error_report("tpm-emulator: TPM result for CMD_INIT: 0x%x", res); + goto err_exit; + } + return 0; + +err_exit: + return -1; +} + +static bool tpm_emulator_get_tpm_established_flag(TPMBackend *tb) +{ + TPMEmulator *tpm_emu = TPM_EMULATOR(tb); + ptm_est est; + + DPRINTF("%s", __func__); + if (tpm_emulator_ctrlcmd(&tpm_emu->ctrl_chr, CMD_GET_TPMESTABLISHED, &est, + 0, sizeof(est)) < 0) { + error_report("tpm-emulator: Could not get the TPM established flag: %s", + strerror(errno)); + return false; + } + DPRINTF("established flag: %0x", est.u.resp.bit); + + return (est.u.resp.bit != 0); +} + +static int tpm_emulator_reset_tpm_established_flag(TPMBackend *tb, + uint8_t locty) +{ + TPMEmulator *tpm_emu = TPM_EMULATOR(tb); + ptm_reset_est reset_est; + ptm_res res; + + /* only a TPM 2.0 will support this */ + if (tpm_emu->tpm_version != TPM_VERSION_2_0) { + return 0; + } + + reset_est.u.req.loc = tpm_emu->cur_locty_number; + if (tpm_emulator_ctrlcmd(&tpm_emu->ctrl_chr, CMD_RESET_TPMESTABLISHED, + &reset_est, sizeof(reset_est), + sizeof(reset_est)) < 0) { + error_report("tpm-emulator: Could not reset the establishment bit: %s", + strerror(errno)); + return -1; + } + + res = be32_to_cpu(reset_est.u.resp.tpm_result); + if (res) { + error_report("tpm-emulator: TPM result for rest establixhed flag: 0x%x", + res); + return -1; + } + + return 0; +} + +static void tpm_emulator_cancel_cmd(TPMBackend *tb) +{ + TPMEmulator *tpm_emu = TPM_EMULATOR(tb); + ptm_res res; + + if (!TPM_EMULATOR_IMPLEMENTS_ALL_CAPS(tpm_emu, PTM_CAP_CANCEL_TPM_CMD)) { + DPRINTF("Backend does not support CANCEL_TPM_CMD"); + return; + } + + if (tpm_emulator_ctrlcmd(&tpm_emu->ctrl_chr, CMD_CANCEL_TPM_CMD, &res, 0, + sizeof(res)) < 0) { + error_report("tpm-emulator: Could not cancel command: %s", + strerror(errno)); + } else if (res != 0) { + error_report("tpm-emulator: Failed to cancel TPM: 0x%x", + be32_to_cpu(res)); + } +} + +static TPMVersion tpm_emulator_get_tpm_version(TPMBackend *tb) +{ + TPMEmulator *tpm_emu = TPM_EMULATOR(tb); + + return tpm_emu->tpm_version; +} + +static int tpm_emulator_block_migration(TPMEmulator *tpm_emu) +{ + Error *err = NULL; + + error_setg(&tpm_emu->migration_blocker, + "Migration disabled: TPM emulator not yet migratable"); + migrate_add_blocker(tpm_emu->migration_blocker, &err); + if (err) { + error_report_err(err); + error_free(tpm_emu->migration_blocker); + tpm_emu->migration_blocker = NULL; + + return -1; + } + + return 0; +} + +static int tpm_emulator_prepare_data_fd(TPMEmulator *tpm_emu) +{ + ptm_res res; + Error *err = NULL; + int fds[2] = { -1, -1 }; + + if (socketpair(AF_UNIX, SOCK_STREAM, 0, fds) < 0) { + error_report("tpm-emulator: Failed to create socketpair"); + return -1; + } + + qemu_chr_fe_set_msgfds(&tpm_emu->ctrl_chr, fds + 1, 1); + + if (tpm_emulator_ctrlcmd(&tpm_emu->ctrl_chr, CMD_SET_DATAFD, &res, 0, + sizeof(res)) || res != 0) { + error_report("tpm-emulator: Failed to send CMD_SET_DATAFD: %s", + strerror(errno)); + goto err_exit; + } + + tpm_emu->data_ioc = QIO_CHANNEL(qio_channel_socket_new_fd(fds[0], &err)); + if (err) { + error_prepend(&err, "tpm-emulator: Failed to create io channel: "); + error_report_err(err); + goto err_exit; + } + + closesocket(fds[1]); + + return 0; + +err_exit: + closesocket(fds[0]); + closesocket(fds[1]); + return -1; +} + +static int tpm_emulator_handle_device_opts(TPMEmulator *tpm_emu, QemuOpts *opts) +{ + const char *value; + + value = qemu_opt_get(opts, "chardev"); + if (value) { + Error *err = NULL; + Chardev *dev = qemu_chr_find(value); + + if (!dev) { + error_report("tpm-emulator: tpm chardev '%s' not found.", value); + goto err; + } + + if (!qemu_chr_fe_init(&tpm_emu->ctrl_chr, dev, &err)) { + error_prepend(&err, "tpm-emulator: No valid chardev found at '%s':", + value); + error_report_err(err); + goto err; + } + + tpm_emu->options->chardev = g_strdup(value); + } + + if (tpm_emulator_prepare_data_fd(tpm_emu) < 0) { + goto err; + } + + /* FIXME: tpm_util_test_tpmdev() accepts only on socket fd, as it also used + * by passthrough driver, which not yet using GIOChannel. + */ + if (tpm_util_test_tpmdev(QIO_CHANNEL_SOCKET(tpm_emu->data_ioc)->fd, + &tpm_emu->tpm_version)) { + error_report("'%s' is not emulating TPM device. Error: %s", + tpm_emu->options->chardev, strerror(errno)); + goto err; + } + + DPRINTF("TPM Version %s", tpm_emu->tpm_version == TPM_VERSION_1_2 ? "1.2" : + (tpm_emu->tpm_version == TPM_VERSION_2_0 ? "2.0" : "Unspecified")); + + if (tpm_emulator_probe_caps(tpm_emu) || + tpm_emulator_check_caps(tpm_emu)) { + goto err; + } + + return tpm_emulator_block_migration(tpm_emu); + +err: + DPRINTF("Startup error"); + return -1; +} + +static TPMBackend *tpm_emulator_create(QemuOpts *opts, const char *id) +{ + TPMBackend *tb = TPM_BACKEND(object_new(TYPE_TPM_EMULATOR)); + + tb->id = g_strdup(id); + + if (tpm_emulator_handle_device_opts(TPM_EMULATOR(tb), opts)) { + goto err_exit; + } + + return tb; + +err_exit: + object_unref(OBJECT(tb)); + + return NULL; +} + +static TpmTypeOptions *tpm_emulator_get_tpm_options(TPMBackend *tb) +{ + TPMEmulator *tpm_emu = TPM_EMULATOR(tb); + TpmTypeOptions *options = g_new0(TpmTypeOptions, 1); + + options->type = TPM_TYPE_OPTIONS_KIND_EMULATOR; + options->u.emulator.data = QAPI_CLONE(TPMEmulatorOptions, tpm_emu->options); + + return options; +} + +static const QemuOptDesc tpm_emulator_cmdline_opts[] = { + TPM_STANDARD_CMDLINE_OPTS, + { + .name = "chardev", + .type = QEMU_OPT_STRING, + .help = "Character device to use for out-of-band control messages", + }, + { /* end of list */ }, +}; + +static const TPMDriverOps tpm_emulator_driver = { + .type = TPM_TYPE_EMULATOR, + .opts = tpm_emulator_cmdline_opts, + .desc = "TPM emulator backend driver", + + .create = tpm_emulator_create, + .startup_tpm = tpm_emulator_startup_tpm, + .cancel_cmd = tpm_emulator_cancel_cmd, + .get_tpm_established_flag = tpm_emulator_get_tpm_established_flag, + .reset_tpm_established_flag = tpm_emulator_reset_tpm_established_flag, + .get_tpm_version = tpm_emulator_get_tpm_version, + .get_tpm_options = tpm_emulator_get_tpm_options, +}; + +static void tpm_emulator_inst_init(Object *obj) +{ + TPMEmulator *tpm_emu = TPM_EMULATOR(obj); + + DPRINTF("%s", __func__); + tpm_emu->options = g_new0(TPMEmulatorOptions, 1); + tpm_emu->cur_locty_number = ~0; +} + +/* + * Gracefully shut down the external TPM + */ +static void tpm_emulator_shutdown(TPMEmulator *tpm_emu) +{ + ptm_res res; + + if (tpm_emulator_ctrlcmd(&tpm_emu->ctrl_chr, CMD_SHUTDOWN, &res, 0, + sizeof(res)) < 0) { + error_report("tpm-emulator: Could not cleanly shutdown the TPM: %s", + strerror(errno)); + } else if (res != 0) { + error_report("tpm-emulator: TPM result for sutdown: 0x%x", + be32_to_cpu(res)); + } +} + +static void tpm_emulator_inst_finalize(Object *obj) +{ + TPMEmulator *tpm_emu = TPM_EMULATOR(obj); + + tpm_emulator_shutdown(tpm_emu); + + object_unref(OBJECT(tpm_emu->data_ioc)); + + qemu_chr_fe_deinit(&tpm_emu->ctrl_chr, false); + + qapi_free_TPMEmulatorOptions(tpm_emu->options); + + if (tpm_emu->migration_blocker) { + migrate_del_blocker(tpm_emu->migration_blocker); + error_free(tpm_emu->migration_blocker); + } +} + +static void tpm_emulator_class_init(ObjectClass *klass, void *data) +{ + TPMBackendClass *tbc = TPM_BACKEND_CLASS(klass); + tbc->ops = &tpm_emulator_driver; + tbc->handle_request = tpm_emulator_handle_request; +} + +static const TypeInfo tpm_emulator_info = { + .name = TYPE_TPM_EMULATOR, + .parent = TYPE_TPM_BACKEND, + .instance_size = sizeof(TPMEmulator), + .class_init = tpm_emulator_class_init, + .instance_init = tpm_emulator_inst_init, + .instance_finalize = tpm_emulator_inst_finalize, +}; + +static void tpm_emulator_register(void) +{ + type_register_static(&tpm_emulator_info); + tpm_register_driver(&tpm_emulator_driver); +} + +type_init(tpm_emulator_register) diff --git a/hw/tpm/tpm_ioctl.h b/hw/tpm/tpm_ioctl.h new file mode 100644 index 0000000000..33564b11de --- /dev/null +++ b/hw/tpm/tpm_ioctl.h @@ -0,0 +1,246 @@ +/* + * tpm_ioctl.h + * + * (c) Copyright IBM Corporation 2014, 2015. + * + * This file is licensed under the terms of the 3-clause BSD license + */ +#ifndef _TPM_IOCTL_H_ +#define _TPM_IOCTL_H_ + +#include <stdint.h> +#include <sys/uio.h> +#include <sys/types.h> +#include <sys/ioctl.h> + +/* + * Every response from a command involving a TPM command execution must hold + * the ptm_res as the first element. + * ptm_res corresponds to the error code of a command executed by the TPM. + */ + +typedef uint32_t ptm_res; + +/* PTM_GET_TPMESTABLISHED: get the establishment bit */ +struct ptm_est { + union { + struct { + ptm_res tpm_result; + unsigned char bit; /* TPM established bit */ + } resp; /* response */ + } u; +}; + +/* PTM_RESET_TPMESTABLISHED: reset establishment bit */ +struct ptm_reset_est { + union { + struct { + uint8_t loc; /* locality to use */ + } req; /* request */ + struct { + ptm_res tpm_result; + } resp; /* response */ + } u; +}; + +/* PTM_INIT */ +struct ptm_init { + union { + struct { + uint32_t init_flags; /* see definitions below */ + } req; /* request */ + struct { + ptm_res tpm_result; + } resp; /* response */ + } u; +}; + +/* above init_flags */ +#define PTM_INIT_FLAG_DELETE_VOLATILE (1 << 0) + /* delete volatile state file after reading it */ + +/* PTM_SET_LOCALITY */ +struct ptm_loc { + union { + struct { + uint8_t loc; /* locality to set */ + } req; /* request */ + struct { + ptm_res tpm_result; + } resp; /* response */ + } u; +}; + +/* PTM_HASH_DATA: hash given data */ +struct ptm_hdata { + union { + struct { + uint32_t length; + uint8_t data[4096]; + } req; /* request */ + struct { + ptm_res tpm_result; + } resp; /* response */ + } u; +}; + +/* + * size of the TPM state blob to transfer; x86_64 can handle 8k, + * ppc64le only ~7k; keep the response below a 4k page size + */ +#define PTM_STATE_BLOB_SIZE (3 * 1024) + +/* + * The following is the data structure to get state blobs from the TPM. + * If the size of the state blob exceeds the PTM_STATE_BLOB_SIZE, multiple reads + * with this ioctl and with adjusted offset are necessary. All bytes + * must be transferred and the transfer is done once the last byte has been + * returned. + * It is possible to use the read() interface for reading the data; however, the + * first bytes of the state blob will be part of the response to the ioctl(); a + * subsequent read() is only necessary if the total length (totlength) exceeds + * the number of received bytes. seek() is not supported. + */ +struct ptm_getstate { + union { + struct { + uint32_t state_flags; /* may be: PTM_STATE_FLAG_DECRYPTED */ + uint32_t type; /* which blob to pull */ + uint32_t offset; /* offset from where to read */ + } req; /* request */ + struct { + ptm_res tpm_result; + uint32_t state_flags; /* may be: PTM_STATE_FLAG_ENCRYPTED */ + uint32_t totlength; /* total length that will be transferred */ + uint32_t length; /* number of bytes in following buffer */ + uint8_t data[PTM_STATE_BLOB_SIZE]; + } resp; /* response */ + } u; +}; + +/* TPM state blob types */ +#define PTM_BLOB_TYPE_PERMANENT 1 +#define PTM_BLOB_TYPE_VOLATILE 2 +#define PTM_BLOB_TYPE_SAVESTATE 3 + +/* state_flags above : */ +#define PTM_STATE_FLAG_DECRYPTED 1 /* on input: get decrypted state */ +#define PTM_STATE_FLAG_ENCRYPTED 2 /* on output: state is encrypted */ + +/* + * The following is the data structure to set state blobs in the TPM. + * If the size of the state blob exceeds the PTM_STATE_BLOB_SIZE, multiple + * 'writes' using this ioctl are necessary. The last packet is indicated + * by the length being smaller than the PTM_STATE_BLOB_SIZE. + * The very first packet may have a length indicator of '0' enabling + * a write() with all the bytes from a buffer. If the write() interface + * is used, a final ioctl with a non-full buffer must be made to indicate + * that all data were transferred (a write with 0 bytes would not work). + */ +struct ptm_setstate { + union { + struct { + uint32_t state_flags; /* may be PTM_STATE_FLAG_ENCRYPTED */ + uint32_t type; /* which blob to set */ + uint32_t length; /* length of the data; + use 0 on the first packet to + transfer using write() */ + uint8_t data[PTM_STATE_BLOB_SIZE]; + } req; /* request */ + struct { + ptm_res tpm_result; + } resp; /* response */ + } u; +}; + +/* + * PTM_GET_CONFIG: Data structure to get runtime configuration information + * such as which keys are applied. + */ +struct ptm_getconfig { + union { + struct { + ptm_res tpm_result; + uint32_t flags; + } resp; /* response */ + } u; +}; + +#define PTM_CONFIG_FLAG_FILE_KEY 0x1 +#define PTM_CONFIG_FLAG_MIGRATION_KEY 0x2 + + +typedef uint64_t ptm_cap; +typedef struct ptm_est ptm_est; +typedef struct ptm_reset_est ptm_reset_est; +typedef struct ptm_loc ptm_loc; +typedef struct ptm_hdata ptm_hdata; +typedef struct ptm_init ptm_init; +typedef struct ptm_getstate ptm_getstate; +typedef struct ptm_setstate ptm_setstate; +typedef struct ptm_getconfig ptm_getconfig; + +/* capability flags returned by PTM_GET_CAPABILITY */ +#define PTM_CAP_INIT (1) +#define PTM_CAP_SHUTDOWN (1 << 1) +#define PTM_CAP_GET_TPMESTABLISHED (1 << 2) +#define PTM_CAP_SET_LOCALITY (1 << 3) +#define PTM_CAP_HASHING (1 << 4) +#define PTM_CAP_CANCEL_TPM_CMD (1 << 5) +#define PTM_CAP_STORE_VOLATILE (1 << 6) +#define PTM_CAP_RESET_TPMESTABLISHED (1 << 7) +#define PTM_CAP_GET_STATEBLOB (1 << 8) +#define PTM_CAP_SET_STATEBLOB (1 << 9) +#define PTM_CAP_STOP (1 << 10) +#define PTM_CAP_GET_CONFIG (1 << 11) +#define PTM_CAP_SET_DATAFD (1 << 12) + +enum { + PTM_GET_CAPABILITY = _IOR('P', 0, ptm_cap), + PTM_INIT = _IOWR('P', 1, ptm_init), + PTM_SHUTDOWN = _IOR('P', 2, ptm_res), + PTM_GET_TPMESTABLISHED = _IOR('P', 3, ptm_est), + PTM_SET_LOCALITY = _IOWR('P', 4, ptm_loc), + PTM_HASH_START = _IOR('P', 5, ptm_res), + PTM_HASH_DATA = _IOWR('P', 6, ptm_hdata), + PTM_HASH_END = _IOR('P', 7, ptm_res), + PTM_CANCEL_TPM_CMD = _IOR('P', 8, ptm_res), + PTM_STORE_VOLATILE = _IOR('P', 9, ptm_res), + PTM_RESET_TPMESTABLISHED = _IOWR('P', 10, ptm_reset_est), + PTM_GET_STATEBLOB = _IOWR('P', 11, ptm_getstate), + PTM_SET_STATEBLOB = _IOWR('P', 12, ptm_setstate), + PTM_STOP = _IOR('P', 13, ptm_res), + PTM_GET_CONFIG = _IOR('P', 14, ptm_getconfig), + PTM_SET_DATAFD = _IOR('P', 15, ptm_res), +}; + +/* + * Commands used by the non-CUSE TPMs + * + * All messages container big-endian data. + * + * The return messages only contain the 'resp' part of the unions + * in the data structures above. Besides that the limits in the + * buffers above (ptm_hdata:u.req.data and ptm_get_state:u.resp.data + * and ptm_set_state:u.req.data) are 0xffffffff. + */ +enum { + CMD_GET_CAPABILITY = 1, + CMD_INIT, + CMD_SHUTDOWN, + CMD_GET_TPMESTABLISHED, + CMD_SET_LOCALITY, + CMD_HASH_START, + CMD_HASH_DATA, + CMD_HASH_END, + CMD_CANCEL_TPM_CMD, + CMD_STORE_VOLATILE, + CMD_RESET_TPMESTABLISHED, + CMD_GET_STATEBLOB, + CMD_SET_STATEBLOB, + CMD_STOP, + CMD_GET_CONFIG, + CMD_SET_DATAFD +}; + +#endif /* _TPM_IOCTL_H */ diff --git a/hw/tpm/tpm_passthrough.c b/hw/tpm/tpm_passthrough.c index 9234eb3459..e6ace28b04 100644 --- a/hw/tpm/tpm_passthrough.c +++ b/hw/tpm/tpm_passthrough.c @@ -30,7 +30,7 @@ #include "tpm_int.h" #include "hw/hw.h" #include "hw/i386/pc.h" -#include "sysemu/tpm_backend_int.h" +#include "qapi/clone-visitor.h" #include "tpm_tis.h" #include "tpm_util.h" @@ -46,29 +46,16 @@ #define TPM_PASSTHROUGH(obj) \ OBJECT_CHECK(TPMPassthruState, (obj), TYPE_TPM_PASSTHROUGH) -static const TPMDriverOps tpm_passthrough_driver; - /* data structures */ -typedef struct TPMPassthruThreadParams { - TPMState *tpm_state; - - TPMRecvDataCB *recv_data_callback; - TPMBackend *tb; -} TPMPassthruThreadParams; - struct TPMPassthruState { TPMBackend parent; - TPMBackendThread tbt; - - TPMPassthruThreadParams tpm_thread_params; - - char *tpm_dev; + TPMPassthroughOptions *options; + const char *tpm_dev; int tpm_fd; bool tpm_executing; bool tpm_op_canceled; int cancel_fd; - bool had_startup_error; TPMVersion tpm_version; }; @@ -81,27 +68,6 @@ typedef struct TPMPassthruState TPMPassthruState; static void tpm_passthrough_cancel_cmd(TPMBackend *tb); -static int tpm_passthrough_unix_write(int fd, const uint8_t *buf, uint32_t len) -{ - int ret, remain; - - remain = len; - while (remain > 0) { - ret = write(fd, buf, remain); - if (ret < 0) { - if (errno != EINTR && errno != EAGAIN) { - return -1; - } - } else if (ret == 0) { - break; - } else { - buf += ret; - remain -= ret; - } - } - return len - remain; -} - static int tpm_passthrough_unix_read(int fd, uint8_t *buf, uint32_t len) { int ret; @@ -115,45 +81,12 @@ static int tpm_passthrough_unix_read(int fd, uint8_t *buf, uint32_t len) } return ret; } - -static uint32_t tpm_passthrough_get_size_from_buffer(const uint8_t *buf) -{ - struct tpm_resp_hdr *resp = (struct tpm_resp_hdr *)buf; - - return be32_to_cpu(resp->len); -} - -/* - * Write an error message in the given output buffer. - */ -static void tpm_write_fatal_error_response(uint8_t *out, uint32_t out_len) -{ - if (out_len >= sizeof(struct tpm_resp_hdr)) { - struct tpm_resp_hdr *resp = (struct tpm_resp_hdr *)out; - - resp->tag = cpu_to_be16(TPM_TAG_RSP_COMMAND); - resp->len = cpu_to_be32(sizeof(struct tpm_resp_hdr)); - resp->errcode = cpu_to_be32(TPM_FAIL); - } -} - -static bool tpm_passthrough_is_selftest(const uint8_t *in, uint32_t in_len) -{ - struct tpm_req_hdr *hdr = (struct tpm_req_hdr *)in; - - if (in_len >= sizeof(*hdr)) { - return (be32_to_cpu(hdr->ordinal) == TPM_ORD_ContinueSelfTest); - } - - return false; -} - static int tpm_passthrough_unix_tx_bufs(TPMPassthruState *tpm_pt, const uint8_t *in, uint32_t in_len, uint8_t *out, uint32_t out_len, bool *selftest_done) { - int ret; + ssize_t ret; bool is_selftest; const struct tpm_resp_hdr *hdr; @@ -161,9 +94,9 @@ static int tpm_passthrough_unix_tx_bufs(TPMPassthruState *tpm_pt, tpm_pt->tpm_executing = true; *selftest_done = false; - is_selftest = tpm_passthrough_is_selftest(in, in_len); + is_selftest = tpm_util_is_selftest(in, in_len); - ret = tpm_passthrough_unix_write(tpm_pt->tpm_fd, in, in_len); + ret = qemu_write_full(tpm_pt->tpm_fd, (const void *)in, (size_t)in_len); if (ret != in_len) { if (!tpm_pt->tpm_op_canceled || errno != ECANCELED) { error_report("tpm_passthrough: error while transmitting data " @@ -183,7 +116,7 @@ static int tpm_passthrough_unix_tx_bufs(TPMPassthruState *tpm_pt, strerror(errno), errno); } } else if (ret < sizeof(struct tpm_resp_hdr) || - tpm_passthrough_get_size_from_buffer(out) != ret) { + be32_to_cpu(((struct tpm_resp_hdr *)out)->len) != ret) { ret = -1; error_report("tpm_passthrough: received invalid response " "packet from TPM"); @@ -196,7 +129,7 @@ static int tpm_passthrough_unix_tx_bufs(TPMPassthruState *tpm_pt, err_exit: if (ret < 0) { - tpm_write_fatal_error_response(out, out_len); + tpm_util_write_fatal_error_response(out, out_len); } tpm_pt->tpm_executing = false; @@ -216,12 +149,9 @@ static int tpm_passthrough_unix_transfer(TPMPassthruState *tpm_pt, selftest_done); } -static void tpm_passthrough_worker_thread(gpointer data, - gpointer user_data) +static void tpm_passthrough_handle_request(TPMBackend *tb, TPMBackendCmd cmd) { - TPMPassthruThreadParams *thr_parms = user_data; - TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(thr_parms->tb); - TPMBackendCmd cmd = (TPMBackendCmd)data; + TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(tb); bool selftest_done = false; DPRINTF("tpm_passthrough: processing command type %d\n", cmd); @@ -229,12 +159,12 @@ static void tpm_passthrough_worker_thread(gpointer data, switch (cmd) { case TPM_BACKEND_CMD_PROCESS_CMD: tpm_passthrough_unix_transfer(tpm_pt, - thr_parms->tpm_state->locty_data, + tb->tpm_state->locty_data, &selftest_done); - thr_parms->recv_data_callback(thr_parms->tpm_state, - thr_parms->tpm_state->locty_number, - selftest_done); + tb->recv_data_callback(tb->tpm_state, + tb->tpm_state->locty_number, + selftest_done); break; case TPM_BACKEND_CMD_INIT: case TPM_BACKEND_CMD_END: @@ -244,47 +174,11 @@ static void tpm_passthrough_worker_thread(gpointer data, } } -/* - * Start the TPM (thread). If it had been started before, then terminate - * and start it again. - */ -static int tpm_passthrough_startup_tpm(TPMBackend *tb) -{ - TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(tb); - - /* terminate a running TPM */ - tpm_backend_thread_end(&tpm_pt->tbt); - - tpm_backend_thread_create(&tpm_pt->tbt, - tpm_passthrough_worker_thread, - &tpm_pt->tpm_thread_params); - - return 0; -} - static void tpm_passthrough_reset(TPMBackend *tb) { - TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(tb); - DPRINTF("tpm_passthrough: CALL TO TPM_RESET!\n"); tpm_passthrough_cancel_cmd(tb); - - tpm_backend_thread_end(&tpm_pt->tbt); - - tpm_pt->had_startup_error = false; -} - -static int tpm_passthrough_init(TPMBackend *tb, TPMState *s, - TPMRecvDataCB *recv_data_cb) -{ - TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(tb); - - tpm_pt->tpm_thread_params.tpm_state = s; - tpm_pt->tpm_thread_params.recv_data_callback = recv_data_cb; - tpm_pt->tpm_thread_params.tb = tb; - - return 0; } static bool tpm_passthrough_get_tpm_established_flag(TPMBackend *tb) @@ -299,31 +193,6 @@ static int tpm_passthrough_reset_tpm_established_flag(TPMBackend *tb, return 0; } -static bool tpm_passthrough_get_startup_error(TPMBackend *tb) -{ - TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(tb); - - return tpm_pt->had_startup_error; -} - -static size_t tpm_passthrough_realloc_buffer(TPMSizedBuffer *sb) -{ - size_t wanted_size = 4096; /* Linux tpm.c buffer size */ - - if (sb->size != wanted_size) { - sb->buffer = g_realloc(sb->buffer, wanted_size); - sb->size = wanted_size; - } - return sb->size; -} - -static void tpm_passthrough_deliver_request(TPMBackend *tb) -{ - TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(tb); - - tpm_backend_thread_deliver_request(&tpm_pt->tbt); -} - static void tpm_passthrough_cancel_cmd(TPMBackend *tb) { TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(tb); @@ -351,11 +220,6 @@ static void tpm_passthrough_cancel_cmd(TPMBackend *tb) } } -static const char *tpm_passthrough_create_desc(void) -{ - return "Passthrough TPM backend driver"; -} - static TPMVersion tpm_passthrough_get_tpm_version(TPMBackend *tb) { TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(tb); @@ -369,15 +233,14 @@ static TPMVersion tpm_passthrough_get_tpm_version(TPMBackend *tb) * in Documentation/ABI/stable/sysfs-class-tpm. * From /dev/tpm0 create /sys/class/misc/tpm0/device/cancel */ -static int tpm_passthrough_open_sysfs_cancel(TPMBackend *tb) +static int tpm_passthrough_open_sysfs_cancel(TPMPassthruState *tpm_pt) { - TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(tb); int fd = -1; char *dev; char path[PATH_MAX]; - if (tb->cancel_path) { - fd = qemu_open(tb->cancel_path, O_WRONLY); + if (tpm_pt->options->cancel_path) { + fd = qemu_open(tpm_pt->options->cancel_path, O_WRONLY); if (fd < 0) { error_report("Could not open TPM cancel path : %s", strerror(errno)); @@ -392,7 +255,7 @@ static int tpm_passthrough_open_sysfs_cancel(TPMBackend *tb) dev) < sizeof(path)) { fd = qemu_open(path, O_WRONLY); if (fd >= 0) { - tb->cancel_path = g_strdup(path); + tpm_pt->options->cancel_path = g_strdup(path); } else { error_report("tpm_passthrough: Could not open TPM cancel " "path %s : %s", path, strerror(errno)); @@ -412,17 +275,18 @@ static int tpm_passthrough_handle_device_opts(QemuOpts *opts, TPMBackend *tb) const char *value; value = qemu_opt_get(opts, "cancel-path"); - tb->cancel_path = g_strdup(value); + if (value) { + tpm_pt->options->cancel_path = g_strdup(value); + tpm_pt->options->has_cancel_path = true; + } value = qemu_opt_get(opts, "path"); - if (!value) { - value = TPM_PASSTHROUGH_DEFAULT_DEVICE; + if (value) { + tpm_pt->options->has_path = true; + tpm_pt->options->path = g_strdup(value); } - tpm_pt->tpm_dev = g_strdup(value); - - tb->path = g_strdup(tpm_pt->tpm_dev); - + tpm_pt->tpm_dev = value ? value : TPM_PASSTHROUGH_DEFAULT_DEVICE; tpm_pt->tpm_fd = qemu_open(tpm_pt->tpm_dev, O_RDWR); if (tpm_pt->tpm_fd < 0) { error_report("Cannot access TPM device using '%s': %s", @@ -443,10 +307,8 @@ static int tpm_passthrough_handle_device_opts(QemuOpts *opts, TPMBackend *tb) tpm_pt->tpm_fd = -1; err_free_parameters: - g_free(tb->path); - tb->path = NULL; - - g_free(tpm_pt->tpm_dev); + qapi_free_TPMPassthroughOptions(tpm_pt->options); + tpm_pt->options = NULL; tpm_pt->tpm_dev = NULL; return 1; @@ -459,16 +321,12 @@ static TPMBackend *tpm_passthrough_create(QemuOpts *opts, const char *id) TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(tb); tb->id = g_strdup(id); - /* let frontend set the fe_model to proper value */ - tb->fe_model = -1; - - tb->ops = &tpm_passthrough_driver; if (tpm_passthrough_handle_device_opts(opts, tb)) { goto err_exit; } - tpm_pt->cancel_fd = tpm_passthrough_open_sysfs_cancel(tb); + tpm_pt->cancel_fd = tpm_passthrough_open_sysfs_cancel(tpm_pt); if (tpm_pt->cancel_fd < 0) { goto err_exit; } @@ -476,26 +334,20 @@ static TPMBackend *tpm_passthrough_create(QemuOpts *opts, const char *id) return tb; err_exit: - g_free(tb->id); + object_unref(obj); return NULL; } -static void tpm_passthrough_destroy(TPMBackend *tb) +static TpmTypeOptions *tpm_passthrough_get_tpm_options(TPMBackend *tb) { - TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(tb); + TpmTypeOptions *options = g_new0(TpmTypeOptions, 1); - tpm_passthrough_cancel_cmd(tb); - - tpm_backend_thread_end(&tpm_pt->tbt); - - qemu_close(tpm_pt->tpm_fd); - qemu_close(tpm_pt->cancel_fd); + options->type = TPM_TYPE_OPTIONS_KIND_PASSTHROUGH; + options->u.passthrough.data = QAPI_CLONE(TPMPassthroughOptions, + TPM_PASSTHROUGH(tb)->options); - g_free(tb->id); - g_free(tb->path); - g_free(tb->cancel_path); - g_free(tpm_pt->tpm_dev); + return options; } static const QemuOptDesc tpm_passthrough_cmdline_opts[] = { @@ -516,27 +368,34 @@ static const QemuOptDesc tpm_passthrough_cmdline_opts[] = { static const TPMDriverOps tpm_passthrough_driver = { .type = TPM_TYPE_PASSTHROUGH, .opts = tpm_passthrough_cmdline_opts, - .desc = tpm_passthrough_create_desc, + .desc = "Passthrough TPM backend driver", .create = tpm_passthrough_create, - .destroy = tpm_passthrough_destroy, - .init = tpm_passthrough_init, - .startup_tpm = tpm_passthrough_startup_tpm, - .realloc_buffer = tpm_passthrough_realloc_buffer, .reset = tpm_passthrough_reset, - .had_startup_error = tpm_passthrough_get_startup_error, - .deliver_request = tpm_passthrough_deliver_request, .cancel_cmd = tpm_passthrough_cancel_cmd, .get_tpm_established_flag = tpm_passthrough_get_tpm_established_flag, .reset_tpm_established_flag = tpm_passthrough_reset_tpm_established_flag, .get_tpm_version = tpm_passthrough_get_tpm_version, + .get_tpm_options = tpm_passthrough_get_tpm_options, }; static void tpm_passthrough_inst_init(Object *obj) { + TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(obj); + + tpm_pt->options = g_new0(TPMPassthroughOptions, 1); + tpm_pt->tpm_fd = -1; + tpm_pt->cancel_fd = -1; } static void tpm_passthrough_inst_finalize(Object *obj) { + TPMPassthruState *tpm_pt = TPM_PASSTHROUGH(obj); + + tpm_passthrough_cancel_cmd(TPM_BACKEND(obj)); + + qemu_close(tpm_pt->tpm_fd); + qemu_close(tpm_pt->cancel_fd); + qapi_free_TPMPassthroughOptions(tpm_pt->options); } static void tpm_passthrough_class_init(ObjectClass *klass, void *data) @@ -544,6 +403,7 @@ static void tpm_passthrough_class_init(ObjectClass *klass, void *data) TPMBackendClass *tbc = TPM_BACKEND_CLASS(klass); tbc->ops = &tpm_passthrough_driver; + tbc->handle_request = tpm_passthrough_handle_request; } static const TypeInfo tpm_passthrough_info = { diff --git a/hw/tpm/tpm_tis.c b/hw/tpm/tpm_tis.c index a6440fef91..d5118e7f60 100644 --- a/hw/tpm/tpm_tis.c +++ b/hw/tpm/tpm_tis.c @@ -963,6 +963,16 @@ static int tpm_tis_do_startup_tpm(TPMState *s) return tpm_backend_startup_tpm(s->be_driver); } +static void tpm_tis_realloc_buffer(TPMSizedBuffer *sb) +{ + size_t wanted_size = 4096; /* Linux tpm.c buffer size */ + + if (sb->size != wanted_size) { + sb->buffer = g_realloc(sb->buffer, wanted_size); + sb->size = wanted_size; + } +} + /* * Get the TPMVersion of the backend device being used */ @@ -1010,9 +1020,9 @@ static void tpm_tis_reset(DeviceState *dev) tis->loc[c].state = TPM_TIS_STATE_IDLE; tis->loc[c].w_offset = 0; - tpm_backend_realloc_buffer(s->be_driver, &tis->loc[c].w_buffer); + tpm_tis_realloc_buffer(&tis->loc[c].w_buffer); tis->loc[c].r_offset = 0; - tpm_backend_realloc_buffer(s->be_driver, &tis->loc[c].r_buffer); + tpm_tis_realloc_buffer(&tis->loc[c].r_buffer); } tpm_tis_do_startup_tpm(s); diff --git a/hw/tpm/tpm_util.c b/hw/tpm/tpm_util.c index 7b35429725..73d77965fd 100644 --- a/hw/tpm/tpm_util.c +++ b/hw/tpm/tpm_util.c @@ -24,6 +24,31 @@ #include "tpm_int.h" /* + * Write an error message in the given output buffer. + */ +void tpm_util_write_fatal_error_response(uint8_t *out, uint32_t out_len) +{ + if (out_len >= sizeof(struct tpm_resp_hdr)) { + struct tpm_resp_hdr *resp = (struct tpm_resp_hdr *)out; + + resp->tag = cpu_to_be16(TPM_TAG_RSP_COMMAND); + resp->len = cpu_to_be32(sizeof(struct tpm_resp_hdr)); + resp->errcode = cpu_to_be32(TPM_FAIL); + } +} + +bool tpm_util_is_selftest(const uint8_t *in, uint32_t in_len) +{ + struct tpm_req_hdr *hdr = (struct tpm_req_hdr *)in; + + if (in_len >= sizeof(*hdr)) { + return (be32_to_cpu(hdr->ordinal) == TPM_ORD_ContinueSelfTest); + } + + return false; +} + +/* * A basic test of a TPM device. We expect a well formatted response header * (error response is fine) within one second. */ @@ -43,10 +68,10 @@ static int tpm_util_test(int fd, n = write(fd, request, requestlen); if (n < 0) { - return errno; + return -errno; } if (n != requestlen) { - return EFAULT; + return -EFAULT; } FD_ZERO(&readfds); @@ -55,18 +80,18 @@ static int tpm_util_test(int fd, /* wait for a second */ n = select(fd + 1, &readfds, NULL, NULL, &tv); if (n != 1) { - return errno; + return -errno; } n = read(fd, &buf, sizeof(buf)); if (n < sizeof(struct tpm_resp_hdr)) { - return EFAULT; + return -EFAULT; } resp = (struct tpm_resp_hdr *)buf; /* check the header */ if (be32_to_cpu(resp->len) != n) { - return EBADMSG; + return -EMSGSIZE; } *return_tag = be16_to_cpu(resp->tag); diff --git a/hw/tpm/tpm_util.h b/hw/tpm/tpm_util.h index df76245e6e..2f7c96146d 100644 --- a/hw/tpm/tpm_util.h +++ b/hw/tpm/tpm_util.h @@ -24,6 +24,10 @@ #include "sysemu/tpm_backend.h" +void tpm_util_write_fatal_error_response(uint8_t *out, uint32_t out_len); + +bool tpm_util_is_selftest(const uint8_t *in, uint32_t in_len); + int tpm_util_test_tpmdev(int tpm_fd, TPMVersion *tpm_version); #endif /* TPM_TPM_UTIL_H */ diff --git a/hw/usb/hcd-ehci-pci.c b/hw/usb/hcd-ehci-pci.c index 6dedcb8989..8c0fc53a26 100644 --- a/hw/usb/hcd-ehci-pci.c +++ b/hw/usb/hcd-ehci-pci.c @@ -170,6 +170,10 @@ static const TypeInfo ehci_pci_type_info = { .instance_finalize = usb_ehci_pci_finalize, .abstract = true, .class_init = ehci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void ehci_data_class_init(ObjectClass *klass, void *data) diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 17beeddb09..d4c0293db5 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -2146,6 +2146,10 @@ static const TypeInfo ohci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(OHCIPCIState), .class_init = ohci_pci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static Property ohci_sysbus_properties[] = { diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index e3562a4c60..836b11f177 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -1323,6 +1323,10 @@ static const TypeInfo uhci_pci_type_info = { .class_size = sizeof(UHCIPCIDeviceClass), .abstract = true, .class_init = uhci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void uhci_data_class_init(ObjectClass *klass, void *data) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index d75c085d94..af3a9d88de 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -3670,6 +3670,11 @@ static const TypeInfo xhci_info = { .instance_size = sizeof(XHCIState), .class_init = xhci_class_init, .abstract = true, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, }; static void qemu_xhci_class_init(ObjectClass *klass, void *data) diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c index 14291c2a16..60ad5fb91a 100644 --- a/hw/vfio/pci-quirks.c +++ b/hw/vfio/pci-quirks.c @@ -1198,6 +1198,10 @@ static TypeInfo vfio_pci_igd_lpc_bridge_info = { .name = "vfio-pci-igd-lpc-bridge", .parent = TYPE_PCI_DEVICE, .class_init = vfio_pci_igd_lpc_bridge_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void vfio_pci_igd_register_types(void) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 9e86db7c3b..c977ee327f 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -3036,6 +3036,11 @@ static const TypeInfo vfio_pci_dev_info = { .class_init = vfio_pci_dev_class_init, .instance_init = vfio_instance_init, .instance_finalize = vfio_instance_finalize, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, }; static void register_vfio_pci_dev_type(void) diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c index 5fd69f0b2e..ddc42f0f93 100644 --- a/hw/virtio/vhost.c +++ b/hw/virtio/vhost.c @@ -375,8 +375,6 @@ static void vhost_log_put(struct vhost_dev *dev, bool sync) if (!log) { return; } - dev->log = NULL; - dev->log_size = 0; --log->refcnt; if (log->refcnt == 0) { @@ -396,6 +394,9 @@ static void vhost_log_put(struct vhost_dev *dev, bool sync) g_free(log); } + + dev->log = NULL; + dev->log_size = 0; } static bool vhost_dev_log_is_shared(struct vhost_dev *dev) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 8b0d6b69cd..e92837c42b 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -88,77 +88,19 @@ static void virtio_pci_save_config(DeviceState *d, QEMUFile *f) qemu_put_be16(f, vdev->config_vector); } -static void virtio_pci_load_modern_queue_state(VirtIOPCIQueue *vq, - QEMUFile *f) -{ - vq->num = qemu_get_be16(f); - vq->enabled = qemu_get_be16(f); - vq->desc[0] = qemu_get_be32(f); - vq->desc[1] = qemu_get_be32(f); - vq->avail[0] = qemu_get_be32(f); - vq->avail[1] = qemu_get_be32(f); - vq->used[0] = qemu_get_be32(f); - vq->used[1] = qemu_get_be32(f); -} - -static bool virtio_pci_has_extra_state(DeviceState *d) -{ - VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); - - return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA; -} - -static int get_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size, - VMStateField *field) -{ - VirtIOPCIProxy *proxy = pv; - int i; - - proxy->dfselect = qemu_get_be32(f); - proxy->gfselect = qemu_get_be32(f); - proxy->guest_features[0] = qemu_get_be32(f); - proxy->guest_features[1] = qemu_get_be32(f); - for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { - virtio_pci_load_modern_queue_state(&proxy->vqs[i], f); - } - - return 0; -} - -static void virtio_pci_save_modern_queue_state(VirtIOPCIQueue *vq, - QEMUFile *f) -{ - qemu_put_be16(f, vq->num); - qemu_put_be16(f, vq->enabled); - qemu_put_be32(f, vq->desc[0]); - qemu_put_be32(f, vq->desc[1]); - qemu_put_be32(f, vq->avail[0]); - qemu_put_be32(f, vq->avail[1]); - qemu_put_be32(f, vq->used[0]); - qemu_put_be32(f, vq->used[1]); -} - -static int put_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size, - VMStateField *field, QJSON *vmdesc) -{ - VirtIOPCIProxy *proxy = pv; - int i; - - qemu_put_be32(f, proxy->dfselect); - qemu_put_be32(f, proxy->gfselect); - qemu_put_be32(f, proxy->guest_features[0]); - qemu_put_be32(f, proxy->guest_features[1]); - for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { - virtio_pci_save_modern_queue_state(&proxy->vqs[i], f); +static const VMStateDescription vmstate_virtio_pci_modern_queue_state = { + .name = "virtio_pci/modern_queue_state", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT16(num, VirtIOPCIQueue), + VMSTATE_UNUSED(1), /* enabled was stored as be16 */ + VMSTATE_BOOL(enabled, VirtIOPCIQueue), + VMSTATE_UINT32_ARRAY(desc, VirtIOPCIQueue, 2), + VMSTATE_UINT32_ARRAY(avail, VirtIOPCIQueue, 2), + VMSTATE_UINT32_ARRAY(used, VirtIOPCIQueue, 2), + VMSTATE_END_OF_LIST() } - - return 0; -} - -static const VMStateInfo vmstate_info_virtio_pci_modern_state = { - .name = "virtqueue_state", - .get = get_virtio_pci_modern_state, - .put = put_virtio_pci_modern_state, }; static bool virtio_pci_modern_state_needed(void *opaque) @@ -168,21 +110,18 @@ static bool virtio_pci_modern_state_needed(void *opaque) return virtio_pci_modern(proxy); } -static const VMStateDescription vmstate_virtio_pci_modern_state = { +static const VMStateDescription vmstate_virtio_pci_modern_state_sub = { .name = "virtio_pci/modern_state", .version_id = 1, .minimum_version_id = 1, .needed = &virtio_pci_modern_state_needed, .fields = (VMStateField[]) { - { - .name = "modern_state", - .version_id = 0, - .field_exists = NULL, - .size = 0, - .info = &vmstate_info_virtio_pci_modern_state, - .flags = VMS_SINGLE, - .offset = 0, - }, + VMSTATE_UINT32(dfselect, VirtIOPCIProxy), + VMSTATE_UINT32(gfselect, VirtIOPCIProxy), + VMSTATE_UINT32_ARRAY(guest_features, VirtIOPCIProxy, 2), + VMSTATE_STRUCT_ARRAY(vqs, VirtIOPCIProxy, VIRTIO_QUEUE_MAX, 0, + vmstate_virtio_pci_modern_queue_state, + VirtIOPCIQueue), VMSTATE_END_OF_LIST() } }; @@ -196,11 +135,18 @@ static const VMStateDescription vmstate_virtio_pci = { VMSTATE_END_OF_LIST() }, .subsections = (const VMStateDescription*[]) { - &vmstate_virtio_pci_modern_state, + &vmstate_virtio_pci_modern_state_sub, NULL } }; +static bool virtio_pci_has_extra_state(DeviceState *d) +{ + VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); + + return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA; +} + static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f) { VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); @@ -545,6 +491,24 @@ static const MemoryRegionOps virtio_pci_config_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; +static MemoryRegion *virtio_address_space_lookup(VirtIOPCIProxy *proxy, + hwaddr *off, int len) +{ + int i; + VirtIOPCIRegion *reg; + + for (i = 0; i < ARRAY_SIZE(proxy->regs); ++i) { + reg = &proxy->regs[i]; + if (*off >= reg->offset && + *off + len <= reg->offset + reg->size) { + *off -= reg->offset; + return ®->mr; + } + } + + return NULL; +} + /* Below are generic functions to do memcpy from/to an address space, * without byteswaps, with input validation. * @@ -558,63 +522,72 @@ static const MemoryRegionOps virtio_pci_config_ops = { * Note: host pointer must be aligned. */ static -void virtio_address_space_write(AddressSpace *as, hwaddr addr, +void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr, const uint8_t *buf, int len) { - uint32_t val; + uint64_t val; + MemoryRegion *mr; /* address_space_* APIs assume an aligned address. * As address is under guest control, handle illegal values. */ addr &= ~(len - 1); + mr = virtio_address_space_lookup(proxy, &addr, len); + if (!mr) { + return; + } + /* Make sure caller aligned buf properly */ assert(!(((uintptr_t)buf) & (len - 1))); switch (len) { case 1: val = pci_get_byte(buf); - address_space_stb(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); break; case 2: - val = pci_get_word(buf); - address_space_stw_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); + val = cpu_to_le16(pci_get_word(buf)); break; case 4: - val = pci_get_long(buf); - address_space_stl_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); + val = cpu_to_le32(pci_get_long(buf)); break; default: /* As length is under guest control, handle illegal values. */ - break; + return; } + memory_region_dispatch_write(mr, addr, val, len, MEMTXATTRS_UNSPECIFIED); } static void -virtio_address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len) +virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr, + uint8_t *buf, int len) { - uint32_t val; + uint64_t val; + MemoryRegion *mr; /* address_space_* APIs assume an aligned address. * As address is under guest control, handle illegal values. */ addr &= ~(len - 1); + mr = virtio_address_space_lookup(proxy, &addr, len); + if (!mr) { + return; + } + /* Make sure caller aligned buf properly */ assert(!(((uintptr_t)buf) & (len - 1))); + memory_region_dispatch_read(mr, addr, &val, len, MEMTXATTRS_UNSPECIFIED); switch (len) { case 1: - val = address_space_ldub(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); pci_set_byte(buf, val); break; case 2: - val = address_space_lduw_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); - pci_set_word(buf, val); + pci_set_word(buf, le16_to_cpu(val)); break; case 4: - val = address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); - pci_set_long(buf, val); + pci_set_long(buf, le32_to_cpu(val)); break; default: /* As length is under guest control, handle illegal values. */ @@ -650,8 +623,7 @@ static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, if (len == 1 || len == 2 || len == 4) { assert(len <= sizeof cfg->pci_cfg_data); - virtio_address_space_write(&proxy->modern_as, off, - cfg->pci_cfg_data, len); + virtio_address_space_write(proxy, off, cfg->pci_cfg_data, len); } } } @@ -675,8 +647,7 @@ static uint32_t virtio_read_config(PCIDevice *pci_dev, if (len == 1 || len == 2 || len == 4) { assert(len <= sizeof cfg->pci_cfg_data); - virtio_address_space_read(&proxy->modern_as, off, - cfg->pci_cfg_data, len); + virtio_address_space_read(proxy, off, cfg->pci_cfg_data, len); } } @@ -1783,15 +1754,6 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) /* PCI BAR regions must be powers of 2 */ pow2ceil(proxy->notify.offset + proxy->notify.size)); - memory_region_init_alias(&proxy->modern_cfg, - OBJECT(proxy), - "virtio-pci-cfg", - &proxy->modern_bar, - 0, - memory_region_size(&proxy->modern_bar)); - - address_space_init(&proxy->modern_as, &proxy->modern_cfg, "virtio-pci-cfg-as"); - if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) { proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; } @@ -1860,10 +1822,7 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) static void virtio_pci_exit(PCIDevice *pci_dev) { - VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); - msix_uninit_exclusive_bar(pci_dev); - address_space_destroy(&proxy->modern_as); } static void virtio_pci_reset(DeviceState *qdev) @@ -1958,6 +1917,11 @@ static const TypeInfo virtio_pci_info = { .class_init = virtio_pci_class_init, .class_size = sizeof(VirtioPCIClass), .abstract = true, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, }; /* virtio-blk-pci */ diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index 69f5959623..12d3a90686 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -155,15 +155,18 @@ typedef struct VirtIOPCIQueue { struct VirtIOPCIProxy { PCIDevice pci_dev; MemoryRegion bar; - VirtIOPCIRegion common; - VirtIOPCIRegion isr; - VirtIOPCIRegion device; - VirtIOPCIRegion notify; - VirtIOPCIRegion notify_pio; + union { + struct { + VirtIOPCIRegion common; + VirtIOPCIRegion isr; + VirtIOPCIRegion device; + VirtIOPCIRegion notify; + VirtIOPCIRegion notify_pio; + }; + VirtIOPCIRegion regs[5]; + }; MemoryRegion modern_bar; MemoryRegion io_bar; - MemoryRegion modern_cfg; - AddressSpace modern_as; uint32_t legacy_io_bar_idx; uint32_t msix_bar_idx; uint32_t modern_io_bar_idx; diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 311929e9df..5884ce3480 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -834,7 +834,7 @@ void *virtqueue_pop(VirtQueue *vq, size_t sz) int64_t len; VirtIODevice *vdev = vq->vdev; VirtQueueElement *elem = NULL; - unsigned out_num, in_num; + unsigned out_num, in_num, elem_entries; hwaddr addr[VIRTQUEUE_MAX_SIZE]; struct iovec iov[VIRTQUEUE_MAX_SIZE]; VRingDesc desc; @@ -852,7 +852,7 @@ void *virtqueue_pop(VirtQueue *vq, size_t sz) smp_rmb(); /* When we start there are none of either input nor output. */ - out_num = in_num = 0; + out_num = in_num = elem_entries = 0; max = vq->vring.num; @@ -922,7 +922,7 @@ void *virtqueue_pop(VirtQueue *vq, size_t sz) } /* If we've got too many, that implies a descriptor loop. */ - if ((in_num + out_num) > max) { + if (++elem_entries > max) { virtio_error(vdev, "Looped descriptor"); goto err_undo_map; } diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c index 22bce364d7..95f6ad186d 100644 --- a/hw/watchdog/wdt_aspeed.c +++ b/hw/watchdog/wdt_aspeed.c @@ -100,13 +100,13 @@ static uint64_t aspeed_wdt_read(void *opaque, hwaddr offset, unsigned size) static void aspeed_wdt_reload(AspeedWDTState *s, bool pclk) { - uint32_t reload; + uint64_t reload; if (pclk) { reload = muldiv64(s->regs[WDT_RELOAD_VALUE], NANOSECONDS_PER_SECOND, s->pclk_freq); } else { - reload = s->regs[WDT_RELOAD_VALUE] * 1000; + reload = s->regs[WDT_RELOAD_VALUE] * 1000ULL; } if (aspeed_wdt_is_enabled(s)) { diff --git a/hw/watchdog/wdt_i6300esb.c b/hw/watchdog/wdt_i6300esb.c index 49b3cd188a..e596b0804d 100644 --- a/hw/watchdog/wdt_i6300esb.c +++ b/hw/watchdog/wdt_i6300esb.c @@ -463,6 +463,10 @@ static const TypeInfo i6300esb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(I6300State), .class_init = i6300esb_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; static void i6300esb_register_types(void) diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index 375efa68f6..9bba717708 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -964,6 +964,11 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { INTERFACE_PCIE_DEVICE }, + { }, + }, }; static void xen_pci_passthrough_register_types(void) |