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-rw-r--r--hw/arm/allwinner-a10.c19
-rw-r--r--hw/arm/armv7m.c7
-rw-r--r--hw/arm/bcm2836.c20
-rw-r--r--hw/arm/fsl-imx25.c30
-rw-r--r--hw/arm/fsl-imx31.c26
-rw-r--r--hw/arm/fsl-imx6.c56
-rw-r--r--hw/arm/fsl-imx7.c97
-rw-r--r--hw/arm/iotkit.c74
-rw-r--r--hw/arm/msf2-soc.c15
-rw-r--r--hw/arm/stm32f205_soc.c28
-rw-r--r--hw/arm/xlnx-zynqmp.c61
-rw-r--r--hw/char/bcm2835_aux.c4
-rw-r--r--hw/core/sysbus.c8
-rw-r--r--hw/cpu/a15mpcore.c8
-rw-r--r--hw/cpu/a9mpcore.c18
-rw-r--r--hw/cpu/arm11mpcore.c14
-rw-r--r--hw/cpu/realview_mpcore.c8
-rw-r--r--hw/display/sm501.c4
-rw-r--r--hw/display/xlnx_dp.c8
-rw-r--r--hw/intc/arm_gic.c22
-rw-r--r--hw/intc/armv7m_nvic.c5
-rw-r--r--hw/intc/realview_gic.c7
-rw-r--r--hw/intc/xics.c14
-rw-r--r--hw/misc/aspeed_scu.c19
-rw-r--r--hw/misc/auxbus.c18
-rw-r--r--hw/net/fsl_etsec/etsec.c68
-rw-r--r--hw/net/fsl_etsec/etsec.h2
-rw-r--r--hw/net/fsl_etsec/registers.h10
-rw-r--r--hw/net/fsl_etsec/rings.c12
-rw-r--r--hw/ppc/sam460ex.c3
-rw-r--r--hw/ppc/spapr.c2
31 files changed, 334 insertions, 353 deletions
diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
index c5fbc654f2..9fe875cdb5 100644
--- a/hw/arm/allwinner-a10.c
+++ b/hw/arm/allwinner-a10.c
@@ -27,20 +27,19 @@ static void aw_a10_init(Object *obj)
{
AwA10State *s = AW_A10(obj);
- object_initialize(&s->cpu, sizeof(s->cpu), "cortex-a8-" TYPE_ARM_CPU);
- object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
+ object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu),
+ "cortex-a8-" TYPE_ARM_CPU, &error_abort, NULL);
- object_initialize(&s->intc, sizeof(s->intc), TYPE_AW_A10_PIC);
- qdev_set_parent_bus(DEVICE(&s->intc), sysbus_get_default());
+ sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
+ TYPE_AW_A10_PIC);
- object_initialize(&s->timer, sizeof(s->timer), TYPE_AW_A10_PIT);
- qdev_set_parent_bus(DEVICE(&s->timer), sysbus_get_default());
+ sysbus_init_child_obj(obj, "timer", &s->timer, sizeof(s->timer),
+ TYPE_AW_A10_PIT);
- object_initialize(&s->emac, sizeof(s->emac), TYPE_AW_EMAC);
- qdev_set_parent_bus(DEVICE(&s->emac), sysbus_get_default());
+ sysbus_init_child_obj(obj, "emac", &s->emac, sizeof(s->emac), TYPE_AW_EMAC);
- object_initialize(&s->sata, sizeof(s->sata), TYPE_ALLWINNER_AHCI);
- qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default());
+ sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata),
+ TYPE_ALLWINNER_AHCI);
}
static void aw_a10_realize(DeviceState *dev, Error **errp)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 9e00d4037c..6b07666057 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -134,14 +134,13 @@ static void armv7m_instance_init(Object *obj)
memory_region_init(&s->container, obj, "armv7m-container", UINT64_MAX);
- object_initialize(&s->nvic, sizeof(s->nvic), TYPE_NVIC);
- qdev_set_parent_bus(DEVICE(&s->nvic), sysbus_get_default());
+ sysbus_init_child_obj(obj, "nvnic", &s->nvic, sizeof(s->nvic), TYPE_NVIC);
object_property_add_alias(obj, "num-irq",
OBJECT(&s->nvic), "num-irq", &error_abort);
for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
- object_initialize(&s->bitband[i], sizeof(s->bitband[i]), TYPE_BITBAND);
- qdev_set_parent_bus(DEVICE(&s->bitband[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "bitband[*]", &s->bitband[i],
+ sizeof(s->bitband[i]), TYPE_BITBAND);
}
}
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 6805a7d7c8..6a09c339d3 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -51,25 +51,19 @@ static void bcm2836_init(Object *obj)
int n;
for (n = 0; n < BCM283X_NCPUS; n++) {
- object_initialize(&s->cpus[n], sizeof(s->cpus[n]),
- info->cpu_type);
- object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]),
- &error_abort);
+ object_initialize_child(obj, "cpu[*]", &s->cpus[n], sizeof(s->cpus[n]),
+ info->cpu_type, &error_abort, NULL);
}
- object_initialize(&s->control, sizeof(s->control), TYPE_BCM2836_CONTROL);
- object_property_add_child(obj, "control", OBJECT(&s->control), NULL);
- qdev_set_parent_bus(DEVICE(&s->control), sysbus_get_default());
+ sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
+ TYPE_BCM2836_CONTROL);
- object_initialize(&s->peripherals, sizeof(s->peripherals),
- TYPE_BCM2835_PERIPHERALS);
- object_property_add_child(obj, "peripherals", OBJECT(&s->peripherals),
- &error_abort);
+ sysbus_init_child_obj(obj, "peripherals", &s->peripherals,
+ sizeof(s->peripherals), TYPE_BCM2835_PERIPHERALS);
object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals),
"board-rev", &error_abort);
object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals),
"vcram-size", &error_abort);
- qdev_set_parent_bus(DEVICE(&s->peripherals), sysbus_get_default());
}
static void bcm2836_realize(DeviceState *dev, Error **errp)
@@ -185,6 +179,8 @@ static void bcm283x_class_init(ObjectClass *oc, void *data)
bc->info = data;
dc->realize = bcm2836_realize;
dc->props = bcm2836_props;
+ /* Reason: Must be wired up in code (see raspi_init() function) */
+ dc->user_creatable = false;
}
static const TypeInfo bcm283x_type_info = {
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index 37056f9e34..bd07040a4a 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -39,38 +39,36 @@ static void fsl_imx25_init(Object *obj)
object_initialize(&s->cpu, sizeof(s->cpu), "arm926-" TYPE_ARM_CPU);
- object_initialize(&s->avic, sizeof(s->avic), TYPE_IMX_AVIC);
- qdev_set_parent_bus(DEVICE(&s->avic), sysbus_get_default());
+ sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic),
+ TYPE_IMX_AVIC);
- object_initialize(&s->ccm, sizeof(s->ccm), TYPE_IMX25_CCM);
- qdev_set_parent_bus(DEVICE(&s->ccm), sysbus_get_default());
+ sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX25_CCM);
for (i = 0; i < FSL_IMX25_NUM_UARTS; i++) {
- object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_IMX_SERIAL);
- qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "uart[*]", &s->uart[i], sizeof(s->uart[i]),
+ TYPE_IMX_SERIAL);
}
for (i = 0; i < FSL_IMX25_NUM_GPTS; i++) {
- object_initialize(&s->gpt[i], sizeof(s->gpt[i]), TYPE_IMX25_GPT);
- qdev_set_parent_bus(DEVICE(&s->gpt[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "gpt[*]", &s->gpt[i], sizeof(s->gpt[i]),
+ TYPE_IMX25_GPT);
}
for (i = 0; i < FSL_IMX25_NUM_EPITS; i++) {
- object_initialize(&s->epit[i], sizeof(s->epit[i]), TYPE_IMX_EPIT);
- qdev_set_parent_bus(DEVICE(&s->epit[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "epit[*]", &s->epit[i], sizeof(s->epit[i]),
+ TYPE_IMX_EPIT);
}
- object_initialize(&s->fec, sizeof(s->fec), TYPE_IMX_FEC);
- qdev_set_parent_bus(DEVICE(&s->fec), sysbus_get_default());
+ sysbus_init_child_obj(obj, "fec", &s->fec, sizeof(s->fec), TYPE_IMX_FEC);
for (i = 0; i < FSL_IMX25_NUM_I2CS; i++) {
- object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);
- qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "i2c[*]", &s->i2c[i], sizeof(s->i2c[i]),
+ TYPE_IMX_I2C);
}
for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) {
- object_initialize(&s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO);
- qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "gpio[*]", &s->gpio[i], sizeof(s->gpio[i]),
+ TYPE_IMX_GPIO);
}
}
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index 891850cf18..ec8239a967 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -36,33 +36,31 @@ static void fsl_imx31_init(Object *obj)
object_initialize(&s->cpu, sizeof(s->cpu), "arm1136-" TYPE_ARM_CPU);
- object_initialize(&s->avic, sizeof(s->avic), TYPE_IMX_AVIC);
- qdev_set_parent_bus(DEVICE(&s->avic), sysbus_get_default());
+ sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic),
+ TYPE_IMX_AVIC);
- object_initialize(&s->ccm, sizeof(s->ccm), TYPE_IMX31_CCM);
- qdev_set_parent_bus(DEVICE(&s->ccm), sysbus_get_default());
+ sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX31_CCM);
for (i = 0; i < FSL_IMX31_NUM_UARTS; i++) {
- object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_IMX_SERIAL);
- qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "uart[*]", &s->uart[i], sizeof(s->uart[i]),
+ TYPE_IMX_SERIAL);
}
- object_initialize(&s->gpt, sizeof(s->gpt), TYPE_IMX31_GPT);
- qdev_set_parent_bus(DEVICE(&s->gpt), sysbus_get_default());
+ sysbus_init_child_obj(obj, "gpt", &s->gpt, sizeof(s->gpt), TYPE_IMX31_GPT);
for (i = 0; i < FSL_IMX31_NUM_EPITS; i++) {
- object_initialize(&s->epit[i], sizeof(s->epit[i]), TYPE_IMX_EPIT);
- qdev_set_parent_bus(DEVICE(&s->epit[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "epit[*]", &s->epit[i], sizeof(s->epit[i]),
+ TYPE_IMX_EPIT);
}
for (i = 0; i < FSL_IMX31_NUM_I2CS; i++) {
- object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);
- qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "i2c[*]", &s->i2c[i], sizeof(s->i2c[i]),
+ TYPE_IMX_I2C);
}
for (i = 0; i < FSL_IMX31_NUM_GPIOS; i++) {
- object_initialize(&s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO);
- qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "gpio[*]", &s->gpio[i], sizeof(s->gpio[i]),
+ TYPE_IMX_GPIO);
}
}
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 4f51bd9eb5..7b7b97f74c 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -38,73 +38,57 @@ static void fsl_imx6_init(Object *obj)
int i;
for (i = 0; i < MIN(smp_cpus, FSL_IMX6_NUM_CPUS); i++) {
- object_initialize(&s->cpu[i], sizeof(s->cpu[i]),
- "cortex-a9-" TYPE_ARM_CPU);
snprintf(name, NAME_SIZE, "cpu%d", i);
- object_property_add_child(obj, name, OBJECT(&s->cpu[i]), NULL);
+ object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
+ "cortex-a9-" TYPE_ARM_CPU, &error_abort, NULL);
}
- object_initialize(&s->a9mpcore, sizeof(s->a9mpcore), TYPE_A9MPCORE_PRIV);
- qdev_set_parent_bus(DEVICE(&s->a9mpcore), sysbus_get_default());
- object_property_add_child(obj, "a9mpcore", OBJECT(&s->a9mpcore), NULL);
+ sysbus_init_child_obj(obj, "a9mpcore", &s->a9mpcore, sizeof(s->a9mpcore),
+ TYPE_A9MPCORE_PRIV);
- object_initialize(&s->ccm, sizeof(s->ccm), TYPE_IMX6_CCM);
- qdev_set_parent_bus(DEVICE(&s->ccm), sysbus_get_default());
- object_property_add_child(obj, "ccm", OBJECT(&s->ccm), NULL);
+ sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX6_CCM);
- object_initialize(&s->src, sizeof(s->src), TYPE_IMX6_SRC);
- qdev_set_parent_bus(DEVICE(&s->src), sysbus_get_default());
- object_property_add_child(obj, "src", OBJECT(&s->src), NULL);
+ sysbus_init_child_obj(obj, "src", &s->src, sizeof(s->src), TYPE_IMX6_SRC);
for (i = 0; i < FSL_IMX6_NUM_UARTS; i++) {
- object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_IMX_SERIAL);
- qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
snprintf(name, NAME_SIZE, "uart%d", i + 1);
- object_property_add_child(obj, name, OBJECT(&s->uart[i]), NULL);
+ sysbus_init_child_obj(obj, name, &s->uart[i], sizeof(s->uart[i]),
+ TYPE_IMX_SERIAL);
}
- object_initialize(&s->gpt, sizeof(s->gpt), TYPE_IMX6_GPT);
- qdev_set_parent_bus(DEVICE(&s->gpt), sysbus_get_default());
- object_property_add_child(obj, "gpt", OBJECT(&s->gpt), NULL);
+ sysbus_init_child_obj(obj, "gpt", &s->gpt, sizeof(s->gpt), TYPE_IMX6_GPT);
for (i = 0; i < FSL_IMX6_NUM_EPITS; i++) {
- object_initialize(&s->epit[i], sizeof(s->epit[i]), TYPE_IMX_EPIT);
- qdev_set_parent_bus(DEVICE(&s->epit[i]), sysbus_get_default());
snprintf(name, NAME_SIZE, "epit%d", i + 1);
- object_property_add_child(obj, name, OBJECT(&s->epit[i]), NULL);
+ sysbus_init_child_obj(obj, name, &s->epit[i], sizeof(s->epit[i]),
+ TYPE_IMX_EPIT);
}
for (i = 0; i < FSL_IMX6_NUM_I2CS; i++) {
- object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);
- qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());
snprintf(name, NAME_SIZE, "i2c%d", i + 1);
- object_property_add_child(obj, name, OBJECT(&s->i2c[i]), NULL);
+ sysbus_init_child_obj(obj, name, &s->i2c[i], sizeof(s->i2c[i]),
+ TYPE_IMX_I2C);
}
for (i = 0; i < FSL_IMX6_NUM_GPIOS; i++) {
- object_initialize(&s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO);
- qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus_get_default());
snprintf(name, NAME_SIZE, "gpio%d", i + 1);
- object_property_add_child(obj, name, OBJECT(&s->gpio[i]), NULL);
+ sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]),
+ TYPE_IMX_GPIO);
}
for (i = 0; i < FSL_IMX6_NUM_ESDHCS; i++) {
- object_initialize(&s->esdhc[i], sizeof(s->esdhc[i]), TYPE_IMX_USDHC);
- qdev_set_parent_bus(DEVICE(&s->esdhc[i]), sysbus_get_default());
snprintf(name, NAME_SIZE, "sdhc%d", i + 1);
- object_property_add_child(obj, name, OBJECT(&s->esdhc[i]), NULL);
+ sysbus_init_child_obj(obj, name, &s->esdhc[i], sizeof(s->esdhc[i]),
+ TYPE_IMX_USDHC);
}
for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) {
- object_initialize(&s->spi[i], sizeof(s->spi[i]), TYPE_IMX_SPI);
- qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());
snprintf(name, NAME_SIZE, "spi%d", i + 1);
- object_property_add_child(obj, name, OBJECT(&s->spi[i]), NULL);
+ sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]),
+ TYPE_IMX_SPI);
}
- object_initialize(&s->eth, sizeof(s->eth), TYPE_IMX_ENET);
- qdev_set_parent_bus(DEVICE(&s->eth), sysbus_get_default());
- object_property_add_child(obj, "eth", OBJECT(&s->eth), NULL);
+ sysbus_init_child_obj(obj, "eth", &s->eth, sizeof(s->eth), TYPE_IMX_ENET);
}
static void fsl_imx6_realize(DeviceState *dev, Error **errp)
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index 44fde03cbe..d5e26855a5 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -30,157 +30,126 @@
static void fsl_imx7_init(Object *obj)
{
- BusState *sysbus = sysbus_get_default();
FslIMX7State *s = FSL_IMX7(obj);
char name[NAME_SIZE];
int i;
for (i = 0; i < MIN(smp_cpus, FSL_IMX7_NUM_CPUS); i++) {
- object_initialize(&s->cpu[i], sizeof(s->cpu[i]),
- ARM_CPU_TYPE_NAME("cortex-a7"));
snprintf(name, NAME_SIZE, "cpu%d", i);
- object_property_add_child(obj, name, OBJECT(&s->cpu[i]),
- &error_fatal);
+ object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
+ ARM_CPU_TYPE_NAME("cortex-a7"), &error_abort,
+ NULL);
}
/*
* A7MPCORE
*/
- object_initialize(&s->a7mpcore, sizeof(s->a7mpcore), TYPE_A15MPCORE_PRIV);
- qdev_set_parent_bus(DEVICE(&s->a7mpcore), sysbus);
- object_property_add_child(obj, "a7mpcore",
- OBJECT(&s->a7mpcore), &error_fatal);
+ sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore, sizeof(s->a7mpcore),
+ TYPE_A15MPCORE_PRIV);
/*
* GPIOs 1 to 7
*/
for (i = 0; i < FSL_IMX7_NUM_GPIOS; i++) {
- object_initialize(&s->gpio[i], sizeof(s->gpio[i]),
- TYPE_IMX_GPIO);
- qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus);
snprintf(name, NAME_SIZE, "gpio%d", i);
- object_property_add_child(obj, name,
- OBJECT(&s->gpio[i]), &error_fatal);
+ sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]),
+ TYPE_IMX_GPIO);
}
/*
* GPT1, 2, 3, 4
*/
for (i = 0; i < FSL_IMX7_NUM_GPTS; i++) {
- object_initialize(&s->gpt[i], sizeof(s->gpt[i]), TYPE_IMX7_GPT);
- qdev_set_parent_bus(DEVICE(&s->gpt[i]), sysbus);
snprintf(name, NAME_SIZE, "gpt%d", i);
- object_property_add_child(obj, name, OBJECT(&s->gpt[i]),
- &error_fatal);
+ sysbus_init_child_obj(obj, name, &s->gpt[i], sizeof(s->gpt[i]),
+ TYPE_IMX7_GPT);
}
/*
* CCM
*/
- object_initialize(&s->ccm, sizeof(s->ccm), TYPE_IMX7_CCM);
- qdev_set_parent_bus(DEVICE(&s->ccm), sysbus);
- object_property_add_child(obj, "ccm", OBJECT(&s->ccm), &error_fatal);
+ sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX7_CCM);
/*
* Analog
*/
- object_initialize(&s->analog, sizeof(s->analog), TYPE_IMX7_ANALOG);
- qdev_set_parent_bus(DEVICE(&s->analog), sysbus);
- object_property_add_child(obj, "analog", OBJECT(&s->analog), &error_fatal);
+ sysbus_init_child_obj(obj, "analog", &s->analog, sizeof(s->analog),
+ TYPE_IMX7_ANALOG);
/*
* GPCv2
*/
- object_initialize(&s->gpcv2, sizeof(s->gpcv2), TYPE_IMX_GPCV2);
- qdev_set_parent_bus(DEVICE(&s->gpcv2), sysbus);
- object_property_add_child(obj, "gpcv2", OBJECT(&s->gpcv2), &error_fatal);
+ sysbus_init_child_obj(obj, "gpcv2", &s->gpcv2, sizeof(s->gpcv2),
+ TYPE_IMX_GPCV2);
for (i = 0; i < FSL_IMX7_NUM_ECSPIS; i++) {
- object_initialize(&s->spi[i], sizeof(s->spi[i]), TYPE_IMX_SPI);
- qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());
snprintf(name, NAME_SIZE, "spi%d", i + 1);
- object_property_add_child(obj, name, OBJECT(&s->spi[i]), NULL);
+ sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]),
+ TYPE_IMX_SPI);
}
for (i = 0; i < FSL_IMX7_NUM_I2CS; i++) {
- object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);
- qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());
snprintf(name, NAME_SIZE, "i2c%d", i + 1);
- object_property_add_child(obj, name, OBJECT(&s->i2c[i]), NULL);
+ sysbus_init_child_obj(obj, name, &s->i2c[i], sizeof(s->i2c[i]),
+ TYPE_IMX_I2C);
}
/*
* UART
*/
for (i = 0; i < FSL_IMX7_NUM_UARTS; i++) {
- object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_IMX_SERIAL);
- qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus);
snprintf(name, NAME_SIZE, "uart%d", i);
- object_property_add_child(obj, name, OBJECT(&s->uart[i]),
- &error_fatal);
+ sysbus_init_child_obj(obj, name, &s->uart[i], sizeof(s->uart[i]),
+ TYPE_IMX_SERIAL);
}
/*
* Ethernet
*/
for (i = 0; i < FSL_IMX7_NUM_ETHS; i++) {
- object_initialize(&s->eth[i], sizeof(s->eth[i]), TYPE_IMX_ENET);
- qdev_set_parent_bus(DEVICE(&s->eth[i]), sysbus);
snprintf(name, NAME_SIZE, "eth%d", i);
- object_property_add_child(obj, name, OBJECT(&s->eth[i]),
- &error_fatal);
+ sysbus_init_child_obj(obj, name, &s->eth[i], sizeof(s->eth[i]),
+ TYPE_IMX_ENET);
}
/*
* SDHCI
*/
for (i = 0; i < FSL_IMX7_NUM_USDHCS; i++) {
- object_initialize(&s->usdhc[i], sizeof(s->usdhc[i]),
- TYPE_IMX_USDHC);
- qdev_set_parent_bus(DEVICE(&s->usdhc[i]), sysbus);
snprintf(name, NAME_SIZE, "usdhc%d", i);
- object_property_add_child(obj, name, OBJECT(&s->usdhc[i]),
- &error_fatal);
+ sysbus_init_child_obj(obj, name, &s->usdhc[i], sizeof(s->usdhc[i]),
+ TYPE_IMX_USDHC);
}
/*
* SNVS
*/
- object_initialize(&s->snvs, sizeof(s->snvs), TYPE_IMX7_SNVS);
- qdev_set_parent_bus(DEVICE(&s->snvs), sysbus);
- object_property_add_child(obj, "snvs", OBJECT(&s->snvs), &error_fatal);
+ sysbus_init_child_obj(obj, "snvs", &s->snvs, sizeof(s->snvs),
+ TYPE_IMX7_SNVS);
/*
* Watchdog
*/
for (i = 0; i < FSL_IMX7_NUM_WDTS; i++) {
- object_initialize(&s->wdt[i], sizeof(s->wdt[i]), TYPE_IMX2_WDT);
- qdev_set_parent_bus(DEVICE(&s->wdt[i]), sysbus);
snprintf(name, NAME_SIZE, "wdt%d", i);
- object_property_add_child(obj, name, OBJECT(&s->wdt[i]),
- &error_fatal);
+ sysbus_init_child_obj(obj, name, &s->wdt[i], sizeof(s->wdt[i]),
+ TYPE_IMX2_WDT);
}
/*
* GPR
*/
- object_initialize(&s->gpr, sizeof(s->gpr), TYPE_IMX7_GPR);
- qdev_set_parent_bus(DEVICE(&s->gpr), sysbus);
- object_property_add_child(obj, "gpr", OBJECT(&s->gpr), &error_fatal);
+ sysbus_init_child_obj(obj, "gpr", &s->gpr, sizeof(s->gpr), TYPE_IMX7_GPR);
- object_initialize(&s->pcie, sizeof(s->pcie), TYPE_DESIGNWARE_PCIE_HOST);
- qdev_set_parent_bus(DEVICE(&s->pcie), sysbus);
- object_property_add_child(obj, "pcie", OBJECT(&s->pcie), &error_fatal);
+ sysbus_init_child_obj(obj, "pcie", &s->pcie, sizeof(s->pcie),
+ TYPE_DESIGNWARE_PCIE_HOST);
for (i = 0; i < FSL_IMX7_NUM_USBS; i++) {
- object_initialize(&s->usb[i],
- sizeof(s->usb[i]), TYPE_CHIPIDEA);
- qdev_set_parent_bus(DEVICE(&s->usb[i]), sysbus);
snprintf(name, NAME_SIZE, "usb%d", i);
- object_property_add_child(obj, name,
- OBJECT(&s->usb[i]), &error_fatal);
+ sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]),
+ TYPE_CHIPIDEA);
}
}
diff --git a/hw/arm/iotkit.c b/hw/arm/iotkit.c
index 133d5bb34f..c76d3ed743 100644
--- a/hw/arm/iotkit.c
+++ b/hw/arm/iotkit.c
@@ -30,15 +30,6 @@ static void make_alias(IoTKit *s, MemoryRegion *mr, const char *name,
memory_region_add_subregion_overlap(&s->container, base, mr, -1500);
}
-static void init_sysbus_child(Object *parent, const char *childname,
- void *child, size_t childsize,
- const char *childtype)
-{
- object_initialize(child, childsize, childtype);
- object_property_add_child(parent, childname, OBJECT(child), &error_abort);
- qdev_set_parent_bus(DEVICE(child), sysbus_get_default());
-}
-
static void irq_status_forwarder(void *opaque, int n, int level)
{
qemu_irq destirq = opaque;
@@ -119,53 +110,52 @@ static void iotkit_init(Object *obj)
memory_region_init(&s->container, obj, "iotkit-container", UINT64_MAX);
- init_sysbus_child(obj, "armv7m", &s->armv7m, sizeof(s->armv7m),
- TYPE_ARMV7M);
+ sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m),
+ TYPE_ARMV7M);
qdev_prop_set_string(DEVICE(&s->armv7m), "cpu-type",
ARM_CPU_TYPE_NAME("cortex-m33"));
- init_sysbus_child(obj, "secctl", &s->secctl, sizeof(s->secctl),
- TYPE_IOTKIT_SECCTL);
- init_sysbus_child(obj, "apb-ppc0", &s->apb_ppc0, sizeof(s->apb_ppc0),
- TYPE_TZ_PPC);
- init_sysbus_child(obj, "apb-ppc1", &s->apb_ppc1, sizeof(s->apb_ppc1),
- TYPE_TZ_PPC);
- init_sysbus_child(obj, "mpc", &s->mpc, sizeof(s->mpc), TYPE_TZ_MPC);
- object_initialize(&s->mpc_irq_orgate, sizeof(s->mpc_irq_orgate),
- TYPE_OR_IRQ);
- object_property_add_child(obj, "mpc-irq-orgate",
- OBJECT(&s->mpc_irq_orgate), &error_abort);
+ sysbus_init_child_obj(obj, "secctl", &s->secctl, sizeof(s->secctl),
+ TYPE_IOTKIT_SECCTL);
+ sysbus_init_child_obj(obj, "apb-ppc0", &s->apb_ppc0, sizeof(s->apb_ppc0),
+ TYPE_TZ_PPC);
+ sysbus_init_child_obj(obj, "apb-ppc1", &s->apb_ppc1, sizeof(s->apb_ppc1),
+ TYPE_TZ_PPC);
+ sysbus_init_child_obj(obj, "mpc", &s->mpc, sizeof(s->mpc), TYPE_TZ_MPC);
+ object_initialize_child(obj, "mpc-irq-orgate", &s->mpc_irq_orgate,
+ sizeof(s->mpc_irq_orgate), TYPE_OR_IRQ,
+ &error_abort, NULL);
+
for (i = 0; i < ARRAY_SIZE(s->mpc_irq_splitter); i++) {
char *name = g_strdup_printf("mpc-irq-splitter-%d", i);
SplitIRQ *splitter = &s->mpc_irq_splitter[i];
- object_initialize(splitter, sizeof(*splitter), TYPE_SPLIT_IRQ);
- object_property_add_child(obj, name, OBJECT(splitter), &error_abort);
+ object_initialize_child(obj, name, splitter, sizeof(*splitter),
+ TYPE_SPLIT_IRQ, &error_abort, NULL);
g_free(name);
}
- init_sysbus_child(obj, "timer0", &s->timer0, sizeof(s->timer0),
- TYPE_CMSDK_APB_TIMER);
- init_sysbus_child(obj, "timer1", &s->timer1, sizeof(s->timer1),
- TYPE_CMSDK_APB_TIMER);
- init_sysbus_child(obj, "dualtimer", &s->dualtimer, sizeof(s->dualtimer),
- TYPE_UNIMPLEMENTED_DEVICE);
- object_initialize(&s->ppc_irq_orgate, sizeof(s->ppc_irq_orgate),
- TYPE_OR_IRQ);
- object_property_add_child(obj, "ppc-irq-orgate",
- OBJECT(&s->ppc_irq_orgate), &error_abort);
- object_initialize(&s->sec_resp_splitter, sizeof(s->sec_resp_splitter),
- TYPE_SPLIT_IRQ);
- object_property_add_child(obj, "sec-resp-splitter",
- OBJECT(&s->sec_resp_splitter), &error_abort);
+ sysbus_init_child_obj(obj, "timer0", &s->timer0, sizeof(s->timer0),
+ TYPE_CMSDK_APB_TIMER);
+ sysbus_init_child_obj(obj, "timer1", &s->timer1, sizeof(s->timer1),
+ TYPE_CMSDK_APB_TIMER);
+ sysbus_init_child_obj(obj, "dualtimer", &s->dualtimer, sizeof(s->dualtimer),
+ TYPE_UNIMPLEMENTED_DEVICE);
+ object_initialize_child(obj, "ppc-irq-orgate", &s->ppc_irq_orgate,
+ sizeof(s->ppc_irq_orgate), TYPE_OR_IRQ,
+ &error_abort, NULL);
+ object_initialize_child(obj, "sec-resp-splitter", &s->sec_resp_splitter,
+ sizeof(s->sec_resp_splitter), TYPE_SPLIT_IRQ,
+ &error_abort, NULL);
for (i = 0; i < ARRAY_SIZE(s->ppc_irq_splitter); i++) {
char *name = g_strdup_printf("ppc-irq-splitter-%d", i);
SplitIRQ *splitter = &s->ppc_irq_splitter[i];
- object_initialize(splitter, sizeof(*splitter), TYPE_SPLIT_IRQ);
- object_property_add_child(obj, name, OBJECT(splitter), &error_abort);
+ object_initialize_child(obj, name, splitter, sizeof(*splitter),
+ TYPE_SPLIT_IRQ, &error_abort, NULL);
+ g_free(name);
}
- init_sysbus_child(obj, "s32ktimer", &s->s32ktimer, sizeof(s->s32ktimer),
- TYPE_UNIMPLEMENTED_DEVICE);
+ sysbus_init_child_obj(obj, "s32ktimer", &s->s32ktimer, sizeof(s->s32ktimer),
+ TYPE_UNIMPLEMENTED_DEVICE);
}
static void iotkit_exp_irq(void *opaque, int n, int level)
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index edb3ba824f..dbefade644 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -68,19 +68,18 @@ static void m2sxxx_soc_initfn(Object *obj)
MSF2State *s = MSF2_SOC(obj);
int i;
- object_initialize(&s->armv7m, sizeof(s->armv7m), TYPE_ARMV7M);
- qdev_set_parent_bus(DEVICE(&s->armv7m), sysbus_get_default());
+ sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m),
+ TYPE_ARMV7M);
- object_initialize(&s->sysreg, sizeof(s->sysreg), TYPE_MSF2_SYSREG);
- qdev_set_parent_bus(DEVICE(&s->sysreg), sysbus_get_default());
+ sysbus_init_child_obj(obj, "sysreg", &s->sysreg, sizeof(s->sysreg),
+ TYPE_MSF2_SYSREG);
- object_initialize(&s->timer, sizeof(s->timer), TYPE_MSS_TIMER);
- qdev_set_parent_bus(DEVICE(&s->timer), sysbus_get_default());
+ sysbus_init_child_obj(obj, "timer", &s->timer, sizeof(s->timer),
+ TYPE_MSS_TIMER);
for (i = 0; i < MSF2_NUM_SPIS; i++) {
- object_initialize(&s->spi[i], sizeof(s->spi[i]),
+ sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]),
TYPE_MSS_SPI);
- qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());
}
}
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index 2b2135d382..c486d06a8b 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -49,36 +49,32 @@ static void stm32f205_soc_initfn(Object *obj)
STM32F205State *s = STM32F205_SOC(obj);
int i;
- object_initialize(&s->armv7m, sizeof(s->armv7m), TYPE_ARMV7M);
- qdev_set_parent_bus(DEVICE(&s->armv7m), sysbus_get_default());
+ sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m),
+ TYPE_ARMV7M);
- object_initialize(&s->syscfg, sizeof(s->syscfg), TYPE_STM32F2XX_SYSCFG);
- qdev_set_parent_bus(DEVICE(&s->syscfg), sysbus_get_default());
+ sysbus_init_child_obj(obj, "syscfg", &s->syscfg, sizeof(s->syscfg),
+ TYPE_STM32F2XX_SYSCFG);
for (i = 0; i < STM_NUM_USARTS; i++) {
- object_initialize(&s->usart[i], sizeof(s->usart[i]),
- TYPE_STM32F2XX_USART);
- qdev_set_parent_bus(DEVICE(&s->usart[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "usart[*]", &s->usart[i],
+ sizeof(s->usart[i]), TYPE_STM32F2XX_USART);
}
for (i = 0; i < STM_NUM_TIMERS; i++) {
- object_initialize(&s->timer[i], sizeof(s->timer[i]),
- TYPE_STM32F2XX_TIMER);
- qdev_set_parent_bus(DEVICE(&s->timer[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "timer[*]", &s->timer[i],
+ sizeof(s->timer[i]), TYPE_STM32F2XX_TIMER);
}
s->adc_irqs = OR_IRQ(object_new(TYPE_OR_IRQ));
for (i = 0; i < STM_NUM_ADCS; i++) {
- object_initialize(&s->adc[i], sizeof(s->adc[i]),
- TYPE_STM32F2XX_ADC);
- qdev_set_parent_bus(DEVICE(&s->adc[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "adc[*]", &s->adc[i], sizeof(s->adc[i]),
+ TYPE_STM32F2XX_ADC);
}
for (i = 0; i < STM_NUM_SPIS; i++) {
- object_initialize(&s->spi[i], sizeof(s->spi[i]),
- TYPE_STM32F2XX_SPI);
- qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]),
+ TYPE_STM32F2XX_SPI);
}
}
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 29df35fb75..8de4868eb9 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -166,64 +166,59 @@ static void xlnx_zynqmp_init(Object *obj)
int num_apus = MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
for (i = 0; i < num_apus; i++) {
- object_initialize(&s->apu_cpu[i], sizeof(s->apu_cpu[i]),
- "cortex-a53-" TYPE_ARM_CPU);
- object_property_add_child(obj, "apu-cpu[*]", OBJECT(&s->apu_cpu[i]),
- &error_abort);
+ object_initialize_child(obj, "apu-cpu[*]", &s->apu_cpu[i],
+ sizeof(s->apu_cpu[i]),
+ "cortex-a53-" TYPE_ARM_CPU, &error_abort, NULL);
}
- object_initialize(&s->gic, sizeof(s->gic), gic_class_name());
- qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default());
+ sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic),
+ gic_class_name());
for (i = 0; i < XLNX_ZYNQMP_NUM_GEMS; i++) {
- object_initialize(&s->gem[i], sizeof(s->gem[i]), TYPE_CADENCE_GEM);
- qdev_set_parent_bus(DEVICE(&s->gem[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "gem[*]", &s->gem[i], sizeof(s->gem[i]),
+ TYPE_CADENCE_GEM);
}
for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) {
- object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_CADENCE_UART);
- qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "uart[*]", &s->uart[i], sizeof(s->uart[i]),
+ TYPE_CADENCE_UART);
}
- object_initialize(&s->sata, sizeof(s->sata), TYPE_SYSBUS_AHCI);
- qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default());
+ sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata),
+ TYPE_SYSBUS_AHCI);
for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
- object_initialize(&s->sdhci[i], sizeof(s->sdhci[i]),
- TYPE_SYSBUS_SDHCI);
- qdev_set_parent_bus(DEVICE(&s->sdhci[i]),
- sysbus_get_default());
+ sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci[i],
+ sizeof(s->sdhci[i]), TYPE_SYSBUS_SDHCI);
}
for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
- object_initialize(&s->spi[i], sizeof(s->spi[i]),
- TYPE_XILINX_SPIPS);
- qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]),
+ TYPE_XILINX_SPIPS);
}
- object_initialize(&s->qspi, sizeof(s->qspi), TYPE_XLNX_ZYNQMP_QSPIPS);
- qdev_set_parent_bus(DEVICE(&s->qspi), sysbus_get_default());
+ sysbus_init_child_obj(obj, "qspi", &s->qspi, sizeof(s->qspi),
+ TYPE_XLNX_ZYNQMP_QSPIPS);
- object_initialize(&s->dp, sizeof(s->dp), TYPE_XLNX_DP);
- qdev_set_parent_bus(DEVICE(&s->dp), sysbus_get_default());
+ sysbus_init_child_obj(obj, "xxxdp", &s->dp, sizeof(s->dp), TYPE_XLNX_DP);
- object_initialize(&s->dpdma, sizeof(s->dpdma), TYPE_XLNX_DPDMA);
- qdev_set_parent_bus(DEVICE(&s->dpdma), sysbus_get_default());
+ sysbus_init_child_obj(obj, "dp-dma", &s->dpdma, sizeof(s->dpdma),
+ TYPE_XLNX_DPDMA);
- object_initialize(&s->ipi, sizeof(s->ipi), TYPE_XLNX_ZYNQMP_IPI);
- qdev_set_parent_bus(DEVICE(&s->ipi), sysbus_get_default());
+ sysbus_init_child_obj(obj, "ipi", &s->ipi, sizeof(s->ipi),
+ TYPE_XLNX_ZYNQMP_IPI);
- object_initialize(&s->rtc, sizeof(s->rtc), TYPE_XLNX_ZYNQMP_RTC);
- qdev_set_parent_bus(DEVICE(&s->rtc), sysbus_get_default());
+ sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc),
+ TYPE_XLNX_ZYNQMP_RTC);
for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {
- object_initialize(&s->gdma[i], sizeof(s->gdma[i]), TYPE_XLNX_ZDMA);
- qdev_set_parent_bus(DEVICE(&s->gdma[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "gdma[*]", &s->gdma[i], sizeof(s->gdma[i]),
+ TYPE_XLNX_ZDMA);
}
for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {
- object_initialize(&s->adma[i], sizeof(s->adma[i]), TYPE_XLNX_ZDMA);
- qdev_set_parent_bus(DEVICE(&s->adma[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "adma[*]", &s->adma[i], sizeof(s->adma[i]),
+ TYPE_XLNX_ZDMA);
}
}
diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c
index 370dc7e296..0364596c55 100644
--- a/hw/char/bcm2835_aux.c
+++ b/hw/char/bcm2835_aux.c
@@ -39,8 +39,8 @@
#define AUX_MU_BAUD_REG 0x68
/* bits in IER/IIR registers */
-#define TX_INT 0x1
-#define RX_INT 0x2
+#define RX_INT 0x1
+#define TX_INT 0x2
static void bcm2835_aux_update(BCM2835AuxState *s)
{
diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c
index ecfb0cfc0e..3c8e53b188 100644
--- a/hw/core/sysbus.c
+++ b/hw/core/sysbus.c
@@ -376,6 +376,14 @@ BusState *sysbus_get_default(void)
return main_system_bus;
}
+void sysbus_init_child_obj(Object *parent, const char *childname, void *child,
+ size_t childsize, const char *childtype)
+{
+ object_initialize_child(parent, childname, child, childsize, childtype,
+ &error_abort, NULL);
+ qdev_set_parent_bus(DEVICE(child), sysbus_get_default());
+}
+
static void sysbus_register_types(void)
{
type_register_static(&system_bus_info);
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index bc05152fd3..43c1079493 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -35,15 +35,13 @@ static void a15mp_priv_initfn(Object *obj)
{
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
A15MPPrivState *s = A15MPCORE_PRIV(obj);
- DeviceState *gicdev;
memory_region_init(&s->container, obj, "a15mp-priv-container", 0x8000);
sysbus_init_mmio(sbd, &s->container);
- object_initialize(&s->gic, sizeof(s->gic), gic_class_name());
- gicdev = DEVICE(&s->gic);
- qdev_set_parent_bus(gicdev, sysbus_get_default());
- qdev_prop_set_uint32(gicdev, "revision", 2);
+ sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic),
+ gic_class_name());
+ qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2);
}
static void a15mp_priv_realize(DeviceState *dev, Error **errp)
diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c
index f17f292090..a5b867872c 100644
--- a/hw/cpu/a9mpcore.c
+++ b/hw/cpu/a9mpcore.c
@@ -27,20 +27,18 @@ static void a9mp_priv_initfn(Object *obj)
memory_region_init(&s->container, obj, "a9mp-priv-container", 0x2000);
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->container);
- object_initialize(&s->scu, sizeof(s->scu), TYPE_A9_SCU);
- qdev_set_parent_bus(DEVICE(&s->scu), sysbus_get_default());
+ sysbus_init_child_obj(obj, "scu", &s->scu, sizeof(s->scu), TYPE_A9_SCU);
- object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC);
- qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default());
+ sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), TYPE_ARM_GIC);
- object_initialize(&s->gtimer, sizeof(s->gtimer), TYPE_A9_GTIMER);
- qdev_set_parent_bus(DEVICE(&s->gtimer), sysbus_get_default());
+ sysbus_init_child_obj(obj, "gtimer", &s->gtimer, sizeof(s->gtimer),
+ TYPE_A9_GTIMER);
- object_initialize(&s->mptimer, sizeof(s->mptimer), TYPE_ARM_MPTIMER);
- qdev_set_parent_bus(DEVICE(&s->mptimer), sysbus_get_default());
+ sysbus_init_child_obj(obj, "mptimer", &s->mptimer, sizeof(s->mptimer),
+ TYPE_ARM_MPTIMER);
- object_initialize(&s->wdt, sizeof(s->wdt), TYPE_ARM_MPTIMER);
- qdev_set_parent_bus(DEVICE(&s->wdt), sysbus_get_default());
+ sysbus_init_child_obj(obj, "wdt", &s->wdt, sizeof(s->wdt),
+ TYPE_ARM_MPTIMER);
}
static void a9mp_priv_realize(DeviceState *dev, Error **errp)
diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c
index eb244658b9..8aead3794e 100644
--- a/hw/cpu/arm11mpcore.c
+++ b/hw/cpu/arm11mpcore.c
@@ -121,19 +121,17 @@ static void mpcore_priv_initfn(Object *obj)
"mpcore-priv-container", 0x2000);
sysbus_init_mmio(sbd, &s->container);
- object_initialize(&s->scu, sizeof(s->scu), TYPE_ARM11_SCU);
- qdev_set_parent_bus(DEVICE(&s->scu), sysbus_get_default());
+ sysbus_init_child_obj(obj, "scu", &s->scu, sizeof(s->scu), TYPE_ARM11_SCU);
- object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC);
- qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default());
+ sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), TYPE_ARM_GIC);
/* Request the legacy 11MPCore GIC behaviour: */
qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 0);
- object_initialize(&s->mptimer, sizeof(s->mptimer), TYPE_ARM_MPTIMER);
- qdev_set_parent_bus(DEVICE(&s->mptimer), sysbus_get_default());
+ sysbus_init_child_obj(obj, "mptimer", &s->mptimer, sizeof(s->mptimer),
+ TYPE_ARM_MPTIMER);
- object_initialize(&s->wdtimer, sizeof(s->wdtimer), TYPE_ARM_MPTIMER);
- qdev_set_parent_bus(DEVICE(&s->wdtimer), sysbus_get_default());
+ sysbus_init_child_obj(obj, "wdtimer", &s->wdtimer, sizeof(s->wdtimer),
+ TYPE_ARM_MPTIMER);
}
static Property mpcore_priv_properties[] = {
diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c
index 39d4ebeb1d..9d3f8378fb 100644
--- a/hw/cpu/realview_mpcore.c
+++ b/hw/cpu/realview_mpcore.c
@@ -101,14 +101,14 @@ static void mpcore_rirq_init(Object *obj)
SysBusDevice *privbusdev;
int i;
- object_initialize(&s->priv, sizeof(s->priv), TYPE_ARM11MPCORE_PRIV);
- qdev_set_parent_bus(DEVICE(&s->priv), sysbus_get_default());
+ sysbus_init_child_obj(obj, "a11priv", &s->priv, sizeof(s->priv),
+ TYPE_ARM11MPCORE_PRIV);
privbusdev = SYS_BUS_DEVICE(&s->priv);
sysbus_init_mmio(sbd, sysbus_mmio_get_region(privbusdev, 0));
for (i = 0; i < 4; i++) {
- object_initialize(&s->gic[i], sizeof(s->gic[i]), TYPE_REALVIEW_GIC);
- qdev_set_parent_bus(DEVICE(&s->gic[i]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "gic[*]", &s->gic[i], sizeof(s->gic[i]),
+ TYPE_REALVIEW_GIC);
}
}
diff --git a/hw/display/sm501.c b/hw/display/sm501.c
index 3661a89f60..874260a143 100644
--- a/hw/display/sm501.c
+++ b/hw/display/sm501.c
@@ -1024,7 +1024,7 @@ static void sm501_i2c_write(void *opaque, hwaddr addr, uint64_t value,
if (res) {
SM501_DPRINTF("sm501 i2c : transfer failed"
" i=%d, res=%d\n", i, res);
- s->i2c_status |= (res ? SM501_I2C_STATUS_ERROR : 0);
+ s->i2c_status |= SM501_I2C_STATUS_ERROR;
return;
}
}
@@ -1235,6 +1235,7 @@ static void sm501_disp_ctrl_write(void *opaque, hwaddr addr,
if (value & 0x8000000) {
qemu_log_mask(LOG_UNIMP, "Panel external memory not supported\n");
}
+ s->do_full_update = true;
break;
case SM501_DC_PANEL_FB_OFFSET:
s->dc_panel_fb_offset = value & 0x3FF03FF0;
@@ -1298,6 +1299,7 @@ static void sm501_disp_ctrl_write(void *opaque, hwaddr addr,
if (value & 0x8000000) {
qemu_log_mask(LOG_UNIMP, "CRT external memory not supported\n");
}
+ s->do_full_update = true;
break;
case SM501_DC_CRT_FB_OFFSET:
s->dc_crt_fb_offset = value & 0x3FF03FF0;
diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c
index 51301220e8..6439bd05ef 100644
--- a/hw/display/xlnx_dp.c
+++ b/hw/display/xlnx_dp.c
@@ -1234,9 +1234,12 @@ static void xlnx_dp_init(Object *obj)
/*
* Initialize DPCD and EDID..
*/
- s->dpcd = DPCD(aux_create_slave(s->aux_bus, "dpcd", 0x00000));
+ s->dpcd = DPCD(aux_create_slave(s->aux_bus, "dpcd"));
+ object_property_add_child(OBJECT(s), "dpcd", OBJECT(s->dpcd), NULL);
+
s->edid = I2CDDC(qdev_create(BUS(aux_get_i2c_bus(s->aux_bus)), "i2c-ddc"));
i2c_set_slave_address(I2C_SLAVE(s->edid), 0x50);
+ object_property_add_child(OBJECT(s), "edid", OBJECT(s->edid), NULL);
fifo8_create(&s->rx_fifo, 16);
fifo8_create(&s->tx_fifo, 16);
@@ -1248,6 +1251,9 @@ static void xlnx_dp_realize(DeviceState *dev, Error **errp)
DisplaySurface *surface;
struct audsettings as;
+ qdev_init_nofail(DEVICE(s->dpcd));
+ aux_map_slave(AUX_SLAVE(s->dpcd), 0x0000);
+
s->console = graphic_console_init(dev, 0, &xlnx_dp_gfx_ops, s);
surface = qemu_console_surface(s->console);
xlnx_dpdma_set_host_data_location(s->dpdma, DP_GRAPHIC_DMA_CHANNEL,
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index ea0323f969..34dc84ae81 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -543,7 +543,21 @@ static bool gic_eoi_split(GICState *s, int cpu, MemTxAttrs attrs)
static void gic_deactivate_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs)
{
int cm = 1 << cpu;
- int group = gic_has_groups(s) && GIC_TEST_GROUP(irq, cm);
+ int group;
+
+ if (irq >= s->num_irq) {
+ /*
+ * This handles two cases:
+ * 1. If software writes the ID of a spurious interrupt [ie 1023]
+ * to the GICC_DIR, the GIC ignores that write.
+ * 2. If software writes the number of a non-existent interrupt
+ * this must be a subcase of "value written is not an active interrupt"
+ * and so this is UNPREDICTABLE. We choose to ignore it.
+ */
+ return;
+ }
+
+ group = gic_has_groups(s) && GIC_TEST_GROUP(irq, cm);
if (!gic_eoi_split(s, cpu, attrs)) {
/* This is UNPREDICTABLE; we choose to ignore it */
@@ -737,7 +751,9 @@ static uint32_t gic_dist_readb(void *opaque, hwaddr offset, MemTxAttrs attrs)
if (irq >= s->num_irq) {
goto bad_reg;
}
- if (irq >= 29 && irq <= 31) {
+ if (irq < 29 && s->revision == REV_11MPCORE) {
+ res = 0;
+ } else if (irq < GIC_INTERNAL) {
res = cm;
} else {
res = GIC_TARGET(irq);
@@ -1000,7 +1016,7 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
if (irq >= s->num_irq) {
goto bad_reg;
}
- if (irq < 29) {
+ if (irq < 29 && s->revision == REV_11MPCORE) {
value = 0;
} else if (irq < GIC_INTERNAL) {
value = ALL_CPU_MASK;
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 661be8878a..7a5330f201 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -2296,9 +2296,8 @@ static void armv7m_nvic_instance_init(Object *obj)
NVICState *nvic = NVIC(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
- object_initialize(&nvic->systick[M_REG_NS],
- sizeof(nvic->systick[M_REG_NS]), TYPE_SYSTICK);
- qdev_set_parent_bus(DEVICE(&nvic->systick[M_REG_NS]), sysbus_get_default());
+ sysbus_init_child_obj(obj, "systick-reg-ns", &nvic->systick[M_REG_NS],
+ sizeof(nvic->systick[M_REG_NS]), TYPE_SYSTICK);
/* We can't initialize the secure systick here, as we don't know
* yet if we need it.
*/
diff --git a/hw/intc/realview_gic.c b/hw/intc/realview_gic.c
index 50bbab66ee..7f2ff85c83 100644
--- a/hw/intc/realview_gic.c
+++ b/hw/intc/realview_gic.c
@@ -54,16 +54,13 @@ static void realview_gic_init(Object *obj)
{
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
RealViewGICState *s = REALVIEW_GIC(obj);
- DeviceState *gicdev;
memory_region_init(&s->container, OBJECT(s),
"realview-gic-container", 0x2000);
sysbus_init_mmio(sbd, &s->container);
- object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC);
- gicdev = DEVICE(&s->gic);
- qdev_set_parent_bus(gicdev, sysbus_get_default());
- qdev_prop_set_uint32(gicdev, "num-cpu", 1);
+ sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), TYPE_ARM_GIC);
+ qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", 1);
}
static void realview_gic_class_init(ObjectClass *oc, void *data)
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index b9f1a3c972..c90c893228 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -291,7 +291,7 @@ static const VMStateDescription vmstate_icp_server = {
},
};
-static void icp_reset(void *dev)
+static void icp_reset(DeviceState *dev)
{
ICPState *icp = ICP(dev);
@@ -303,6 +303,13 @@ static void icp_reset(void *dev)
qemu_set_irq(icp->output, 0);
}
+static void icp_reset_handler(void *dev)
+{
+ DeviceClass *dc = DEVICE_GET_CLASS(dev);
+
+ dc->reset(dev);
+}
+
static void icp_realize(DeviceState *dev, Error **errp)
{
ICPState *icp = ICP(dev);
@@ -345,7 +352,7 @@ static void icp_realize(DeviceState *dev, Error **errp)
return;
}
- qemu_register_reset(icp_reset, dev);
+ qemu_register_reset(icp_reset_handler, dev);
vmstate_register(NULL, icp->cs->cpu_index, &vmstate_icp_server, icp);
}
@@ -354,7 +361,7 @@ static void icp_unrealize(DeviceState *dev, Error **errp)
ICPState *icp = ICP(dev);
vmstate_unregister(NULL, &vmstate_icp_server, icp);
- qemu_unregister_reset(icp_reset, dev);
+ qemu_unregister_reset(icp_reset_handler, dev);
}
static void icp_class_init(ObjectClass *klass, void *data)
@@ -363,6 +370,7 @@ static void icp_class_init(ObjectClass *klass, void *data)
dc->realize = icp_realize;
dc->unrealize = icp_unrealize;
+ dc->reset = icp_reset;
}
static const TypeInfo icp_info = {
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 59333b50ab..c8217740ef 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -247,11 +247,26 @@ static void aspeed_scu_write(void *opaque, hwaddr offset, uint64_t data,
s->regs[reg] = data;
aspeed_scu_set_apb_freq(s);
break;
-
+ case HW_STRAP1:
+ if (ASPEED_IS_AST2500(s->regs[SILICON_REV])) {
+ s->regs[HW_STRAP1] |= data;
+ return;
+ }
+ /* Jump to assignment below */
+ break;
+ case SILICON_REV:
+ if (ASPEED_IS_AST2500(s->regs[SILICON_REV])) {
+ s->regs[HW_STRAP1] &= ~data;
+ } else {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Write to read-only offset 0x%" HWADDR_PRIx "\n",
+ __func__, offset);
+ }
+ /* Avoid assignment below, we've handled everything */
+ return;
case FREQ_CNTR_EVAL:
case VGA_SCRATCH1 ... VGA_SCRATCH8:
case RNG_DATA:
- case SILICON_REV:
case FREE_CNTR4:
case FREE_CNTR4_EXT:
qemu_log_mask(LOG_GUEST_ERROR,
diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c
index b8a8721201..0e56d9a8a4 100644
--- a/hw/misc/auxbus.c
+++ b/hw/misc/auxbus.c
@@ -32,6 +32,7 @@
#include "hw/misc/auxbus.h"
#include "hw/i2c/i2c.h"
#include "monitor/monitor.h"
+#include "qapi/error.h"
#ifndef DEBUG_AUX
#define DEBUG_AUX 0
@@ -63,9 +64,14 @@ static void aux_bus_class_init(ObjectClass *klass, void *data)
AUXBus *aux_init_bus(DeviceState *parent, const char *name)
{
AUXBus *bus;
+ Object *auxtoi2c;
bus = AUX_BUS(qbus_create(TYPE_AUX_BUS, parent, name));
- bus->bridge = AUXTOI2C(qdev_create(BUS(bus), TYPE_AUXTOI2C));
+ auxtoi2c = object_new_with_props(TYPE_AUXTOI2C, OBJECT(bus), "i2c",
+ &error_abort, NULL);
+ qdev_set_parent_bus(DEVICE(auxtoi2c), BUS(bus));
+
+ bus->bridge = AUXTOI2C(auxtoi2c);
/* Memory related. */
bus->aux_io = g_malloc(sizeof(*bus->aux_io));
@@ -74,9 +80,11 @@ AUXBus *aux_init_bus(DeviceState *parent, const char *name)
return bus;
}
-static void aux_bus_map_device(AUXBus *bus, AUXSlave *dev, hwaddr addr)
+void aux_map_slave(AUXSlave *aux_dev, hwaddr addr)
{
- memory_region_add_subregion(bus->aux_io, addr, dev->mmio);
+ DeviceState *dev = DEVICE(aux_dev);
+ AUXBus *bus = AUX_BUS(qdev_get_parent_bus(dev));
+ memory_region_add_subregion(bus->aux_io, addr, aux_dev->mmio);
}
static bool aux_bus_is_bridge(AUXBus *bus, DeviceState *dev)
@@ -260,15 +268,13 @@ static void aux_slave_dev_print(Monitor *mon, DeviceState *dev, int indent)
memory_region_size(s->mmio));
}
-DeviceState *aux_create_slave(AUXBus *bus, const char *type, uint32_t addr)
+DeviceState *aux_create_slave(AUXBus *bus, const char *type)
{
DeviceState *dev;
dev = DEVICE(object_new(type));
assert(dev);
qdev_set_parent_bus(dev, &bus->qbus);
- qdev_init_nofail(dev);
- aux_bus_map_device(AUX_BUS(qdev_get_parent_bus(dev)), AUX_SLAVE(dev), addr);
return dev;
}
diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etsec.c
index 9da1932970..0b66274ce3 100644
--- a/hw/net/fsl_etsec/etsec.c
+++ b/hw/net/fsl_etsec/etsec.c
@@ -49,6 +49,28 @@ static const int debug_etsec;
} \
} while (0)
+/* call after any change to IEVENT or IMASK */
+void etsec_update_irq(eTSEC *etsec)
+{
+ uint32_t ievent = etsec->regs[IEVENT].value;
+ uint32_t imask = etsec->regs[IMASK].value;
+ uint32_t active = ievent & imask;
+
+ int tx = !!(active & IEVENT_TX_MASK);
+ int rx = !!(active & IEVENT_RX_MASK);
+ int err = !!(active & IEVENT_ERR_MASK);
+
+ DPRINTF("%s IRQ ievent=%"PRIx32" imask=%"PRIx32" %c%c%c",
+ __func__, ievent, imask,
+ tx ? 'T' : '_',
+ rx ? 'R' : '_',
+ err ? 'E' : '_');
+
+ qemu_set_irq(etsec->tx_irq, tx);
+ qemu_set_irq(etsec->rx_irq, rx);
+ qemu_set_irq(etsec->err_irq, err);
+}
+
static uint64_t etsec_read(void *opaque, hwaddr addr, unsigned size)
{
eTSEC *etsec = opaque;
@@ -139,31 +161,6 @@ static void write_rbasex(eTSEC *etsec,
etsec->regs[RBPTR0 + (reg_index - RBASE0)].value = value & ~0x7;
}
-static void write_ievent(eTSEC *etsec,
- eTSEC_Register *reg,
- uint32_t reg_index,
- uint32_t value)
-{
- /* Write 1 to clear */
- reg->value &= ~value;
-
- if (!(reg->value & (IEVENT_TXF | IEVENT_TXF))) {
- qemu_irq_lower(etsec->tx_irq);
- }
- if (!(reg->value & (IEVENT_RXF | IEVENT_RXF))) {
- qemu_irq_lower(etsec->rx_irq);
- }
-
- if (!(reg->value & (IEVENT_MAG | IEVENT_GTSC | IEVENT_GRSC | IEVENT_TXC |
- IEVENT_RXC | IEVENT_BABR | IEVENT_BABT | IEVENT_LC |
- IEVENT_CRL | IEVENT_FGPI | IEVENT_FIR | IEVENT_FIQ |
- IEVENT_DPE | IEVENT_PERR | IEVENT_EBERR | IEVENT_TXE |
- IEVENT_XFUN | IEVENT_BSY | IEVENT_MSRO | IEVENT_MMRD |
- IEVENT_MMRW))) {
- qemu_irq_lower(etsec->err_irq);
- }
-}
-
static void write_dmactrl(eTSEC *etsec,
eTSEC_Register *reg,
uint32_t reg_index,
@@ -178,9 +175,7 @@ static void write_dmactrl(eTSEC *etsec,
} else {
/* Graceful receive stop now */
etsec->regs[IEVENT].value |= IEVENT_GRSC;
- if (etsec->regs[IMASK].value & IMASK_GRSCEN) {
- qemu_irq_raise(etsec->err_irq);
- }
+ etsec_update_irq(etsec);
}
}
@@ -191,9 +186,7 @@ static void write_dmactrl(eTSEC *etsec,
} else {
/* Graceful transmit stop now */
etsec->regs[IEVENT].value |= IEVENT_GTSC;
- if (etsec->regs[IMASK].value & IMASK_GTSCEN) {
- qemu_irq_raise(etsec->err_irq);
- }
+ etsec_update_irq(etsec);
}
}
@@ -222,7 +215,16 @@ static void etsec_write(void *opaque,
switch (reg_index) {
case IEVENT:
- write_ievent(etsec, reg, reg_index, value);
+ /* Write 1 to clear */
+ reg->value &= ~value;
+
+ etsec_update_irq(etsec);
+ break;
+
+ case IMASK:
+ reg->value = value;
+
+ etsec_update_irq(etsec);
break;
case DMACTRL:
@@ -337,6 +339,8 @@ static void etsec_reset(DeviceState *d)
MII_SR_EXTENDED_STATUS | MII_SR_100T2_HD_CAPS | MII_SR_100T2_FD_CAPS |
MII_SR_10T_HD_CAPS | MII_SR_10T_FD_CAPS | MII_SR_100X_HD_CAPS |
MII_SR_100X_FD_CAPS | MII_SR_100T4_CAPS;
+
+ etsec_update_irq(etsec);
}
static ssize_t etsec_receive(NetClientState *nc,
diff --git a/hw/net/fsl_etsec/etsec.h b/hw/net/fsl_etsec/etsec.h
index 30c828e241..877988572e 100644
--- a/hw/net/fsl_etsec/etsec.h
+++ b/hw/net/fsl_etsec/etsec.h
@@ -163,6 +163,8 @@ DeviceState *etsec_create(hwaddr base,
qemu_irq rx_irq,
qemu_irq err_irq);
+void etsec_update_irq(eTSEC *etsec);
+
void etsec_walk_tx_ring(eTSEC *etsec, int ring_nbr);
void etsec_walk_rx_ring(eTSEC *etsec, int ring_nbr);
ssize_t etsec_rx_ring_write(eTSEC *etsec, const uint8_t *buf, size_t size);
diff --git a/hw/net/fsl_etsec/registers.h b/hw/net/fsl_etsec/registers.h
index c4ed2b9d62..f085537ecd 100644
--- a/hw/net/fsl_etsec/registers.h
+++ b/hw/net/fsl_etsec/registers.h
@@ -74,6 +74,16 @@ extern const eTSEC_Register_Definition eTSEC_registers_def[];
#define IEVENT_RXC (1 << 30)
#define IEVENT_BABR (1 << 31)
+/* Mapping between interrupt pin and interrupt flags */
+#define IEVENT_RX_MASK (IEVENT_RXF | IEVENT_RXB)
+#define IEVENT_TX_MASK (IEVENT_TXF | IEVENT_TXB)
+#define IEVENT_ERR_MASK (IEVENT_MAG | IEVENT_GTSC | IEVENT_GRSC | IEVENT_TXC | \
+ IEVENT_RXC | IEVENT_BABR | IEVENT_BABT | IEVENT_LC | \
+ IEVENT_CRL | IEVENT_FGPI | IEVENT_FIR | IEVENT_FIQ | \
+ IEVENT_DPE | IEVENT_PERR | IEVENT_EBERR | IEVENT_TXE | \
+ IEVENT_XFUN | IEVENT_BSY | IEVENT_MSRO | IEVENT_MMRD | \
+ IEVENT_MMRW)
+
#define IMASK_RXFEN (1 << 7)
#define IMASK_GRSCEN (1 << 8)
#define IMASK_RXBEN (1 << 15)
diff --git a/hw/net/fsl_etsec/rings.c b/hw/net/fsl_etsec/rings.c
index d0f93eebfc..337a55fc95 100644
--- a/hw/net/fsl_etsec/rings.c
+++ b/hw/net/fsl_etsec/rings.c
@@ -152,17 +152,7 @@ static void ievent_set(eTSEC *etsec,
{
etsec->regs[IEVENT].value |= flags;
- if ((flags & IEVENT_TXB && etsec->regs[IMASK].value & IMASK_TXBEN)
- || (flags & IEVENT_TXF && etsec->regs[IMASK].value & IMASK_TXFEN)) {
- qemu_irq_raise(etsec->tx_irq);
- RING_DEBUG("%s Raise Tx IRQ\n", __func__);
- }
-
- if ((flags & IEVENT_RXB && etsec->regs[IMASK].value & IMASK_RXBEN)
- || (flags & IEVENT_RXF && etsec->regs[IMASK].value & IMASK_RXFEN)) {
- qemu_irq_raise(etsec->rx_irq);
- RING_DEBUG("%s Raise Rx IRQ\n", __func__);
- }
+ etsec_update_irq(etsec);
}
static void tx_padding_and_crc(eTSEC *etsec, uint32_t min_frame_len)
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index e2b7028843..0999efcc1e 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -269,11 +269,12 @@ static int sam460ex_load_device_tree(hwaddr addr,
exit(1);
}
fdt = load_device_tree(filename, &fdt_size);
- g_free(filename);
if (!fdt) {
error_report("Couldn't load dtb file `%s'", filename);
+ g_free(filename);
exit(1);
}
+ g_free(filename);
/* Manipulate device tree in memory. */
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 3f5e1d3ec2..421b2dd09b 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -665,7 +665,7 @@ static uint32_t spapr_pc_dimm_node(MemoryDeviceInfoList *list, ram_addr_t addr)
if (value && value->type == MEMORY_DEVICE_INFO_KIND_DIMM) {
PCDIMMDeviceInfo *pcdimm_info = value->u.dimm.data;
- if (pcdimm_info->addr >= addr &&
+ if (addr >= pcdimm_info->addr &&
addr < (pcdimm_info->addr + pcdimm_info->size)) {
return pcdimm_info->node;
}
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-26 03:18:12 +0000