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-rw-r--r--hw/arm/vexpress.c6
-rw-r--r--hw/core/register.c8
-rw-r--r--hw/display/Makefile.objs1
-rw-r--r--hw/display/sii9022.c191
-rw-r--r--hw/display/trace-events5
-rw-r--r--hw/i2c/core.c18
-rw-r--r--hw/i2c/i2c-ddc.c4
-rw-r--r--hw/intc/s390_flic.c4
-rw-r--r--hw/s390x/ipl.c77
-rw-r--r--hw/s390x/ipl.h31
-rw-r--r--hw/s390x/s390-stattrib.c26
-rw-r--r--hw/s390x/s390-virtio-ccw.c2
-rw-r--r--hw/s390x/sclp.c310
-rw-r--r--hw/ssi/xilinx_spips.c43
14 files changed, 376 insertions, 350 deletions
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index dc5928ae1a..9fad79177a 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -29,6 +29,7 @@
#include "hw/arm/arm.h"
#include "hw/arm/primecell.h"
#include "hw/devices.h"
+#include "hw/i2c/i2c.h"
#include "net/net.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
@@ -537,6 +538,7 @@ static void vexpress_common_init(MachineState *machine)
uint32_t sys_id;
DriveInfo *dinfo;
pflash_t *pflash0;
+ I2CBus *i2c;
ram_addr_t vram_size, sram_size;
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *vram = g_new(MemoryRegion, 1);
@@ -628,7 +630,9 @@ static void vexpress_common_init(MachineState *machine)
sysbus_create_simple("sp804", map[VE_TIMER01], pic[2]);
sysbus_create_simple("sp804", map[VE_TIMER23], pic[3]);
- /* VE_SERIALDVI: not modelled */
+ dev = sysbus_create_simple("versatile_i2c", map[VE_SERIALDVI], NULL);
+ i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
+ i2c_create_slave(i2c, "sii9022", 0x39);
sysbus_create_simple("pl031", map[VE_RTC], pic[4]); /* RTC */
diff --git a/hw/core/register.c b/hw/core/register.c
index 900294b9c4..0741a1af32 100644
--- a/hw/core/register.c
+++ b/hw/core/register.c
@@ -159,13 +159,21 @@ uint64_t register_read(RegisterInfo *reg, uint64_t re, const char* prefix,
void register_reset(RegisterInfo *reg)
{
+ const RegisterAccessInfo *ac;
+
g_assert(reg);
if (!reg->data || !reg->access) {
return;
}
+ ac = reg->access;
+
register_write_val(reg, reg->access->reset);
+
+ if (ac->post_write) {
+ ac->post_write(reg, reg->access->reset);
+ }
}
void register_init(RegisterInfo *reg)
diff --git a/hw/display/Makefile.objs b/hw/display/Makefile.objs
index d3a4cb396e..3c7c75b94d 100644
--- a/hw/display/Makefile.objs
+++ b/hw/display/Makefile.objs
@@ -3,6 +3,7 @@ common-obj-$(CONFIG_VGA_CIRRUS) += cirrus_vga.o
common-obj-$(CONFIG_G364FB) += g364fb.o
common-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
common-obj-$(CONFIG_PL110) += pl110.o
+common-obj-$(CONFIG_SII9022) += sii9022.o
common-obj-$(CONFIG_SSD0303) += ssd0303.o
common-obj-$(CONFIG_SSD0323) += ssd0323.o
common-obj-$(CONFIG_XEN) += xenfb.o
diff --git a/hw/display/sii9022.c b/hw/display/sii9022.c
new file mode 100644
index 0000000000..eaf11a6e7b
--- /dev/null
+++ b/hw/display/sii9022.c
@@ -0,0 +1,191 @@
+/*
+ * Silicon Image SiI9022
+ *
+ * This is a pretty hollow emulation: all we do is acknowledge that we
+ * exist (chip ID) and confirm that we get switched over into DDC mode
+ * so the emulated host can proceed to read out EDID data. All subsequent
+ * set-up of connectors etc will be acknowledged and ignored.
+ *
+ * Copyright (C) 2018 Linus Walleij
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "hw/i2c/i2c.h"
+#include "hw/i2c/i2c-ddc.h"
+#include "trace.h"
+
+#define SII9022_SYS_CTRL_DATA 0x1a
+#define SII9022_SYS_CTRL_PWR_DWN 0x10
+#define SII9022_SYS_CTRL_AV_MUTE 0x08
+#define SII9022_SYS_CTRL_DDC_BUS_REQ 0x04
+#define SII9022_SYS_CTRL_DDC_BUS_GRTD 0x02
+#define SII9022_SYS_CTRL_OUTPUT_MODE 0x01
+#define SII9022_SYS_CTRL_OUTPUT_HDMI 1
+#define SII9022_SYS_CTRL_OUTPUT_DVI 0
+#define SII9022_REG_CHIPID 0x1b
+#define SII9022_INT_ENABLE 0x3c
+#define SII9022_INT_STATUS 0x3d
+#define SII9022_INT_STATUS_HOTPLUG 0x01;
+#define SII9022_INT_STATUS_PLUGGED 0x04;
+
+#define TYPE_SII9022 "sii9022"
+#define SII9022(obj) OBJECT_CHECK(sii9022_state, (obj), TYPE_SII9022)
+
+typedef struct sii9022_state {
+ I2CSlave parent_obj;
+ uint8_t ptr;
+ bool addr_byte;
+ bool ddc_req;
+ bool ddc_skip_finish;
+ bool ddc;
+} sii9022_state;
+
+static const VMStateDescription vmstate_sii9022 = {
+ .name = "sii9022",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_I2C_SLAVE(parent_obj, sii9022_state),
+ VMSTATE_UINT8(ptr, sii9022_state),
+ VMSTATE_BOOL(addr_byte, sii9022_state),
+ VMSTATE_BOOL(ddc_req, sii9022_state),
+ VMSTATE_BOOL(ddc_skip_finish, sii9022_state),
+ VMSTATE_BOOL(ddc, sii9022_state),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static int sii9022_event(I2CSlave *i2c, enum i2c_event event)
+{
+ sii9022_state *s = SII9022(i2c);
+
+ switch (event) {
+ case I2C_START_SEND:
+ s->addr_byte = true;
+ break;
+ case I2C_START_RECV:
+ break;
+ case I2C_FINISH:
+ break;
+ case I2C_NACK:
+ break;
+ }
+
+ return 0;
+}
+
+static int sii9022_rx(I2CSlave *i2c)
+{
+ sii9022_state *s = SII9022(i2c);
+ uint8_t res = 0x00;
+
+ switch (s->ptr) {
+ case SII9022_SYS_CTRL_DATA:
+ if (s->ddc_req) {
+ /* Acknowledge DDC bus request */
+ res = SII9022_SYS_CTRL_DDC_BUS_GRTD | SII9022_SYS_CTRL_DDC_BUS_REQ;
+ }
+ break;
+ case SII9022_REG_CHIPID:
+ res = 0xb0;
+ break;
+ case SII9022_INT_STATUS:
+ /* Something is cold-plugged in, no interrupts */
+ res = SII9022_INT_STATUS_PLUGGED;
+ break;
+ default:
+ break;
+ }
+
+ trace_sii9022_read_reg(s->ptr, res);
+ s->ptr++;
+
+ return res;
+}
+
+static int sii9022_tx(I2CSlave *i2c, uint8_t data)
+{
+ sii9022_state *s = SII9022(i2c);
+
+ if (s->addr_byte) {
+ s->ptr = data;
+ s->addr_byte = false;
+ return 0;
+ }
+
+ switch (s->ptr) {
+ case SII9022_SYS_CTRL_DATA:
+ if (data & SII9022_SYS_CTRL_DDC_BUS_REQ) {
+ s->ddc_req = true;
+ if (data & SII9022_SYS_CTRL_DDC_BUS_GRTD) {
+ s->ddc = true;
+ /* Skip this finish since we just switched to DDC */
+ s->ddc_skip_finish = true;
+ trace_sii9022_switch_mode("DDC");
+ }
+ } else {
+ s->ddc_req = false;
+ s->ddc = false;
+ trace_sii9022_switch_mode("normal");
+ }
+ break;
+ default:
+ break;
+ }
+
+ trace_sii9022_write_reg(s->ptr, data);
+ s->ptr++;
+
+ return 0;
+}
+
+static void sii9022_reset(DeviceState *dev)
+{
+ sii9022_state *s = SII9022(dev);
+
+ s->ptr = 0;
+ s->addr_byte = false;
+ s->ddc_req = false;
+ s->ddc_skip_finish = false;
+ s->ddc = false;
+}
+
+static void sii9022_realize(DeviceState *dev, Error **errp)
+{
+ I2CBus *bus;
+
+ bus = I2C_BUS(qdev_get_parent_bus(dev));
+ i2c_create_slave(bus, TYPE_I2CDDC, 0x50);
+}
+
+static void sii9022_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
+
+ k->event = sii9022_event;
+ k->recv = sii9022_rx;
+ k->send = sii9022_tx;
+ dc->reset = sii9022_reset;
+ dc->realize = sii9022_realize;
+ dc->vmsd = &vmstate_sii9022;
+}
+
+static const TypeInfo sii9022_info = {
+ .name = TYPE_SII9022,
+ .parent = TYPE_I2C_SLAVE,
+ .instance_size = sizeof(sii9022_state),
+ .class_init = sii9022_class_init,
+};
+
+static void sii9022_register_types(void)
+{
+ type_register_static(&sii9022_info);
+}
+
+type_init(sii9022_register_types)
diff --git a/hw/display/trace-events b/hw/display/trace-events
index da498c1def..5a48c6cb6a 100644
--- a/hw/display/trace-events
+++ b/hw/display/trace-events
@@ -132,3 +132,8 @@ vga_cirrus_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
vga_cirrus_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
vga_cirrus_read_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x"
vga_cirrus_write_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x"
+
+# hw/display/sii9022.c
+sii9022_read_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x"
+sii9022_write_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x"
+sii9022_switch_mode(const char *mode) "mode: %s"
diff --git a/hw/i2c/core.c b/hw/i2c/core.c
index 59068f157e..cfccefca3d 100644
--- a/hw/i2c/core.c
+++ b/hw/i2c/core.c
@@ -10,31 +10,13 @@
#include "qemu/osdep.h"
#include "hw/i2c/i2c.h"
-typedef struct I2CNode I2CNode;
-
-struct I2CNode {
- I2CSlave *elt;
- QLIST_ENTRY(I2CNode) next;
-};
-
#define I2C_BROADCAST 0x00
-struct I2CBus
-{
- BusState qbus;
- QLIST_HEAD(, I2CNode) current_devs;
- uint8_t saved_address;
- bool broadcast;
-};
-
static Property i2c_props[] = {
DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0),
DEFINE_PROP_END_OF_LIST(),
};
-#define TYPE_I2C_BUS "i2c-bus"
-#define I2C_BUS(obj) OBJECT_CHECK(I2CBus, (obj), TYPE_I2C_BUS)
-
static const TypeInfo i2c_bus_info = {
.name = TYPE_I2C_BUS,
.parent = TYPE_BUS,
diff --git a/hw/i2c/i2c-ddc.c b/hw/i2c/i2c-ddc.c
index 199dac9e41..bec0c91e2d 100644
--- a/hw/i2c/i2c-ddc.c
+++ b/hw/i2c/i2c-ddc.c
@@ -259,12 +259,12 @@ static int i2c_ddc_tx(I2CSlave *i2c, uint8_t data)
s->reg = data;
s->firstbyte = false;
DPRINTF("[EDID] Written new pointer: %u\n", data);
- return 1;
+ return 0;
}
/* Ignore all writes */
s->reg++;
- return 1;
+ return 0;
}
static void i2c_ddc_init(Object *obj)
diff --git a/hw/intc/s390_flic.c b/hw/intc/s390_flic.c
index a85a149c6d..5f8168f0f0 100644
--- a/hw/intc/s390_flic.c
+++ b/hw/intc/s390_flic.c
@@ -192,8 +192,8 @@ static void qemu_s390_flic_notify(uint32_t type)
cs->interrupt_request |= CPU_INTERRUPT_HARD;
/* ignore CPUs that are not sleeping */
- if (s390_cpu_get_state(cpu) != CPU_STATE_OPERATING &&
- s390_cpu_get_state(cpu) != CPU_STATE_LOAD) {
+ if (s390_cpu_get_state(cpu) != S390_CPU_STATE_OPERATING &&
+ s390_cpu_get_state(cpu) != S390_CPU_STATE_LOAD) {
continue;
}
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index 0d06fc12b6..798e99aadf 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -23,6 +23,9 @@
#include "hw/s390x/ebcdic.h"
#include "ipl.h"
#include "qemu/error-report.h"
+#include "qemu/config-file.h"
+#include "qemu/cutils.h"
+#include "qemu/option.h"
#define KERN_IMAGE_START 0x010000UL
#define KERN_PARM_AREA 0x010480UL
@@ -219,6 +222,61 @@ static Property s390_ipl_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
+static void s390_ipl_set_boot_menu(S390IPLState *ipl)
+{
+ QemuOptsList *plist = qemu_find_opts("boot-opts");
+ QemuOpts *opts = QTAILQ_FIRST(&plist->head);
+ uint8_t *flags = &ipl->qipl.qipl_flags;
+ uint32_t *timeout = &ipl->qipl.boot_menu_timeout;
+ const char *tmp;
+ unsigned long splash_time = 0;
+
+ if (!get_boot_device(0)) {
+ if (boot_menu) {
+ error_report("boot menu requires a bootindex to be specified for "
+ "the IPL device.");
+ }
+ return;
+ }
+
+ switch (ipl->iplb.pbt) {
+ case S390_IPL_TYPE_CCW:
+ /* In the absence of -boot menu, use zipl parameters */
+ if (!qemu_opt_get(opts, "menu")) {
+ *flags |= QIPL_FLAG_BM_OPTS_ZIPL;
+ return;
+ }
+ break;
+ case S390_IPL_TYPE_QEMU_SCSI:
+ break;
+ default:
+ error_report("boot menu is not supported for this device type.");
+ return;
+ }
+
+ if (!boot_menu) {
+ return;
+ }
+
+ *flags |= QIPL_FLAG_BM_OPTS_CMD;
+
+ tmp = qemu_opt_get(opts, "splash-time");
+
+ if (tmp && qemu_strtoul(tmp, NULL, 10, &splash_time)) {
+ error_report("splash-time is invalid, forcing it to 0.");
+ *timeout = 0;
+ return;
+ }
+
+ if (splash_time > 0xffffffff) {
+ error_report("splash-time is too large, forcing it to max value.");
+ *timeout = 0xffffffff;
+ return;
+ }
+
+ *timeout = cpu_to_be32(splash_time);
+}
+
static bool s390_gen_initial_iplb(S390IPLState *ipl)
{
DeviceState *dev_st;
@@ -399,6 +457,21 @@ void s390_reipl_request(void)
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
}
+static void s390_ipl_prepare_qipl(S390CPU *cpu)
+{
+ S390IPLState *ipl = get_ipl_device();
+ uint8_t *addr;
+ uint64_t len = 4096;
+
+ addr = cpu_physical_memory_map(cpu->env.psa, &len, 1);
+ if (!addr || len < QIPL_ADDRESS + sizeof(QemuIplParameters)) {
+ error_report("Cannot set QEMU IPL parameters");
+ return;
+ }
+ memcpy(addr + QIPL_ADDRESS, &ipl->qipl, sizeof(QemuIplParameters));
+ cpu_physical_memory_unmap(addr, len, 1, len);
+}
+
void s390_ipl_prepare_cpu(S390CPU *cpu)
{
S390IPLState *ipl = get_ipl_device();
@@ -418,8 +491,10 @@ void s390_ipl_prepare_cpu(S390CPU *cpu)
error_report_err(err);
vm_stop(RUN_STATE_INTERNAL_ERROR);
}
- ipl->iplb.ccw.netboot_start_addr = cpu_to_be64(ipl->start_addr);
+ ipl->qipl.netboot_start_addr = cpu_to_be64(ipl->start_addr);
}
+ s390_ipl_set_boot_menu(ipl);
+ s390_ipl_prepare_qipl(cpu);
}
static void s390_ipl_reset(DeviceState *dev)
diff --git a/hw/s390x/ipl.h b/hw/s390x/ipl.h
index 8a705e0428..0570d0ad75 100644
--- a/hw/s390x/ipl.h
+++ b/hw/s390x/ipl.h
@@ -16,8 +16,7 @@
#include "cpu.h"
struct IplBlockCcw {
- uint64_t netboot_start_addr;
- uint8_t reserved0[77];
+ uint8_t reserved0[85];
uint8_t ssid;
uint16_t devno;
uint8_t vm_flags;
@@ -90,6 +89,33 @@ void s390_ipl_prepare_cpu(S390CPU *cpu);
IplParameterBlock *s390_ipl_get_iplb(void);
void s390_reipl_request(void);
+#define QIPL_ADDRESS 0xcc
+
+/* Boot Menu flags */
+#define QIPL_FLAG_BM_OPTS_CMD 0x80
+#define QIPL_FLAG_BM_OPTS_ZIPL 0x40
+
+/*
+ * The QEMU IPL Parameters will be stored at absolute address
+ * 204 (0xcc) which means it is 32-bit word aligned but not
+ * double-word aligned.
+ * Placement of data fields in this area must account for
+ * their alignment needs. E.g., netboot_start_address must
+ * have an offset of 4 + n * 8 bytes within the struct in order
+ * to keep it double-word aligned.
+ * The total size of the struct must never exceed 28 bytes.
+ * This definition must be kept in sync with the defininition
+ * in pc-bios/s390-ccw/iplb.h.
+ */
+struct QemuIplParameters {
+ uint8_t qipl_flags;
+ uint8_t reserved1[3];
+ uint64_t netboot_start_addr;
+ uint32_t boot_menu_timeout;
+ uint8_t reserved2[12];
+} QEMU_PACKED;
+typedef struct QemuIplParameters QemuIplParameters;
+
#define TYPE_S390_IPL "s390-ipl"
#define S390_IPL(obj) OBJECT_CHECK(S390IPLState, (obj), TYPE_S390_IPL)
@@ -105,6 +131,7 @@ struct S390IPLState {
bool iplb_valid;
bool reipl_requested;
bool netboot;
+ QemuIplParameters qipl;
/*< public >*/
char *kernel;
diff --git a/hw/s390x/s390-stattrib.c b/hw/s390x/s390-stattrib.c
index a1d2135a60..adf07ef312 100644
--- a/hw/s390x/s390-stattrib.c
+++ b/hw/s390x/s390-stattrib.c
@@ -365,22 +365,22 @@ static inline void s390_stattrib_set_migration_enabled(Object *obj, bool value,
s->migration_enabled = value;
}
+static SaveVMHandlers savevm_s390_stattrib_handlers = {
+ .save_setup = cmma_save_setup,
+ .save_live_iterate = cmma_save_iterate,
+ .save_live_complete_precopy = cmma_save_complete,
+ .save_live_pending = cmma_save_pending,
+ .save_cleanup = cmma_save_cleanup,
+ .load_state = cmma_load,
+ .is_active = cmma_active,
+};
+
static void s390_stattrib_instance_init(Object *obj)
{
S390StAttribState *sas = S390_STATTRIB(obj);
- SaveVMHandlers *ops;
-
- /* ops will always be freed by qemu when unregistering */
- ops = g_new0(SaveVMHandlers, 1);
-
- ops->save_setup = cmma_save_setup;
- ops->save_live_iterate = cmma_save_iterate;
- ops->save_live_complete_precopy = cmma_save_complete;
- ops->save_live_pending = cmma_save_pending;
- ops->save_cleanup = cmma_save_cleanup;
- ops->load_state = cmma_load;
- ops->is_active = cmma_active;
- register_savevm_live(NULL, TYPE_S390_STATTRIB, 0, 0, ops, sas);
+
+ register_savevm_live(NULL, TYPE_S390_STATTRIB, 0, 0,
+ &savevm_s390_stattrib_handlers, sas);
object_property_add_bool(obj, "migration-enabled",
s390_stattrib_get_migration_enabled,
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index 4abbe89847..4d0c3deba6 100644
--- a/hw/s390x/s390-virtio-ccw.c
+++ b/hw/s390x/s390-virtio-ccw.c
@@ -368,7 +368,7 @@ static void s390_machine_reset(void)
/* all cpus are stopped - configure and start the ipl cpu only */
s390_ipl_prepare_cpu(ipl_cpu);
- s390_cpu_set_state(CPU_STATE_OPERATING, ipl_cpu);
+ s390_cpu_set_state(S390_CPU_STATE_OPERATING, ipl_cpu);
}
static void s390_machine_device_plug(HotplugHandler *hotplug_dev,
diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c
index 276972b59f..047d577313 100644
--- a/hw/s390x/sclp.c
+++ b/hw/s390x/sclp.c
@@ -15,9 +15,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
-#include "exec/memory.h"
#include "sysemu/sysemu.h"
-#include "exec/address-spaces.h"
#include "hw/boards.h"
#include "hw/s390x/sclp.h"
#include "hw/s390x/event-facility.h"
@@ -57,10 +55,8 @@ static void read_SCP_info(SCLPDevice *sclp, SCCB *sccb)
{
ReadInfo *read_info = (ReadInfo *) sccb;
MachineState *machine = MACHINE(qdev_get_machine());
- sclpMemoryHotplugDev *mhd = get_sclp_memory_hotplug_dev();
int cpu_count;
int rnsize, rnmax;
- int slots = MIN(machine->ram_slots, s390_get_memslot_count());
IplParameterBlock *ipib = s390_ipl_get_iplb();
/* CPU information */
@@ -80,36 +76,6 @@ static void read_SCP_info(SCLPDevice *sclp, SCCB *sccb)
read_info->facilities = cpu_to_be64(SCLP_HAS_CPU_INFO |
SCLP_HAS_IOA_RECONFIG);
- /* Memory Hotplug is only supported for the ccw machine type */
- if (mhd) {
- mhd->standby_subregion_size = MEM_SECTION_SIZE;
- /* Deduct the memory slot already used for core */
- if (slots > 0) {
- while ((mhd->standby_subregion_size * (slots - 1)
- < mhd->standby_mem_size)) {
- mhd->standby_subregion_size = mhd->standby_subregion_size << 1;
- }
- }
- /*
- * Initialize mapping of guest standby memory sections indicating which
- * are and are not online. Assume all standby memory begins offline.
- */
- if (mhd->standby_state_map == 0) {
- if (mhd->standby_mem_size % mhd->standby_subregion_size) {
- mhd->standby_state_map = g_malloc0((mhd->standby_mem_size /
- mhd->standby_subregion_size + 1) *
- (mhd->standby_subregion_size /
- MEM_SECTION_SIZE));
- } else {
- mhd->standby_state_map = g_malloc0(mhd->standby_mem_size /
- MEM_SECTION_SIZE);
- }
- }
- mhd->padded_ram_size = ram_size + mhd->pad_size;
- mhd->rzm = 1 << mhd->increment_size;
-
- read_info->facilities |= cpu_to_be64(SCLP_FC_ASSIGN_ATTACH_READ_STOR);
- }
read_info->mha_pow = s390_get_mha_pow();
read_info->hmfai = cpu_to_be32(s390_get_hmfai());
@@ -121,7 +87,8 @@ static void read_SCP_info(SCLPDevice *sclp, SCCB *sccb)
read_info->rnsize2 = cpu_to_be32(rnsize);
}
- rnmax = machine->maxram_size >> sclp->increment_size;
+ /* we don't support standby memory, maxram_size is never exposed */
+ rnmax = machine->ram_size >> sclp->increment_size;
if (rnmax < 0x10000) {
read_info->rnmax = cpu_to_be16(rnmax);
} else {
@@ -139,195 +106,6 @@ static void read_SCP_info(SCLPDevice *sclp, SCCB *sccb)
sccb->h.response_code = cpu_to_be16(SCLP_RC_NORMAL_READ_COMPLETION);
}
-static void read_storage_element0_info(SCLPDevice *sclp, SCCB *sccb)
-{
- int i, assigned;
- int subincrement_id = SCLP_STARTING_SUBINCREMENT_ID;
- ReadStorageElementInfo *storage_info = (ReadStorageElementInfo *) sccb;
- sclpMemoryHotplugDev *mhd = get_sclp_memory_hotplug_dev();
-
- if (!mhd) {
- sccb->h.response_code = cpu_to_be16(SCLP_RC_INVALID_SCLP_COMMAND);
- return;
- }
-
- if ((ram_size >> mhd->increment_size) >= 0x10000) {
- sccb->h.response_code = cpu_to_be16(SCLP_RC_SCCB_BOUNDARY_VIOLATION);
- return;
- }
-
- /* Return information regarding core memory */
- storage_info->max_id = cpu_to_be16(mhd->standby_mem_size ? 1 : 0);
- assigned = ram_size >> mhd->increment_size;
- storage_info->assigned = cpu_to_be16(assigned);
-
- for (i = 0; i < assigned; i++) {
- storage_info->entries[i] = cpu_to_be32(subincrement_id);
- subincrement_id += SCLP_INCREMENT_UNIT;
- }
- sccb->h.response_code = cpu_to_be16(SCLP_RC_NORMAL_READ_COMPLETION);
-}
-
-static void read_storage_element1_info(SCLPDevice *sclp, SCCB *sccb)
-{
- ReadStorageElementInfo *storage_info = (ReadStorageElementInfo *) sccb;
- sclpMemoryHotplugDev *mhd = get_sclp_memory_hotplug_dev();
-
- if (!mhd) {
- sccb->h.response_code = cpu_to_be16(SCLP_RC_INVALID_SCLP_COMMAND);
- return;
- }
-
- if ((mhd->standby_mem_size >> mhd->increment_size) >= 0x10000) {
- sccb->h.response_code = cpu_to_be16(SCLP_RC_SCCB_BOUNDARY_VIOLATION);
- return;
- }
-
- /* Return information regarding standby memory */
- storage_info->max_id = cpu_to_be16(mhd->standby_mem_size ? 1 : 0);
- storage_info->assigned = cpu_to_be16(mhd->standby_mem_size >>
- mhd->increment_size);
- storage_info->standby = cpu_to_be16(mhd->standby_mem_size >>
- mhd->increment_size);
- sccb->h.response_code = cpu_to_be16(SCLP_RC_STANDBY_READ_COMPLETION);
-}
-
-static void attach_storage_element(SCLPDevice *sclp, SCCB *sccb,
- uint16_t element)
-{
- int i, assigned, subincrement_id;
- AttachStorageElement *attach_info = (AttachStorageElement *) sccb;
- sclpMemoryHotplugDev *mhd = get_sclp_memory_hotplug_dev();
-
- if (!mhd) {
- sccb->h.response_code = cpu_to_be16(SCLP_RC_INVALID_SCLP_COMMAND);
- return;
- }
-
- if (element != 1) {
- sccb->h.response_code = cpu_to_be16(SCLP_RC_INVALID_SCLP_COMMAND);
- return;
- }
-
- assigned = mhd->standby_mem_size >> mhd->increment_size;
- attach_info->assigned = cpu_to_be16(assigned);
- subincrement_id = ((ram_size >> mhd->increment_size) << 16)
- + SCLP_STARTING_SUBINCREMENT_ID;
- for (i = 0; i < assigned; i++) {
- attach_info->entries[i] = cpu_to_be32(subincrement_id);
- subincrement_id += SCLP_INCREMENT_UNIT;
- }
- sccb->h.response_code = cpu_to_be16(SCLP_RC_NORMAL_COMPLETION);
-}
-
-static void assign_storage(SCLPDevice *sclp, SCCB *sccb)
-{
- MemoryRegion *mr = NULL;
- uint64_t this_subregion_size;
- AssignStorage *assign_info = (AssignStorage *) sccb;
- sclpMemoryHotplugDev *mhd = get_sclp_memory_hotplug_dev();
- ram_addr_t assign_addr;
- MemoryRegion *sysmem = get_system_memory();
-
- if (!mhd) {
- sccb->h.response_code = cpu_to_be16(SCLP_RC_INVALID_SCLP_COMMAND);
- return;
- }
- assign_addr = (be16_to_cpu(assign_info->rn) - 1) * mhd->rzm;
-
- if ((assign_addr % MEM_SECTION_SIZE == 0) &&
- (assign_addr >= mhd->padded_ram_size)) {
- /* Re-use existing memory region if found */
- mr = memory_region_find(sysmem, assign_addr, 1).mr;
- memory_region_unref(mr);
- if (!mr) {
-
- MemoryRegion *standby_ram = g_new(MemoryRegion, 1);
-
- /* offset to align to standby_subregion_size for allocation */
- ram_addr_t offset = assign_addr -
- (assign_addr - mhd->padded_ram_size)
- % mhd->standby_subregion_size;
-
- /* strlen("standby.ram") + 4 (Max of KVM_MEMORY_SLOTS) + NULL */
- char id[16];
- snprintf(id, 16, "standby.ram%d",
- (int)((offset - mhd->padded_ram_size) /
- mhd->standby_subregion_size) + 1);
-
- /* Allocate a subregion of the calculated standby_subregion_size */
- if (offset + mhd->standby_subregion_size >
- mhd->padded_ram_size + mhd->standby_mem_size) {
- this_subregion_size = mhd->padded_ram_size +
- mhd->standby_mem_size - offset;
- } else {
- this_subregion_size = mhd->standby_subregion_size;
- }
-
- memory_region_init_ram(standby_ram, NULL, id, this_subregion_size,
- &error_fatal);
- /* This is a hack to make memory hotunplug work again. Once we have
- * subdevices, we have to unparent them when unassigning memory,
- * instead of doing it via the ref count of the MemoryRegion. */
- object_ref(OBJECT(standby_ram));
- object_unparent(OBJECT(standby_ram));
- memory_region_add_subregion(sysmem, offset, standby_ram);
- }
- /* The specified subregion is no longer in standby */
- mhd->standby_state_map[(assign_addr - mhd->padded_ram_size)
- / MEM_SECTION_SIZE] = 1;
- }
- sccb->h.response_code = cpu_to_be16(SCLP_RC_NORMAL_COMPLETION);
-}
-
-static void unassign_storage(SCLPDevice *sclp, SCCB *sccb)
-{
- MemoryRegion *mr = NULL;
- AssignStorage *assign_info = (AssignStorage *) sccb;
- sclpMemoryHotplugDev *mhd = get_sclp_memory_hotplug_dev();
- ram_addr_t unassign_addr;
- MemoryRegion *sysmem = get_system_memory();
-
- if (!mhd) {
- sccb->h.response_code = cpu_to_be16(SCLP_RC_INVALID_SCLP_COMMAND);
- return;
- }
- unassign_addr = (be16_to_cpu(assign_info->rn) - 1) * mhd->rzm;
-
- /* if the addr is a multiple of 256 MB */
- if ((unassign_addr % MEM_SECTION_SIZE == 0) &&
- (unassign_addr >= mhd->padded_ram_size)) {
- mhd->standby_state_map[(unassign_addr -
- mhd->padded_ram_size) / MEM_SECTION_SIZE] = 0;
-
- /* find the specified memory region and destroy it */
- mr = memory_region_find(sysmem, unassign_addr, 1).mr;
- memory_region_unref(mr);
- if (mr) {
- int i;
- int is_removable = 1;
- ram_addr_t map_offset = (unassign_addr - mhd->padded_ram_size -
- (unassign_addr - mhd->padded_ram_size)
- % mhd->standby_subregion_size);
- /* Mark all affected subregions as 'standby' once again */
- for (i = 0;
- i < (mhd->standby_subregion_size / MEM_SECTION_SIZE);
- i++) {
-
- if (mhd->standby_state_map[i + map_offset / MEM_SECTION_SIZE]) {
- is_removable = 0;
- break;
- }
- }
- if (is_removable) {
- memory_region_del_subregion(sysmem, mr);
- object_unref(OBJECT(mr));
- }
- }
- }
- sccb->h.response_code = cpu_to_be16(SCLP_RC_NORMAL_COMPLETION);
-}
-
/* Provide information about the CPU */
static void sclp_read_cpu_info(SCLPDevice *sclp, SCCB *sccb)
{
@@ -390,22 +168,6 @@ static void sclp_execute(SCLPDevice *sclp, SCCB *sccb, uint32_t code)
case SCLP_CMDW_READ_CPU_INFO:
sclp_c->read_cpu_info(sclp, sccb);
break;
- case SCLP_READ_STORAGE_ELEMENT_INFO:
- if (code & 0xff00) {
- sclp_c->read_storage_element1_info(sclp, sccb);
- } else {
- sclp_c->read_storage_element0_info(sclp, sccb);
- }
- break;
- case SCLP_ATTACH_STORAGE_ELEMENT:
- sclp_c->attach_storage_element(sclp, sccb, (code & 0xff00) >> 8);
- break;
- case SCLP_ASSIGN_STORAGE:
- sclp_c->assign_storage(sclp, sccb);
- break;
- case SCLP_UNASSIGN_STORAGE:
- sclp_c->unassign_storage(sclp, sccb);
- break;
case SCLP_CMDW_CONFIGURE_IOA:
sclp_configure_io_adapter(sclp, sccb, true);
break;
@@ -540,9 +302,6 @@ static void sclp_memory_init(SCLPDevice *sclp)
{
MachineState *machine = MACHINE(qdev_get_machine());
ram_addr_t initial_mem = machine->ram_size;
- ram_addr_t max_mem = machine->maxram_size;
- ram_addr_t standby_mem = max_mem - initial_mem;
- ram_addr_t pad_mem = 0;
int increment_size = 20;
/* The storage increment size is a multiple of 1M and is a power of 2.
@@ -552,34 +311,14 @@ static void sclp_memory_init(SCLPDevice *sclp)
while ((initial_mem >> increment_size) > MAX_STORAGE_INCREMENTS) {
increment_size++;
}
- if (machine->ram_slots) {
- while ((standby_mem >> increment_size) > MAX_STORAGE_INCREMENTS) {
- increment_size++;
- }
- }
sclp->increment_size = increment_size;
- /* The core and standby memory areas need to be aligned with
- * the increment size. In effect, this can cause the
- * user-specified memory size to be rounded down to align
- * with the nearest increment boundary. */
+ /* The core memory area needs to be aligned with the increment size.
+ * In effect, this can cause the user-specified memory size to be rounded
+ * down to align with the nearest increment boundary. */
initial_mem = initial_mem >> increment_size << increment_size;
- standby_mem = standby_mem >> increment_size << increment_size;
-
- /* If the size of ram is not on a MEM_SECTION_SIZE boundary,
- calculate the pad size necessary to force this boundary. */
- if (machine->ram_slots && standby_mem) {
- sclpMemoryHotplugDev *mhd = init_sclp_memory_hotplug_dev();
- if (initial_mem % MEM_SECTION_SIZE) {
- pad_mem = MEM_SECTION_SIZE - initial_mem % MEM_SECTION_SIZE;
- }
- mhd->increment_size = increment_size;
- mhd->pad_size = pad_mem;
- mhd->standby_mem_size = standby_mem;
- }
machine->ram_size = initial_mem;
- machine->maxram_size = initial_mem + pad_mem + standby_mem;
/* let's propagate the changed ram size into the global variable. */
ram_size = initial_mem;
}
@@ -613,11 +352,6 @@ static void sclp_class_init(ObjectClass *oc, void *data)
dc->user_creatable = false;
sc->read_SCP_info = read_SCP_info;
- sc->read_storage_element0_info = read_storage_element0_info;
- sc->read_storage_element1_info = read_storage_element1_info;
- sc->attach_storage_element = attach_storage_element;
- sc->assign_storage = assign_storage;
- sc->unassign_storage = unassign_storage;
sc->read_cpu_info = sclp_read_cpu_info;
sc->execute = sclp_execute;
sc->service_interrupt = service_interrupt;
@@ -632,42 +366,8 @@ static TypeInfo sclp_info = {
.class_size = sizeof(SCLPDeviceClass),
};
-sclpMemoryHotplugDev *init_sclp_memory_hotplug_dev(void)
-{
- DeviceState *dev;
- dev = qdev_create(NULL, TYPE_SCLP_MEMORY_HOTPLUG_DEV);
- object_property_add_child(qdev_get_machine(),
- TYPE_SCLP_MEMORY_HOTPLUG_DEV,
- OBJECT(dev), NULL);
- qdev_init_nofail(dev);
- return SCLP_MEMORY_HOTPLUG_DEV(object_resolve_path(
- TYPE_SCLP_MEMORY_HOTPLUG_DEV, NULL));
-}
-
-sclpMemoryHotplugDev *get_sclp_memory_hotplug_dev(void)
-{
- return SCLP_MEMORY_HOTPLUG_DEV(object_resolve_path(
- TYPE_SCLP_MEMORY_HOTPLUG_DEV, NULL));
-}
-
-static void sclp_memory_hotplug_dev_class_init(ObjectClass *klass,
- void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(klass);
-
- set_bit(DEVICE_CATEGORY_MISC, dc->categories);
-}
-
-static TypeInfo sclp_memory_hotplug_dev_info = {
- .name = TYPE_SCLP_MEMORY_HOTPLUG_DEV,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(sclpMemoryHotplugDev),
- .class_init = sclp_memory_hotplug_dev_class_init,
-};
-
static void register_types(void)
{
- type_register_static(&sclp_memory_hotplug_dev_info);
type_register_static(&sclp_info);
}
type_init(register_types);
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index 8af36ca3d4..426f971311 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -223,7 +223,7 @@ static void xilinx_spips_update_cs(XilinxSPIPS *s, int field)
{
int i;
- for (i = 0; i < s->num_cs; i++) {
+ for (i = 0; i < s->num_cs * s->num_busses; i++) {
bool old_state = s->cs_lines_state[i];
bool new_state = field & (1 << i);
@@ -234,7 +234,7 @@ static void xilinx_spips_update_cs(XilinxSPIPS *s, int field)
}
qemu_set_irq(s->cs_lines[i], !new_state);
}
- if (!(field & ((1 << s->num_cs) - 1))) {
+ if (!(field & ((1 << (s->num_cs * s->num_busses)) - 1))) {
s->snoop_state = SNOOP_CHECKING;
s->cmd_dummies = 0;
s->link_state = 1;
@@ -248,7 +248,40 @@ static void xlnx_zynqmp_qspips_update_cs_lines(XlnxZynqMPQSPIPS *s)
{
if (s->regs[R_GQSPI_GF_SNAPSHOT]) {
int field = ARRAY_FIELD_EX32(s->regs, GQSPI_GF_SNAPSHOT, CHIP_SELECT);
- xilinx_spips_update_cs(XILINX_SPIPS(s), field);
+ bool upper_cs_sel = field & (1 << 1);
+ bool lower_cs_sel = field & 1;
+ bool bus0_enabled;
+ bool bus1_enabled;
+ uint8_t buses;
+ int cs = 0;
+
+ buses = ARRAY_FIELD_EX32(s->regs, GQSPI_GF_SNAPSHOT, DATA_BUS_SELECT);
+ bus0_enabled = buses & 1;
+ bus1_enabled = buses & (1 << 1);
+
+ if (bus0_enabled && bus1_enabled) {
+ if (lower_cs_sel) {
+ cs |= 1;
+ }
+ if (upper_cs_sel) {
+ cs |= 1 << 3;
+ }
+ } else if (bus0_enabled) {
+ if (lower_cs_sel) {
+ cs |= 1;
+ }
+ if (upper_cs_sel) {
+ cs |= 1 << 1;
+ }
+ } else if (bus1_enabled) {
+ if (lower_cs_sel) {
+ cs |= 1 << 2;
+ }
+ if (upper_cs_sel) {
+ cs |= 1 << 3;
+ }
+ }
+ xilinx_spips_update_cs(XILINX_SPIPS(s), cs);
}
}
@@ -260,7 +293,7 @@ static void xilinx_spips_update_cs_lines(XilinxSPIPS *s)
if (num_effective_busses(s) == 2) {
/* Single bit chip-select for qspi */
field &= 0x1;
- field |= field << 1;
+ field |= field << 3;
/* Dual stack U-Page */
} else if (s->regs[R_LQSPI_CFG] & LQSPI_CFG_TWO_MEM &&
s->regs[R_LQSPI_STS] & LQSPI_CFG_U_PAGE) {
@@ -544,7 +577,7 @@ static int xilinx_spips_num_dummies(XilinxQSPIPS *qs, uint8_t command)
return 2;
case QIOR:
case QIOR_4:
- return 5;
+ return 4;
default:
return -1;
}
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-08 04:57:24 +0000