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-rw-r--r--hw/alpha/dp264.c2
-rw-r--r--hw/cris/axis_dev88.c2
-rw-r--r--hw/display/edid-generate.c4
-rw-r--r--hw/display/qxl.c2
-rw-r--r--hw/hppa/machine.c2
-rw-r--r--hw/i386/pc_piix.c10
-rw-r--r--hw/lm32/lm32_boards.c3
-rw-r--r--hw/lm32/milkymist.c1
-rw-r--r--hw/m68k/mcf5208.c2
-rw-r--r--hw/m68k/q800.c1
-rw-r--r--hw/microblaze/petalogix_ml605_mmu.c1
-rw-r--r--hw/microblaze/petalogix_s3adsp1800_mmu.c2
-rw-r--r--hw/mips/mips_malta.c2
-rw-r--r--hw/moxie/moxiesim.c2
-rw-r--r--hw/nios2/10m50_devboard.c2
-rw-r--r--hw/openrisc/openrisc_sim.c2
-rw-r--r--hw/ppc/mac_oldworld.c2
-rw-r--r--hw/ppc/spapr.c2
-rw-r--r--hw/riscv/sifive_clint.c6
-rw-r--r--hw/riscv/sifive_e.c2
-rw-r--r--hw/riscv/sifive_u.c2
-rw-r--r--hw/riscv/spike.c11
-rw-r--r--hw/riscv/virt.c3
-rw-r--r--hw/s390x/s390-virtio-ccw.c2
-rw-r--r--hw/sh4/shix.c2
-rw-r--r--hw/sparc/sun4m.c2
-rw-r--r--hw/sparc64/sun4u.c2
-rw-r--r--hw/tricore/tricore_testboard.c1
-rw-r--r--hw/unicore32/puv3.c2
29 files changed, 41 insertions, 38 deletions
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 8d71a30617..d28f57199f 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -181,7 +181,7 @@ static void clipper_machine_init(MachineClass *mc)
mc->init = clipper_init;
mc->block_default_type = IF_IDE;
mc->max_cpus = 4;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = ALPHA_CPU_TYPE_NAME("ev67");
mc->default_ram_id = "ram";
}
diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c
index cf6790fd6f..75e5c993b5 100644
--- a/hw/cris/axis_dev88.c
+++ b/hw/cris/axis_dev88.c
@@ -344,7 +344,7 @@ static void axisdev88_machine_init(MachineClass *mc)
{
mc->desc = "AXIS devboard 88";
mc->init = axisdev88_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = CRIS_CPU_TYPE_NAME("crisv32");
mc->default_ram_id = "axisdev88.ram";
}
diff --git a/hw/display/edid-generate.c b/hw/display/edid-generate.c
index 75c945a948..e58472fde5 100644
--- a/hw/display/edid-generate.c
+++ b/hw/display/edid-generate.c
@@ -360,8 +360,8 @@ void qemu_edid_generate(uint8_t *edid, size_t size,
edid[20] = 0xa5;
/* screen size: undefined */
- edid[21] = info->prefx * info->dpi / 2540;
- edid[22] = info->prefy * info->dpi / 2540;
+ edid[21] = info->prefx * 254 / 100 / info->dpi;
+ edid[22] = info->prefy * 254 / 100 / info->dpi;
/* display gamma: 2.2 */
edid[23] = 220 - 100;
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index 21a43a1d5e..227da69a50 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -2136,7 +2136,7 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
pci_set_byte(&config[PCI_INTERRUPT_PIN], 1);
qxl->rom_size = qxl_rom_size();
- memory_region_init_ram(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom",
+ memory_region_init_rom(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom",
qxl->rom_size, &error_fatal);
init_qxl_rom(qxl);
init_qxl_ram(qxl);
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 67181e75ba..bf18767e24 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -290,7 +290,7 @@ static void machine_hppa_machine_init(MachineClass *mc)
mc->block_default_type = IF_SCSI;
mc->max_cpus = HPPA_MAX_CPUS;
mc->default_cpus = 1;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_ram_size = 512 * MiB;
mc->default_boot_order = "cd";
mc->default_ram_id = "ram";
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index fa12203079..9088db8fb6 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -423,7 +423,7 @@ static void pc_i440fx_5_0_machine_options(MachineClass *m)
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_i440fx_machine_options(m);
m->alias = "pc";
- m->is_default = 1;
+ m->is_default = true;
pcmc->default_cpu_version = 1;
}
@@ -434,7 +434,7 @@ static void pc_i440fx_4_2_machine_options(MachineClass *m)
{
pc_i440fx_5_0_machine_options(m);
m->alias = NULL;
- m->is_default = 0;
+ m->is_default = false;
compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
}
@@ -446,7 +446,7 @@ static void pc_i440fx_4_1_machine_options(MachineClass *m)
{
pc_i440fx_4_2_machine_options(m);
m->alias = NULL;
- m->is_default = 0;
+ m->is_default = false;
compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
}
@@ -459,7 +459,7 @@ static void pc_i440fx_4_0_machine_options(MachineClass *m)
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_i440fx_4_1_machine_options(m);
m->alias = NULL;
- m->is_default = 0;
+ m->is_default = false;
pcmc->default_cpu_version = CPU_VERSION_LEGACY;
compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
@@ -473,7 +473,7 @@ static void pc_i440fx_3_1_machine_options(MachineClass *m)
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_i440fx_4_0_machine_options(m);
- m->is_default = 0;
+ m->is_default = false;
pcmc->do_not_add_smb_acpi = true;
m->smbus_no_migration_support = true;
m->alias = NULL;
diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
index 4e0a98c117..b842f74344 100644
--- a/hw/lm32/lm32_boards.c
+++ b/hw/lm32/lm32_boards.c
@@ -295,7 +295,7 @@ static void lm32_evr_class_init(ObjectClass *oc, void *data)
mc->desc = "LatticeMico32 EVR32 eval system";
mc->init = lm32_evr_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
mc->default_ram_size = 64 * MiB;
mc->default_ram_id = "lm32_evr.sdram";
@@ -313,7 +313,6 @@ static void lm32_uclinux_class_init(ObjectClass *oc, void *data)
mc->desc = "lm32 platform for uClinux and u-boot by Theobroma Systems";
mc->init = lm32_uclinux_init;
- mc->is_default = 0;
mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
mc->default_ram_size = 64 * MiB;
mc->default_ram_id = "lm32_uclinux.sdram";
diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
index 5c72266e58..85913bb68b 100644
--- a/hw/lm32/milkymist.c
+++ b/hw/lm32/milkymist.c
@@ -219,7 +219,6 @@ static void milkymist_machine_init(MachineClass *mc)
{
mc->desc = "Milkymist One";
mc->init = milkymist_init;
- mc->is_default = 0;
mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
mc->default_ram_size = 128 * MiB;
mc->default_ram_id = "milkymist.sdram";
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index 31622c71cb..b84c152ce3 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -350,7 +350,7 @@ static void mcf5208evb_machine_init(MachineClass *mc)
{
mc->desc = "MCF5208EVB";
mc->init = mcf5208evb_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = M68K_CPU_TYPE_NAME("m5208");
mc->default_ram_id = "mcf5208.ram";
}
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index a4c4bc14cb..c5699f6f3e 100644
--- a/hw/m68k/q800.c
+++ b/hw/m68k/q800.c
@@ -438,7 +438,6 @@ static void q800_machine_class_init(ObjectClass *oc, void *data)
mc->init = q800_init;
mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
mc->max_cpus = 1;
- mc->is_default = 0;
mc->block_default_type = IF_SCSI;
mc->default_ram_id = "m68k_mac.ram";
}
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index 09486bc8bf..0a2640c40b 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -216,7 +216,6 @@ static void petalogix_ml605_machine_init(MachineClass *mc)
{
mc->desc = "PetaLogix linux refdesign for xilinx ml605 little endian";
mc->init = petalogix_ml605_init;
- mc->is_default = 0;
}
DEFINE_MACHINE("petalogix-ml605", petalogix_ml605_machine_init)
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index 849bafc186..0bb6cdea8d 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -132,7 +132,7 @@ static void petalogix_s3adsp1800_machine_init(MachineClass *mc)
{
mc->desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800";
mc->init = petalogix_s3adsp1800_init;
- mc->is_default = 1;
+ mc->is_default = true;
}
DEFINE_MACHINE("petalogix-s3adsp1800", petalogix_s3adsp1800_machine_init)
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 6e7ba9235d..d380f73d7b 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -1439,7 +1439,7 @@ static void mips_malta_machine_init(MachineClass *mc)
mc->init = mips_malta_init;
mc->block_default_type = IF_IDE;
mc->max_cpus = 16;
- mc->is_default = 1;
+ mc->is_default = true;
#ifdef TARGET_MIPS64
mc->default_cpu_type = MIPS_CPU_TYPE_NAME("20Kc");
#else
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
index 1d06e39fcb..51a98287b5 100644
--- a/hw/moxie/moxiesim.c
+++ b/hw/moxie/moxiesim.c
@@ -150,7 +150,7 @@ static void moxiesim_machine_init(MachineClass *mc)
{
mc->desc = "Moxie simulator platform";
mc->init = moxiesim_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = MOXIE_CPU_TYPE_NAME("MoxieLite");
}
diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c
index ad8b2fc670..33dc2bf511 100644
--- a/hw/nios2/10m50_devboard.c
+++ b/hw/nios2/10m50_devboard.c
@@ -120,7 +120,7 @@ static void nios2_10m50_ghrd_machine_init(struct MachineClass *mc)
{
mc->desc = "Altera 10M50 GHRD Nios II design";
mc->init = nios2_10m50_ghrd_init;
- mc->is_default = 1;
+ mc->is_default = true;
}
DEFINE_MACHINE("10m50-ghrd", nios2_10m50_ghrd_machine_init);
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index ad5371250f..d08ce61811 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -176,7 +176,7 @@ static void openrisc_sim_machine_init(MachineClass *mc)
mc->desc = "or1k simulation";
mc->init = openrisc_sim_init;
mc->max_cpus = 2;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200");
}
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 66e434bba3..440c406eb4 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -435,7 +435,7 @@ static void heathrow_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_IDE;
mc->max_cpus = MAX_CPUS;
#ifndef TARGET_PPC64
- mc->is_default = 1;
+ mc->is_default = true;
#endif
/* TOFIX "cad" when Mac floppy is implemented */
mc->default_boot_order = "cd";
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index c03ce6afb9..cc10798be4 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -4560,7 +4560,7 @@ static const TypeInfo spapr_machine_info = {
static void spapr_machine_latest_class_options(MachineClass *mc)
{
mc->alias = "pseries";
- mc->is_default = 1;
+ mc->is_default = true;
}
#define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \
diff --git a/hw/riscv/sifive_clint.c b/hw/riscv/sifive_clint.c
index e2feee871b..e933d35092 100644
--- a/hw/riscv/sifive_clint.c
+++ b/hw/riscv/sifive_clint.c
@@ -227,7 +227,8 @@ type_init(sifive_clint_register_types)
* Create CLINT device.
*/
DeviceState *sifive_clint_create(hwaddr addr, hwaddr size, uint32_t num_harts,
- uint32_t sip_base, uint32_t timecmp_base, uint32_t time_base)
+ uint32_t sip_base, uint32_t timecmp_base, uint32_t time_base,
+ bool provide_rdtime)
{
int i;
for (i = 0; i < num_harts; i++) {
@@ -236,6 +237,9 @@ DeviceState *sifive_clint_create(hwaddr addr, hwaddr size, uint32_t num_harts,
if (!env) {
continue;
}
+ if (provide_rdtime) {
+ riscv_cpu_set_rdtime_fn(env, cpu_riscv_read_rtc);
+ }
env->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
&sifive_clint_timer_cb, cpu);
env->timecmp = 0;
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index 8a6b0348df..a254cad489 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -164,7 +164,7 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
memmap[SIFIVE_E_PLIC].size);
sifive_clint_create(memmap[SIFIVE_E_CLINT].base,
memmap[SIFIVE_E_CLINT].size, ms->smp.cpus,
- SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE);
+ SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE, false);
create_unimplemented_device("riscv.sifive.e.aon",
memmap[SIFIVE_E_AON].base, memmap[SIFIVE_E_AON].size);
sifive_e_prci_create(memmap[SIFIVE_E_PRCI].base);
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 0e12b3ccef..156a003642 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -549,7 +549,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
serial_hd(1), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART1_IRQ));
sifive_clint_create(memmap[SIFIVE_U_CLINT].base,
memmap[SIFIVE_U_CLINT].size, ms->smp.cpus,
- SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE);
+ SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE, false);
object_property_set_bool(OBJECT(&s->prci), true, "realized", &err);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->prci), 0, memmap[SIFIVE_U_PRCI].base);
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 8823681783..5053fe4590 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -227,7 +227,8 @@ static void spike_board_init(MachineState *machine)
/* Core Local Interruptor (timer and IPI) */
sifive_clint_create(memmap[SPIKE_CLINT].base, memmap[SPIKE_CLINT].size,
- smp_cpus, SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE);
+ smp_cpus, SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE,
+ false);
}
static void spike_v1_10_0_board_init(MachineState *machine)
@@ -316,7 +317,8 @@ static void spike_v1_10_0_board_init(MachineState *machine)
/* Core Local Interruptor (timer and IPI) */
sifive_clint_create(memmap[SPIKE_CLINT].base, memmap[SPIKE_CLINT].size,
- smp_cpus, SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE);
+ smp_cpus, SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE,
+ false);
}
static void spike_v1_09_1_board_init(MachineState *machine)
@@ -424,7 +426,8 @@ static void spike_v1_09_1_board_init(MachineState *machine)
/* Core Local Interruptor (timer and IPI) */
sifive_clint_create(memmap[SPIKE_CLINT].base, memmap[SPIKE_CLINT].size,
- smp_cpus, SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE);
+ smp_cpus, SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE,
+ false);
g_free(config_string);
}
@@ -448,7 +451,7 @@ static void spike_machine_init(MachineClass *mc)
mc->desc = "RISC-V Spike Board";
mc->init = spike_board_init;
mc->max_cpus = 1;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = SPIKE_V1_10_0_CPU;
}
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 7f9e1e5176..85ec9e22aa 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -593,7 +593,7 @@ static void riscv_virt_board_init(MachineState *machine)
memmap[VIRT_PLIC].size);
sifive_clint_create(memmap[VIRT_CLINT].base,
memmap[VIRT_CLINT].size, smp_cpus,
- SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE);
+ SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE, true);
sifive_test_create(memmap[VIRT_TEST].base);
for (i = 0; i < VIRTIO_COUNT; i++) {
@@ -641,6 +641,7 @@ static void riscv_virt_machine_class_init(ObjectClass *oc, void *data)
mc->init = riscv_virt_board_init;
mc->max_cpus = 8;
mc->default_cpu_type = VIRT_CPU;
+ mc->pci_allow_0_address = true;
}
static const TypeInfo riscv_virt_machine_typeinfo = {
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index a89cf4c129..895498cca6 100644
--- a/hw/s390x/s390-virtio-ccw.c
+++ b/hw/s390x/s390-virtio-ccw.c
@@ -630,7 +630,7 @@ bool css_migration_enabled(void)
mc->desc = "VirtIO-ccw based S390 machine v" verstr; \
if (latest) { \
mc->alias = "s390-ccw-virtio"; \
- mc->is_default = 1; \
+ mc->is_default = true; \
} \
} \
static void ccw_machine_##suffix##_instance_init(Object *obj) \
diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c
index 2fc2915428..68b14ee5e7 100644
--- a/hw/sh4/shix.c
+++ b/hw/sh4/shix.c
@@ -82,7 +82,7 @@ static void shix_machine_init(MachineClass *mc)
{
mc->desc = "shix card";
mc->init = shix_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = TYPE_SH7750R_CPU;
}
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index f5bf95fc9f..36ee1a0a3d 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -1402,7 +1402,7 @@ static void ss5_class_init(ObjectClass *oc, void *data)
mc->desc = "Sun4m platform, SPARCstation 5";
mc->init = ss5_init;
mc->block_default_type = IF_SCSI;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_boot_order = "c";
mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
mc->default_display = "tcx";
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index b7ac42f7a5..d33e84f831 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -816,7 +816,7 @@ static void sun4u_class_init(ObjectClass *oc, void *data)
mc->init = sun4u_init;
mc->block_default_type = IF_IDE;
mc->max_cpus = 1; /* XXX for now */
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_boot_order = "c";
mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-UltraSparc-IIi");
mc->ignore_boot_device_suffixes = true;
diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c
index 20c9ccb3ce..8ec2b5bddd 100644
--- a/hw/tricore/tricore_testboard.c
+++ b/hw/tricore/tricore_testboard.c
@@ -105,7 +105,6 @@ static void ttb_machine_init(MachineClass *mc)
{
mc->desc = "a minimal TriCore board";
mc->init = tricoreboard_init;
- mc->is_default = 0;
mc->default_cpu_type = TRICORE_CPU_TYPE_NAME("tc1796");
}
diff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c
index 7e933de228..7f9c0238fe 100644
--- a/hw/unicore32/puv3.c
+++ b/hw/unicore32/puv3.c
@@ -140,7 +140,7 @@ static void puv3_machine_init(MachineClass *mc)
{
mc->desc = "PKUnity Version-3 based on UniCore32";
mc->init = puv3_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = UNICORE32_CPU_TYPE_NAME("UniCore-II");
}
generated by cgit v1.2.3 (git 2.26.2) at 2025-02-06 00:10:53 +0000