diff options
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/mcf5208.c | 72 |
1 files changed, 32 insertions, 40 deletions
diff --git a/hw/mcf5208.c b/hw/mcf5208.c index 8fe507f82f..1c2c0c48aa 100644 --- a/hw/mcf5208.c +++ b/hw/mcf5208.c @@ -13,6 +13,7 @@ #include "boards.h" #include "loader.h" #include "elf.h" +#include "exec-memory.h" #define SYS_FREQ 66000000 @@ -27,6 +28,7 @@ #define PCSR_PRE_MASK 0x0f00 typedef struct { + MemoryRegion iomem; qemu_irq irq; ptimer_state *timer; uint16_t pcsr; @@ -43,7 +45,7 @@ static void m5208_timer_update(m5208_timer_state *s) } static void m5208_timer_write(void *opaque, target_phys_addr_t offset, - uint32_t value) + uint64_t value, unsigned size) { m5208_timer_state *s = (m5208_timer_state *)opaque; int prescale; @@ -104,7 +106,8 @@ static void m5208_timer_trigger(void *opaque) m5208_timer_update(s); } -static uint32_t m5208_timer_read(void *opaque, target_phys_addr_t addr) +static uint64_t m5208_timer_read(void *opaque, target_phys_addr_t addr, + unsigned size) { m5208_timer_state *s = (m5208_timer_state *)opaque; switch (addr) { @@ -120,19 +123,14 @@ static uint32_t m5208_timer_read(void *opaque, target_phys_addr_t addr) } } -static CPUReadMemoryFunc * const m5208_timer_readfn[] = { - m5208_timer_read, - m5208_timer_read, - m5208_timer_read +static const MemoryRegionOps m5208_timer_ops = { + .read = m5208_timer_read, + .write = m5208_timer_write, + .endianness = DEVICE_NATIVE_ENDIAN, }; -static CPUWriteMemoryFunc * const m5208_timer_writefn[] = { - m5208_timer_write, - m5208_timer_write, - m5208_timer_write -}; - -static uint32_t m5208_sys_read(void *opaque, target_phys_addr_t addr) +static uint64_t m5208_sys_read(void *opaque, target_phys_addr_t addr, + unsigned size) { switch (addr) { case 0x110: /* SDCS0 */ @@ -154,45 +152,36 @@ static uint32_t m5208_sys_read(void *opaque, target_phys_addr_t addr) } static void m5208_sys_write(void *opaque, target_phys_addr_t addr, - uint32_t value) + uint64_t value, unsigned size) { hw_error("m5208_sys_write: Bad offset 0x%x\n", (int)addr); } -static CPUReadMemoryFunc * const m5208_sys_readfn[] = { - m5208_sys_read, - m5208_sys_read, - m5208_sys_read -}; - -static CPUWriteMemoryFunc * const m5208_sys_writefn[] = { - m5208_sys_write, - m5208_sys_write, - m5208_sys_write +static const MemoryRegionOps m5208_sys_ops = { + .read = m5208_sys_read, + .write = m5208_sys_write, + .endianness = DEVICE_NATIVE_ENDIAN, }; -static void mcf5208_sys_init(qemu_irq *pic) +static void mcf5208_sys_init(MemoryRegion *address_space, qemu_irq *pic) { - int iomemtype; + MemoryRegion *iomem = g_new(MemoryRegion, 1); m5208_timer_state *s; QEMUBH *bh; int i; - iomemtype = cpu_register_io_memory(m5208_sys_readfn, - m5208_sys_writefn, NULL, - DEVICE_NATIVE_ENDIAN); /* SDRAMC. */ - cpu_register_physical_memory(0xfc0a8000, 0x00004000, iomemtype); + memory_region_init_io(iomem, &m5208_sys_ops, NULL, "m5208-sys", 0x00004000); + memory_region_add_subregion(address_space, 0xfc0a8000, iomem); /* Timers. */ for (i = 0; i < 2; i++) { s = (m5208_timer_state *)g_malloc0(sizeof(m5208_timer_state)); bh = qemu_bh_new(m5208_timer_trigger, s); s->timer = ptimer_init(bh); - iomemtype = cpu_register_io_memory(m5208_timer_readfn, - m5208_timer_writefn, s, - DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory(0xfc080000 + 0x4000 * i, 0x00004000, - iomemtype); + memory_region_init_io(&s->iomem, &m5208_timer_ops, s, + "m5208-timer", 0x00004000); + memory_region_add_subregion(address_space, 0xfc080000 + 0x4000 * i, + &s->iomem); s->irq = pic[4 + i]; } } @@ -207,6 +196,9 @@ static void mcf5208evb_init(ram_addr_t ram_size, uint64_t elf_entry; target_phys_addr_t entry; qemu_irq *pic; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *ram = g_new(MemoryRegion, 1); + MemoryRegion *sram = g_new(MemoryRegion, 1); if (!cpu_model) cpu_model = "m5208"; @@ -221,12 +213,12 @@ static void mcf5208evb_init(ram_addr_t ram_size, /* TODO: Configure BARs. */ /* DRAM at 0x40000000 */ - cpu_register_physical_memory(0x40000000, ram_size, - qemu_ram_alloc(NULL, "mcf5208.ram", ram_size) | IO_MEM_RAM); + memory_region_init_ram(ram, NULL, "mcf5208.ram", ram_size); + memory_region_add_subregion(address_space_mem, 0x40000000, ram); /* Internal SRAM. */ - cpu_register_physical_memory(0x80000000, 16384, - qemu_ram_alloc(NULL, "mcf5208.sram", 16384) | IO_MEM_RAM); + memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384); + memory_region_add_subregion(address_space_mem, 0x80000000, sram); /* Internal peripherals. */ pic = mcf_intc_init(0xfc048000, env); @@ -235,7 +227,7 @@ static void mcf5208evb_init(ram_addr_t ram_size, mcf_uart_mm_init(0xfc064000, pic[27], serial_hds[1]); mcf_uart_mm_init(0xfc068000, pic[28], serial_hds[2]); - mcf5208_sys_init(pic); + mcf5208_sys_init(address_space_mem, pic); if (nb_nics > 1) { fprintf(stderr, "Too many NICs\n"); |