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-rw-r--r--hw/arm/exynos4210.c13
-rw-r--r--hw/arm/highbank.c7
-rw-r--r--hw/arm/integratorcp.c13
-rw-r--r--hw/arm/realview.c20
-rw-r--r--hw/arm/versatilepb.c13
-rw-r--r--hw/arm/vexpress.c7
-rw-r--r--hw/arm/xilinx_zynq.c28
-rw-r--r--hw/char/serial.c14
-rw-r--r--hw/core/qdev-properties-system.c8
-rw-r--r--hw/i386/pc.c14
-rw-r--r--hw/smbios/smbios.c43
11 files changed, 30 insertions, 150 deletions
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index d934980efa..79b7c5ab3d 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -150,27 +150,18 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
for (n = 0; n < EXYNOS4210_NCPUS; n++) {
Object *cpuobj = object_new(object_class_get_name(cpu_oc));
- Error *err = NULL;
/* By default A9 CPUs have EL3 enabled. This board does not currently
* support EL3 so the CPU EL3 property is disabled before realization.
*/
if (object_property_find(cpuobj, "has_el3", NULL)) {
- object_property_set_bool(cpuobj, false, "has_el3", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, false, "has_el3", &error_fatal);
}
s->cpu[n] = ARM_CPU(cpuobj);
object_property_set_int(cpuobj, EXYNOS4210_SMP_PRIVATE_BASE_ADDR,
"reset-cbar", &error_abort);
- object_property_set_bool(cpuobj, true, "realized", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, true, "realized", &error_fatal);
}
/*** IRQs ***/
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index 85ae69efd9..a0a5a061ea 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -279,7 +279,6 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
ObjectClass *oc = cpu_class_by_name(TYPE_ARM_CPU, cpu_model);
Object *cpuobj;
ARMCPU *cpu;
- Error *err = NULL;
cpuobj = object_new(object_class_get_name(oc));
cpu = ARM_CPU(cpuobj);
@@ -297,11 +296,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
object_property_set_int(cpuobj, MPCORE_PERIPHBASE,
"reset-cbar", &error_abort);
}
- object_property_set_bool(cpuobj, true, "realized", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, true, "realized", &error_fatal);
cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ);
cpu_fiq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_FIQ);
}
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index 421bde9a1c..96dedce906 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -533,7 +533,6 @@ static void integratorcp_init(MachineState *machine)
qemu_irq pic[32];
DeviceState *dev, *sic, *icp;
int i;
- Error *err = NULL;
if (!cpu_model) {
cpu_model = "arm926";
@@ -552,18 +551,10 @@ static void integratorcp_init(MachineState *machine)
* realization.
*/
if (object_property_find(cpuobj, "has_el3", NULL)) {
- object_property_set_bool(cpuobj, false, "has_el3", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, false, "has_el3", &error_fatal);
}
- object_property_set_bool(cpuobj, true, "realized", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, true, "realized", &error_fatal);
cpu = ARM_CPU(cpuobj);
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index e14828db0d..2d6952c393 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -99,33 +99,21 @@ static void realview_init(MachineState *machine,
for (n = 0; n < smp_cpus; n++) {
Object *cpuobj = object_new(object_class_get_name(cpu_oc));
- Error *err = NULL;
/* By default A9,A15 and ARM1176 CPUs have EL3 enabled. This board
* does not currently support EL3 so the CPU EL3 property is disabled
* before realization.
*/
if (object_property_find(cpuobj, "has_el3", NULL)) {
- object_property_set_bool(cpuobj, false, "has_el3", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, false, "has_el3", &error_fatal);
}
if (is_pb && is_mpcore) {
- object_property_set_int(cpuobj, periphbase, "reset-cbar", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_int(cpuobj, periphbase, "reset-cbar",
+ &error_fatal);
}
- object_property_set_bool(cpuobj, true, "realized", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, true, "realized", &error_fatal);
cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpuobj), ARM_CPU_IRQ);
}
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 912c2908f3..70eefe9987 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -192,7 +192,6 @@ static void versatile_init(MachineState *machine, int board_id)
int n;
int done_smc = 0;
DriveInfo *dinfo;
- Error *err = NULL;
if (!machine->cpu_model) {
machine->cpu_model = "arm926";
@@ -211,18 +210,10 @@ static void versatile_init(MachineState *machine, int board_id)
* realization.
*/
if (object_property_find(cpuobj, "has_el3", NULL)) {
- object_property_set_bool(cpuobj, false, "has_el3", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, false, "has_el3", &error_fatal);
}
- object_property_set_bool(cpuobj, true, "realized", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, true, "realized", &error_fatal);
cpu = ARM_CPU(cpuobj);
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index 058abbde3f..ea9a9840d0 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -211,7 +211,6 @@ static void init_cpus(const char *cpu_model, const char *privdev,
/* Create the actual CPUs */
for (n = 0; n < smp_cpus; n++) {
Object *cpuobj = object_new(object_class_get_name(cpu_oc));
- Error *err = NULL;
if (!secure) {
object_property_set_bool(cpuobj, false, "has_el3", NULL);
@@ -221,11 +220,7 @@ static void init_cpus(const char *cpu_model, const char *privdev,
object_property_set_int(cpuobj, periphbase,
"reset-cbar", &error_abort);
}
- object_property_set_bool(cpuobj, true, "realized", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, true, "realized", &error_fatal);
}
/* Create the private peripheral devices (including the GIC);
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 1c1a44547f..65e92e1824 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -156,7 +156,6 @@ static void zynq_init(MachineState *machine)
DeviceState *dev;
SysBusDevice *busdev;
qemu_irq pic[64];
- Error *err = NULL;
int n;
if (!cpu_model) {
@@ -171,29 +170,14 @@ static void zynq_init(MachineState *machine)
* realization.
*/
if (object_property_find(OBJECT(cpu), "has_el3", NULL)) {
- object_property_set_bool(OBJECT(cpu), false, "has_el3", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
- }
-
- object_property_set_int(OBJECT(cpu), ZYNQ_BOARD_MIDR, "midr", &err);
- if (err) {
- error_report_err(err);
- exit(1);
+ object_property_set_bool(OBJECT(cpu), false, "has_el3", &error_fatal);
}
- object_property_set_int(OBJECT(cpu), MPCORE_PERIPHBASE, "reset-cbar", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
- object_property_set_bool(OBJECT(cpu), true, "realized", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_int(OBJECT(cpu), ZYNQ_BOARD_MIDR, "midr",
+ &error_fatal);
+ object_property_set_int(OBJECT(cpu), MPCORE_PERIPHBASE, "reset-cbar",
+ &error_fatal);
+ object_property_set_bool(OBJECT(cpu), true, "realized", &error_fatal);
/* max 2GB ram */
if (ram_size > 0x80000000) {
diff --git a/hw/char/serial.c b/hw/char/serial.c
index 513d73c27f..566e9ef194 100644
--- a/hw/char/serial.c
+++ b/hw/char/serial.c
@@ -888,18 +888,13 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase,
CharDriverState *chr, MemoryRegion *system_io)
{
SerialState *s;
- Error *err = NULL;
s = g_malloc0(sizeof(SerialState));
s->irq = irq;
s->baudbase = baudbase;
s->chr = chr;
- serial_realize_core(s, &err);
- if (err != NULL) {
- error_report_err(err);
- exit(1);
- }
+ serial_realize_core(s, &error_fatal);
vmstate_register(NULL, base, &vmstate_serial, s);
@@ -949,7 +944,6 @@ SerialState *serial_mm_init(MemoryRegion *address_space,
CharDriverState *chr, enum device_endian end)
{
SerialState *s;
- Error *err = NULL;
s = g_malloc0(sizeof(SerialState));
@@ -958,11 +952,7 @@ SerialState *serial_mm_init(MemoryRegion *address_space,
s->baudbase = baudbase;
s->chr = chr;
- serial_realize_core(s, &err);
- if (err != NULL) {
- error_report_err(err);
- exit(1);
- }
+ serial_realize_core(s, &error_fatal);
vmstate_register(NULL, base, &vmstate_serial, s);
memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], s,
diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-system.c
index 921e799dbb..d515e99f98 100644
--- a/hw/core/qdev-properties-system.c
+++ b/hw/core/qdev-properties-system.c
@@ -367,13 +367,7 @@ void qdev_prop_set_drive(DeviceState *dev, const char *name,
void qdev_prop_set_drive_nofail(DeviceState *dev, const char *name,
BlockBackend *value)
{
- Error *err = NULL;
-
- qdev_prop_set_drive(dev, name, value, &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ qdev_prop_set_drive(dev, name, value, &error_fatal);
}
void qdev_prop_set_chr(DeviceState *dev, const char *name,
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index c36b8cf45a..166e8e2112 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -433,7 +433,6 @@ void pc_cmos_init(PCMachineState *pcms,
{
int val;
static pc_cmos_init_late_arg arg;
- Error *local_err = NULL;
/* various important CMOS locations needed by PC/Bochs bios */
@@ -481,11 +480,7 @@ void pc_cmos_init(PCMachineState *pcms,
object_property_set_link(OBJECT(pcms), OBJECT(s),
"rtc_state", &error_abort);
- set_boot_dev(s, MACHINE(pcms)->boot_order, &local_err);
- if (local_err) {
- error_report_err(local_err);
- exit(1);
- }
+ set_boot_dev(s, MACHINE(pcms)->boot_order, &error_fatal);
val = 0;
val |= 0x02; /* FPU is there */
@@ -1123,7 +1118,6 @@ void pc_cpus_init(PCMachineState *pcms)
int i;
X86CPU *cpu = NULL;
MachineState *machine = MACHINE(pcms);
- Error *error = NULL;
unsigned long apic_id_limit;
/* init CPUs */
@@ -1144,11 +1138,7 @@ void pc_cpus_init(PCMachineState *pcms)
for (i = 0; i < smp_cpus; i++) {
cpu = pc_new_cpu(machine->cpu_model, x86_cpu_apic_id_from_index(i),
- &error);
- if (error) {
- error_report_err(error);
- exit(1);
- }
+ &error_fatal);
object_unref(OBJECT(cpu));
}
diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
index b81a1d349d..a3e575ac79 100644
--- a/hw/smbios/smbios.c
+++ b/hw/smbios/smbios.c
@@ -937,7 +937,6 @@ static void save_opt(const char **dest, QemuOpts *opts, const char *name)
void smbios_entry_add(QemuOpts *opts)
{
- Error *local_err = NULL;
const char *val;
assert(!smbios_immutable);
@@ -948,11 +947,7 @@ void smbios_entry_add(QemuOpts *opts)
int size;
struct smbios_table *table; /* legacy mode only */
- qemu_opts_validate(opts, qemu_smbios_file_opts, &local_err);
- if (local_err) {
- error_report_err(local_err);
- exit(1);
- }
+ qemu_opts_validate(opts, qemu_smbios_file_opts, &error_fatal);
size = get_image_size(val);
if (size == -1 || size < sizeof(struct smbios_structure_header)) {
@@ -1034,11 +1029,7 @@ void smbios_entry_add(QemuOpts *opts)
switch (type) {
case 0:
- qemu_opts_validate(opts, qemu_smbios_type0_opts, &local_err);
- if (local_err) {
- error_report_err(local_err);
- exit(1);
- }
+ qemu_opts_validate(opts, qemu_smbios_type0_opts, &error_fatal);
save_opt(&type0.vendor, opts, "vendor");
save_opt(&type0.version, opts, "version");
save_opt(&type0.date, opts, "date");
@@ -1054,11 +1045,7 @@ void smbios_entry_add(QemuOpts *opts)
}
return;
case 1:
- qemu_opts_validate(opts, qemu_smbios_type1_opts, &local_err);
- if (local_err) {
- error_report_err(local_err);
- exit(1);
- }
+ qemu_opts_validate(opts, qemu_smbios_type1_opts, &error_fatal);
save_opt(&type1.manufacturer, opts, "manufacturer");
save_opt(&type1.product, opts, "product");
save_opt(&type1.version, opts, "version");
@@ -1076,11 +1063,7 @@ void smbios_entry_add(QemuOpts *opts)
}
return;
case 2:
- qemu_opts_validate(opts, qemu_smbios_type2_opts, &local_err);
- if (local_err) {
- error_report_err(local_err);
- exit(1);
- }
+ qemu_opts_validate(opts, qemu_smbios_type2_opts, &error_fatal);
save_opt(&type2.manufacturer, opts, "manufacturer");
save_opt(&type2.product, opts, "product");
save_opt(&type2.version, opts, "version");
@@ -1089,11 +1072,7 @@ void smbios_entry_add(QemuOpts *opts)
save_opt(&type2.location, opts, "location");
return;
case 3:
- qemu_opts_validate(opts, qemu_smbios_type3_opts, &local_err);
- if (local_err) {
- error_report_err(local_err);
- exit(1);
- }
+ qemu_opts_validate(opts, qemu_smbios_type3_opts, &error_fatal);
save_opt(&type3.manufacturer, opts, "manufacturer");
save_opt(&type3.version, opts, "version");
save_opt(&type3.serial, opts, "serial");
@@ -1101,11 +1080,7 @@ void smbios_entry_add(QemuOpts *opts)
save_opt(&type3.sku, opts, "sku");
return;
case 4:
- qemu_opts_validate(opts, qemu_smbios_type4_opts, &local_err);
- if (local_err) {
- error_report_err(local_err);
- exit(1);
- }
+ qemu_opts_validate(opts, qemu_smbios_type4_opts, &error_fatal);
save_opt(&type4.sock_pfx, opts, "sock_pfx");
save_opt(&type4.manufacturer, opts, "manufacturer");
save_opt(&type4.version, opts, "version");
@@ -1114,11 +1089,7 @@ void smbios_entry_add(QemuOpts *opts)
save_opt(&type4.part, opts, "part");
return;
case 17:
- qemu_opts_validate(opts, qemu_smbios_type17_opts, &local_err);
- if (local_err) {
- error_report_err(local_err);
- exit(1);
- }
+ qemu_opts_validate(opts, qemu_smbios_type17_opts, &error_fatal);
save_opt(&type17.loc_pfx, opts, "loc_pfx");
save_opt(&type17.bank, opts, "bank");
save_opt(&type17.manufacturer, opts, "manufacturer");
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-26 11:50:18 +0000