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-rw-r--r--hw/alpha/dp264.c4
-rw-r--r--hw/cris/axis_dev88.c7
-rw-r--r--hw/i386/pc.c2
-rw-r--r--hw/lm32/lm32_boards.c14
-rw-r--r--hw/lm32/milkymist.c7
-rw-r--r--hw/m68k/an5206.c7
-rw-r--r--hw/m68k/mcf5208.c7
-rw-r--r--hw/mips/boston.c14
-rw-r--r--hw/mips/cps.c4
-rw-r--r--hw/mips/mips_fulong2e.c7
-rw-r--r--hw/mips/mips_jazz.c8
-rw-r--r--hw/mips/mips_malta.c36
-rw-r--r--hw/mips/mips_mipssim.c15
-rw-r--r--hw/mips/mips_r4k.c16
-rw-r--r--hw/moxie/moxiesim.c7
-rw-r--r--hw/openrisc/openrisc_sim.c8
-rw-r--r--hw/sh4/r2d.c8
-rw-r--r--hw/sh4/shix.c7
-rw-r--r--hw/sparc/leon3.c8
-rw-r--r--hw/sparc/sun4m.c29
-rw-r--r--hw/sparc64/niagara.c4
-rw-r--r--hw/sparc64/sparc64.c8
-rw-r--r--hw/sparc64/sun4u.c8
-rw-r--r--hw/tricore/tricore_testboard.c6
-rw-r--r--hw/unicore32/puv3.c8
-rw-r--r--hw/xtensa/sim.c8
-rw-r--r--hw/xtensa/xtfpga.c11
27 files changed, 97 insertions, 171 deletions
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 1b121306c2..babd6ea514 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -51,7 +51,6 @@ static int clipper_pci_map_irq(PCIDevice *d, int irq_num)
static void clipper_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model ? machine->cpu_model : "ev67";
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
@@ -67,7 +66,7 @@ static void clipper_init(MachineState *machine)
/* Create up to 4 cpus. */
memset(cpus, 0, sizeof(cpus));
for (i = 0; i < smp_cpus; ++i) {
- cpus[i] = ALPHA_CPU(cpu_generic_init(TYPE_ALPHA_CPU, cpu_model));
+ cpus[i] = ALPHA_CPU(cpu_create(machine->cpu_type));
}
cpus[0]->env.trap_arg0 = ram_size;
@@ -179,6 +178,7 @@ static void clipper_machine_init(MachineClass *mc)
mc->block_default_type = IF_IDE;
mc->max_cpus = 4;
mc->is_default = 1;
+ mc->default_cpu_type = ALPHA_CPU_TYPE_NAME("ev67");
}
DEFINE_MACHINE("clipper", clipper_machine_init)
diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c
index 5eb552bce2..9ccc4350a5 100644
--- a/hw/cris/axis_dev88.c
+++ b/hw/cris/axis_dev88.c
@@ -251,7 +251,6 @@ static
void axisdev88_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
CRISCPU *cpu;
@@ -268,10 +267,7 @@ void axisdev88_init(MachineState *machine)
MemoryRegion *phys_intmem = g_new(MemoryRegion, 1);
/* init CPUs */
- if (cpu_model == NULL) {
- cpu_model = "crisv32";
- }
- cpu = CRIS_CPU(cpu_generic_init(TYPE_CRIS_CPU, cpu_model));
+ cpu = CRIS_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
/* allocate RAM */
@@ -359,6 +355,7 @@ static void axisdev88_machine_init(MachineClass *mc)
mc->desc = "AXIS devboard 88";
mc->init = axisdev88_init;
mc->is_default = 1;
+ mc->default_cpu_type = CRIS_CPU_TYPE_NAME("crisv32");
}
DEFINE_MACHINE("axis-dev88", axisdev88_machine_init)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 8e307f7aff..e11a65b545 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1228,7 +1228,7 @@ void pc_machine_done(Notifier *notifier, void *data)
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
}
- if (pcms->apic_id_limit > 255) {
+ if (pcms->apic_id_limit > 255 && !xen_enabled()) {
IntelIOMMUState *iommu = INTEL_IOMMU_DEVICE(x86_iommu_get_default());
if (!iommu || !iommu->x86_iommu.intr_supported ||
diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
index b0bb3ef58a..002d638edd 100644
--- a/hw/lm32/lm32_boards.c
+++ b/hw/lm32/lm32_boards.c
@@ -75,7 +75,6 @@ static void main_cpu_reset(void *opaque)
static void lm32_evr_init(MachineState *machine)
{
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
LM32CPU *cpu;
CPULM32State *env;
@@ -101,10 +100,7 @@ static void lm32_evr_init(MachineState *machine)
reset_info = g_malloc0(sizeof(ResetInfo));
- if (cpu_model == NULL) {
- cpu_model = "lm32-full";
- }
- cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
+ cpu = LM32_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
reset_info->cpu = cpu;
@@ -163,7 +159,6 @@ static void lm32_evr_init(MachineState *machine)
static void lm32_uclinux_init(MachineState *machine)
{
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
@@ -198,10 +193,7 @@ static void lm32_uclinux_init(MachineState *machine)
reset_info = g_malloc0(sizeof(ResetInfo));
- if (cpu_model == NULL) {
- cpu_model = "lm32-full";
- }
- cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
+ cpu = LM32_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
reset_info->cpu = cpu;
@@ -295,6 +287,7 @@ static void lm32_evr_class_init(ObjectClass *oc, void *data)
mc->desc = "LatticeMico32 EVR32 eval system";
mc->init = lm32_evr_init;
mc->is_default = 1;
+ mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
}
static const TypeInfo lm32_evr_type = {
@@ -310,6 +303,7 @@ static void lm32_uclinux_class_init(ObjectClass *oc, void *data)
mc->desc = "lm32 platform for uClinux and u-boot by Theobroma Systems";
mc->init = lm32_uclinux_init;
mc->is_default = 0;
+ mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
}
static const TypeInfo lm32_uclinux_type = {
diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
index 4db4d2d533..d4e765f2eb 100644
--- a/hw/lm32/milkymist.c
+++ b/hw/lm32/milkymist.c
@@ -80,7 +80,6 @@ static void main_cpu_reset(void *opaque)
static void
milkymist_init(MachineState *machine)
{
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
@@ -108,10 +107,7 @@ milkymist_init(MachineState *machine)
reset_info = g_malloc0(sizeof(ResetInfo));
- if (cpu_model == NULL) {
- cpu_model = "lm32-full";
- }
- cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
+ cpu = LM32_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
reset_info->cpu = cpu;
@@ -216,6 +212,7 @@ static void milkymist_machine_init(MachineClass *mc)
mc->desc = "Milkymist One";
mc->init = milkymist_init;
mc->is_default = 0;
+ mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
}
DEFINE_MACHINE("milkymist", milkymist_machine_init)
diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c
index db634cbe89..5e067ea1c3 100644
--- a/hw/m68k/an5206.c
+++ b/hw/m68k/an5206.c
@@ -28,7 +28,6 @@
static void an5206_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
M68kCPU *cpu;
CPUM68KState *env;
@@ -39,10 +38,7 @@ static void an5206_init(MachineState *machine)
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *sram = g_new(MemoryRegion, 1);
- if (!cpu_model) {
- cpu_model = "m5206";
- }
- cpu = M68K_CPU(cpu_generic_init(TYPE_M68K_CPU, cpu_model));
+ cpu = M68K_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
/* Initialize CPU registers. */
@@ -94,6 +90,7 @@ static void an5206_machine_init(MachineClass *mc)
{
mc->desc = "Arnewsh 5206";
mc->init = an5206_init;
+ mc->default_cpu_type = M68K_CPU_TYPE_NAME("m5206");
}
DEFINE_MACHINE("an5206", an5206_machine_init)
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index 68589c36d2..fac0d09cbc 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -218,7 +218,6 @@ static void mcf_fec_init(MemoryRegion *sysmem, NICInfo *nd, hwaddr base,
static void mcf5208evb_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
M68kCPU *cpu;
CPUM68KState *env;
@@ -230,10 +229,7 @@ static void mcf5208evb_init(MachineState *machine)
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *sram = g_new(MemoryRegion, 1);
- if (!cpu_model) {
- cpu_model = "m5208";
- }
- cpu = M68K_CPU(cpu_generic_init(TYPE_M68K_CPU, cpu_model));
+ cpu = M68K_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
/* Initialize CPU registers. */
@@ -322,6 +318,7 @@ static void mcf5208evb_machine_init(MachineClass *mc)
mc->desc = "MCF5206EVB";
mc->init = mcf5208evb_init;
mc->is_default = 1;
+ mc->default_cpu_type = M68K_CPU_TYPE_NAME("m5208");
}
DEFINE_MACHINE("mcf5208evb", mcf5208evb_machine_init)
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 776ee283e1..1cb4b6aca2 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -437,7 +437,6 @@ static void boston_mach_init(MachineState *machine)
DeviceState *dev;
BostonState *s;
Error *err = NULL;
- const char *cpu_model;
MemoryRegion *flash, *ddr, *ddr_low_alias, *lcd, *platreg;
MemoryRegion *sys_mem = get_system_memory();
XilinxPCIEHost *pcie2;
@@ -453,26 +452,24 @@ static void boston_mach_init(MachineState *machine)
exit(1);
}
- cpu_model = machine->cpu_model ?: "I6400";
-
dev = qdev_create(NULL, TYPE_MIPS_BOSTON);
qdev_init_nofail(dev);
s = BOSTON(dev);
s->mach = machine;
- s->cps = g_new0(MIPSCPSState, 1);
- if (!cpu_supports_cps_smp(cpu_model)) {
+ if (!cpu_supports_cps_smp(machine->cpu_type)) {
error_report("Boston requires CPUs which support CPS");
exit(1);
}
- is_64b = cpu_supports_isa(cpu_model, ISA_MIPS64);
+ is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64);
- object_initialize(s->cps, sizeof(MIPSCPSState), TYPE_MIPS_CPS);
+ s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
- object_property_set_str(OBJECT(s->cps), cpu_model, "cpu-model", &err);
+ object_property_set_str(OBJECT(s->cps), machine->cpu_type, "cpu-type",
+ &err);
object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err);
object_property_set_bool(OBJECT(s->cps), true, "realized", &err);
@@ -572,6 +569,7 @@ static void boston_mach_class_init(MachineClass *mc)
mc->block_default_type = IF_IDE;
mc->default_ram_size = 1 * G_BYTE;
mc->max_cpus = 16;
+ mc->default_cpu_type = MIPS_CPU_TYPE_NAME("I6400");
}
DEFINE_MACHINE("boston", boston_mach_class_init)
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index fe5c630af6..4285d1964e 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -71,7 +71,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
bool itu_present = false;
for (i = 0; i < s->num_vp; i++) {
- cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, s->cpu_model));
+ cpu = MIPS_CPU(cpu_create(s->cpu_type));
/* Init internal devices */
cpu_mips_irq_init_cpu(cpu);
@@ -160,7 +160,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
static Property mips_cps_properties[] = {
DEFINE_PROP_UINT32("num-vp", MIPSCPSState, num_vp, 1),
DEFINE_PROP_UINT32("num-irq", MIPSCPSState, num_irq, 256),
- DEFINE_PROP_STRING("cpu-model", MIPSCPSState, cpu_model),
+ DEFINE_PROP_STRING("cpu-type", MIPSCPSState, cpu_type),
DEFINE_PROP_END_OF_LIST()
};
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 75318680e1..146cf0fccd 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -258,7 +258,6 @@ static void network_init (PCIBus *pci_bus)
static void mips_fulong2e_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
@@ -277,10 +276,7 @@ static void mips_fulong2e_init(MachineState *machine)
CPUMIPSState *env;
/* init CPUs */
- if (cpu_model == NULL) {
- cpu_model = "Loongson-2E";
- }
- cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
+ cpu = MIPS_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
qemu_register_reset(main_cpu_reset, cpu);
@@ -385,6 +381,7 @@ static void mips_fulong2e_machine_init(MachineClass *mc)
mc->desc = "Fulong 2e mini pc";
mc->init = mips_fulong2e_init;
mc->block_default_type = IF_IDE;
+ mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
}
DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index 7e6626dc88..fe4f17389f 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -122,7 +122,6 @@ static void mips_jazz_init(MachineState *machine,
enum jazz_model_e jazz_model)
{
MemoryRegion *address_space = get_system_memory();
- const char *cpu_model = machine->cpu_model;
char *filename;
int bios_size, n;
MIPSCPU *cpu;
@@ -148,10 +147,7 @@ static void mips_jazz_init(MachineState *machine,
MemoryRegion *bios2 = g_new(MemoryRegion, 1);
/* init CPUs */
- if (cpu_model == NULL) {
- cpu_model = "R4000";
- }
- cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
+ cpu = MIPS_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
qemu_register_reset(main_cpu_reset, cpu);
@@ -349,6 +345,7 @@ static void mips_magnum_class_init(ObjectClass *oc, void *data)
mc->desc = "MIPS Magnum";
mc->init = mips_magnum_init;
mc->block_default_type = IF_SCSI;
+ mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000");
}
static const TypeInfo mips_magnum_type = {
@@ -364,6 +361,7 @@ static void mips_pica61_class_init(ObjectClass *oc, void *data)
mc->desc = "Acer Pica 61";
mc->init = mips_pica61_init;
mc->block_default_type = IF_SCSI;
+ mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000");
}
static const TypeInfo mips_pica61_type = {
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 2adb9bcf89..ec6af4a277 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -923,7 +923,7 @@ static void main_cpu_reset(void *opaque)
}
}
-static void create_cpu_without_cps(const char *cpu_model,
+static void create_cpu_without_cps(const char *cpu_type,
qemu_irq *cbus_irq, qemu_irq *i8259_irq)
{
CPUMIPSState *env;
@@ -931,7 +931,7 @@ static void create_cpu_without_cps(const char *cpu_model,
int i;
for (i = 0; i < smp_cpus; i++) {
- cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
+ cpu = MIPS_CPU(cpu_create(cpu_type));
/* Init internal devices */
cpu_mips_irq_init_cpu(cpu);
@@ -945,16 +945,15 @@ static void create_cpu_without_cps(const char *cpu_model,
*cbus_irq = env->irq[4];
}
-static void create_cps(MaltaState *s, const char *cpu_model,
+static void create_cps(MaltaState *s, const char *cpu_type,
qemu_irq *cbus_irq, qemu_irq *i8259_irq)
{
Error *err = NULL;
- s->cps = g_new0(MIPSCPSState, 1);
- object_initialize(s->cps, sizeof(MIPSCPSState), TYPE_MIPS_CPS);
+ s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
- object_property_set_str(OBJECT(s->cps), cpu_model, "cpu-model", &err);
+ object_property_set_str(OBJECT(s->cps), cpu_type, "cpu-type", &err);
object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err);
object_property_set_bool(OBJECT(s->cps), true, "realized", &err);
if (err != NULL) {
@@ -968,21 +967,13 @@ static void create_cps(MaltaState *s, const char *cpu_model,
*cbus_irq = NULL;
}
-static void create_cpu(MaltaState *s, const char *cpu_model,
- qemu_irq *cbus_irq, qemu_irq *i8259_irq)
+static void mips_create_cpu(MaltaState *s, const char *cpu_type,
+ qemu_irq *cbus_irq, qemu_irq *i8259_irq)
{
- if (cpu_model == NULL) {
-#ifdef TARGET_MIPS64
- cpu_model = "20Kc";
-#else
- cpu_model = "24Kf";
-#endif
- }
-
- if ((smp_cpus > 1) && cpu_supports_cps_smp(cpu_model)) {
- create_cps(s, cpu_model, cbus_irq, i8259_irq);
+ if ((smp_cpus > 1) && cpu_supports_cps_smp(cpu_type)) {
+ create_cps(s, cpu_type, cbus_irq, i8259_irq);
} else {
- create_cpu_without_cps(cpu_model, cbus_irq, i8259_irq);
+ create_cpu_without_cps(cpu_type, cbus_irq, i8259_irq);
}
}
@@ -1039,7 +1030,7 @@ void mips_malta_init(MachineState *machine)
}
/* create CPU */
- create_cpu(s, machine->cpu_model, &cbus_irq, &i8259_irq);
+ mips_create_cpu(s, machine->cpu_type, &cbus_irq, &i8259_irq);
/* allocate RAM */
if (ram_size > (2048u << 20)) {
@@ -1265,6 +1256,11 @@ static void mips_malta_machine_init(MachineClass *mc)
mc->block_default_type = IF_IDE;
mc->max_cpus = 16;
mc->is_default = 1;
+#ifdef TARGET_MIPS64
+ mc->default_cpu_type = MIPS_CPU_TYPE_NAME("20Kc");
+#else
+ mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
+#endif
}
DEFINE_MACHINE("malta", mips_malta_machine_init)
diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
index a092072e2a..e5d3654586 100644
--- a/hw/mips/mips_mipssim.c
+++ b/hw/mips/mips_mipssim.c
@@ -141,7 +141,6 @@ static void
mips_mipssim_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
@@ -156,14 +155,7 @@ mips_mipssim_init(MachineState *machine)
int bios_size;
/* Init CPUs. */
- if (cpu_model == NULL) {
-#ifdef TARGET_MIPS64
- cpu_model = "5Kf";
-#else
- cpu_model = "24Kf";
-#endif
- }
- cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
+ cpu = MIPS_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
reset_info = g_malloc0(sizeof(ResetData));
@@ -235,6 +227,11 @@ static void mips_mipssim_machine_init(MachineClass *mc)
{
mc->desc = "MIPS MIPSsim platform";
mc->init = mips_mipssim_init;
+#ifdef TARGET_MIPS64
+ mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf");
+#else
+ mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
+#endif
}
DEFINE_MACHINE("mipssim", mips_mipssim_machine_init)
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index 1272d4ef9d..3bbb1827e1 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -163,7 +163,6 @@ static
void mips_r4k_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
@@ -186,14 +185,7 @@ void mips_r4k_init(MachineState *machine)
int be;
/* init CPUs */
- if (cpu_model == NULL) {
-#ifdef TARGET_MIPS64
- cpu_model = "R4000";
-#else
- cpu_model = "24Kf";
-#endif
- }
- cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
+ cpu = MIPS_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
reset_info = g_malloc0(sizeof(ResetData));
@@ -303,6 +295,12 @@ static void mips_machine_init(MachineClass *mc)
mc->desc = "mips r4k platform";
mc->init = mips_r4k_init;
mc->block_default_type = IF_IDE;
+#ifdef TARGET_MIPS64
+ mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000");
+#else
+ mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
+#endif
+
}
DEFINE_MACHINE("mips", mips_machine_init)
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
index 5ea8dd3a93..3ba58481d0 100644
--- a/hw/moxie/moxiesim.c
+++ b/hw/moxie/moxiesim.c
@@ -103,7 +103,6 @@ static void moxiesim_init(MachineState *machine)
{
MoxieCPU *cpu = NULL;
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
@@ -115,10 +114,7 @@ static void moxiesim_init(MachineState *machine)
LoaderParams loader_params;
/* Init CPUs. */
- if (cpu_model == NULL) {
- cpu_model = "MoxieLite-moxie-cpu";
- }
- cpu = MOXIE_CPU(cpu_generic_init(TYPE_MOXIE_CPU, cpu_model));
+ cpu = MOXIE_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
qemu_register_reset(main_cpu_reset, cpu);
@@ -150,6 +146,7 @@ static void moxiesim_machine_init(MachineClass *mc)
mc->desc = "Moxie simulator platform";
mc->init = moxiesim_init;
mc->is_default = 1;
+ mc->default_cpu_type = MOXIE_CPU_TYPE_NAME("MoxieLite");
}
DEFINE_MACHINE("moxiesim", moxiesim_machine_init)
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 58638c6ecd..e9558f1ca4 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -125,7 +125,6 @@ static void openrisc_load_kernel(ram_addr_t ram_size,
static void openrisc_sim_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
OpenRISCCPU *cpu = NULL;
MemoryRegion *ram;
@@ -133,12 +132,8 @@ static void openrisc_sim_init(MachineState *machine)
qemu_irq serial_irq;
int n;
- if (!cpu_model) {
- cpu_model = "or1200";
- }
-
for (n = 0; n < smp_cpus; n++) {
- cpu = OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model));
+ cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));
if (cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition!\n");
exit(1);
@@ -180,6 +175,7 @@ static void openrisc_sim_machine_init(MachineClass *mc)
mc->init = openrisc_sim_init;
mc->max_cpus = 2;
mc->is_default = 1;
+ mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200");
}
DEFINE_MACHINE("or1k-sim", openrisc_sim_machine_init)
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index 16b9ed2db2..458ed83297 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -225,7 +225,6 @@ static struct QEMU_PACKED
static void r2d_init(MachineState *machine)
{
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
@@ -242,11 +241,7 @@ static void r2d_init(MachineState *machine)
MemoryRegion *address_space_mem = get_system_memory();
PCIBus *pci_bus;
- if (cpu_model == NULL) {
- cpu_model = "SH7751R";
- }
-
- cpu = SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));
+ cpu = SUPERH_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
reset_info = g_malloc0(sizeof(ResetData));
@@ -365,6 +360,7 @@ static void r2d_machine_init(MachineClass *mc)
mc->desc = "r2d-plus board";
mc->init = r2d_init;
mc->block_default_type = IF_IDE;
+ mc->default_cpu_type = TYPE_SH7751R_CPU;
}
DEFINE_MACHINE("r2d", r2d_machine_init)
diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c
index 50ee36a5c5..4add2309eb 100644
--- a/hw/sh4/shix.c
+++ b/hw/sh4/shix.c
@@ -45,7 +45,6 @@
static void shix_init(MachineState *machine)
{
- const char *cpu_model = machine->cpu_model;
int ret;
SuperHCPU *cpu;
struct SH7750State *s;
@@ -53,10 +52,7 @@ static void shix_init(MachineState *machine)
MemoryRegion *rom = g_new(MemoryRegion, 1);
MemoryRegion *sdram = g_new(MemoryRegion, 2);
- if (!cpu_model)
- cpu_model = "any";
-
- cpu = SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));
+ cpu = SUPERH_CPU(cpu_create(machine->cpu_type));
/* Allocate memory space */
memory_region_init_ram(rom, NULL, "shix.rom", 0x4000, &error_fatal);
@@ -89,6 +85,7 @@ static void shix_machine_init(MachineClass *mc)
mc->desc = "shix card";
mc->init = shix_init;
mc->is_default = 1;
+ mc->default_cpu_type = TYPE_SH7750R_CPU;
}
DEFINE_MACHINE("shix", shix_machine_init)
diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
index ec2816bf94..8c66d5af24 100644
--- a/hw/sparc/leon3.c
+++ b/hw/sparc/leon3.c
@@ -107,7 +107,6 @@ static void leon3_set_pil_in(void *opaque, uint32_t pil_in)
static void leon3_generic_hw_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
SPARCCPU *cpu;
CPUSPARCState *env;
@@ -122,11 +121,7 @@ static void leon3_generic_hw_init(MachineState *machine)
ResetData *reset_info;
/* Init CPU */
- if (!cpu_model) {
- cpu_model = "LEON3";
- }
-
- cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
+ cpu = SPARC_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
cpu_sparc_set_id(env, 0);
@@ -222,6 +217,7 @@ static void leon3_generic_machine_init(MachineClass *mc)
{
mc->desc = "Leon-3 generic";
mc->init = leon3_generic_hw_init;
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3");
}
DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init)
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index e1bdd4828d..68b23784c5 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -94,7 +94,6 @@ struct sun4m_hwdef {
} vsimm[MAX_VSIMMS];
hwaddr ecc_base;
uint64_t max_mem;
- const char * const default_cpu_model;
uint32_t ecc_version;
uint32_t iommu_version;
uint16_t machine_id;
@@ -790,14 +789,14 @@ static const TypeInfo ram_info = {
.class_init = ram_class_init,
};
-static void cpu_devinit(const char *cpu_model, unsigned int id,
+static void cpu_devinit(const char *cpu_type, unsigned int id,
uint64_t prom_addr, qemu_irq **cpu_irqs)
{
CPUState *cs;
SPARCCPU *cpu;
CPUSPARCState *env;
- cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
+ cpu = SPARC_CPU(cpu_create(cpu_type));
env = &cpu->env;
cpu_sparc_set_id(env, id);
@@ -820,7 +819,6 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
MachineState *machine)
{
DeviceState *slavio_intctl;
- const char *cpu_model = machine->cpu_model;
unsigned int i;
void *iommu, *espdma, *ledma, *nvram;
qemu_irq *cpu_irqs[MAX_CPUS], slavio_irq[32], slavio_cpu_irq[MAX_CPUS],
@@ -833,11 +831,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
unsigned int num_vsimms;
/* init CPUs */
- if (!cpu_model)
- cpu_model = hwdef->default_cpu_model;
-
for(i = 0; i < smp_cpus; i++) {
- cpu_devinit(cpu_model, i, hwdef->slavio_base, &cpu_irqs[i]);
+ cpu_devinit(machine->cpu_type, i, hwdef->slavio_base, &cpu_irqs[i]);
}
for (i = smp_cpus; i < MAX_CPUS; i++)
@@ -1074,7 +1069,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
.machine_id = ss5_id,
.iommu_version = 0x05000000,
.max_mem = 0x10000000,
- .default_cpu_model = "Fujitsu MB86904",
},
/* SS-10 */
{
@@ -1100,7 +1094,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
.machine_id = ss10_id,
.iommu_version = 0x03000000,
.max_mem = 0xf00000000ULL,
- .default_cpu_model = "TI SuperSparc II",
},
/* SS-600MP */
{
@@ -1124,7 +1117,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
.machine_id = ss600mp_id,
.iommu_version = 0x01000000,
.max_mem = 0xf00000000ULL,
- .default_cpu_model = "TI SuperSparc II",
},
/* SS-20 */
{
@@ -1166,7 +1158,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
.machine_id = ss20_id,
.iommu_version = 0x13000000,
.max_mem = 0xf00000000ULL,
- .default_cpu_model = "TI SuperSparc II",
},
/* Voyager */
{
@@ -1190,7 +1181,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
.machine_id = vger_id,
.iommu_version = 0x05000000,
.max_mem = 0x10000000,
- .default_cpu_model = "Fujitsu MB86904",
},
/* LX */
{
@@ -1215,7 +1205,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
.machine_id = lx_id,
.iommu_version = 0x04000000,
.max_mem = 0x10000000,
- .default_cpu_model = "TI MicroSparc I",
},
/* SS-4 */
{
@@ -1240,7 +1229,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
.machine_id = ss4_id,
.iommu_version = 0x05000000,
.max_mem = 0x10000000,
- .default_cpu_model = "Fujitsu MB86904",
},
/* SPARCClassic */
{
@@ -1264,7 +1252,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
.machine_id = scls_id,
.iommu_version = 0x05000000,
.max_mem = 0x10000000,
- .default_cpu_model = "TI MicroSparc I",
},
/* SPARCbook */
{
@@ -1288,7 +1275,6 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
.machine_id = sbook_id,
.iommu_version = 0x05000000,
.max_mem = 0x10000000,
- .default_cpu_model = "TI MicroSparc I",
},
};
@@ -1355,6 +1341,7 @@ static void ss5_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_SCSI;
mc->is_default = 1;
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
}
static const TypeInfo ss5_type = {
@@ -1372,6 +1359,7 @@ static void ss10_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_SCSI;
mc->max_cpus = 4;
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
}
static const TypeInfo ss10_type = {
@@ -1389,6 +1377,7 @@ static void ss600mp_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_SCSI;
mc->max_cpus = 4;
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
}
static const TypeInfo ss600mp_type = {
@@ -1406,6 +1395,7 @@ static void ss20_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_SCSI;
mc->max_cpus = 4;
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II");
}
static const TypeInfo ss20_type = {
@@ -1422,6 +1412,7 @@ static void voyager_class_init(ObjectClass *oc, void *data)
mc->init = vger_init;
mc->block_default_type = IF_SCSI;
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
}
static const TypeInfo voyager_type = {
@@ -1438,6 +1429,7 @@ static void ss_lx_class_init(ObjectClass *oc, void *data)
mc->init = ss_lx_init;
mc->block_default_type = IF_SCSI;
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
}
static const TypeInfo ss_lx_type = {
@@ -1454,6 +1446,7 @@ static void ss4_class_init(ObjectClass *oc, void *data)
mc->init = ss4_init;
mc->block_default_type = IF_SCSI;
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
}
static const TypeInfo ss4_type = {
@@ -1470,6 +1463,7 @@ static void scls_class_init(ObjectClass *oc, void *data)
mc->init = scls_init;
mc->block_default_type = IF_SCSI;
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
}
static const TypeInfo scls_type = {
@@ -1486,6 +1480,7 @@ static void sbook_class_init(ObjectClass *oc, void *data)
mc->init = sbook_init;
mc->block_default_type = IF_SCSI;
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I");
}
static const TypeInfo sbook_type = {
diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c
index 9a8d6109d4..7a723326c5 100644
--- a/hw/sparc64/niagara.c
+++ b/hw/sparc64/niagara.c
@@ -106,8 +106,7 @@ static void niagara_init(MachineState *machine)
MemoryRegion *sysmem = get_system_memory();
/* init CPUs */
- sparc64_cpu_devinit(machine->cpu_model, "Sun UltraSparc T1",
- NIAGARA_PROM_BASE);
+ sparc64_cpu_devinit(machine->cpu_type, NIAGARA_PROM_BASE);
/* set up devices */
memory_region_allocate_system_memory(&s->hv_ram, NULL, "sun4v-hv.ram",
NIAGARA_HV_RAM_SIZE);
@@ -174,6 +173,7 @@ static void niagara_class_init(ObjectClass *oc, void *data)
mc->init = niagara_init;
mc->max_cpus = 1; /* XXX for now */
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Sun-UltraSparc-T1");
}
static const TypeInfo niagara_type = {
diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c
index 097d529ff1..9453e2c390 100644
--- a/hw/sparc64/sparc64.c
+++ b/hw/sparc64/sparc64.c
@@ -339,8 +339,7 @@ void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit)
}
}
-SPARCCPU *sparc64_cpu_devinit(const char *cpu_model,
- const char *default_cpu_model, uint64_t prom_addr)
+SPARCCPU *sparc64_cpu_devinit(const char *cpu_type, uint64_t prom_addr)
{
SPARCCPU *cpu;
CPUSPARCState *env;
@@ -350,10 +349,7 @@ SPARCCPU *sparc64_cpu_devinit(const char *cpu_model,
uint32_t stick_frequency = 100 * 1000000;
uint32_t hstick_frequency = 100 * 1000000;
- if (cpu_model == NULL) {
- cpu_model = default_cpu_model;
- }
- cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));
+ cpu = SPARC_CPU(cpu_create(cpu_type));
env = &cpu->env;
env->tick = cpu_timer_create("tick", cpu, tick_irq,
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 77a787466a..1672f256e7 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -75,7 +75,6 @@
#define IVEC_MAX 0x40
struct hwdef {
- const char * const default_cpu_model;
uint16_t machine_id;
uint64_t prom_addr;
uint64_t console_serial_base;
@@ -446,8 +445,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
bool onboard_nic;
/* init CPUs */
- cpu = sparc64_cpu_devinit(machine->cpu_model, hwdef->default_cpu_model,
- hwdef->prom_addr);
+ cpu = sparc64_cpu_devinit(machine->cpu_type, hwdef->prom_addr);
/* set up devices */
ram_init(0, machine->ram_size);
@@ -599,14 +597,12 @@ enum {
static const struct hwdef hwdefs[] = {
/* Sun4u generic PC-like machine */
{
- .default_cpu_model = "TI UltraSparc IIi",
.machine_id = sun4u_id,
.prom_addr = 0x1fff0000000ULL,
.console_serial_base = 0,
},
/* Sun4v generic PC-like machine */
{
- .default_cpu_model = "Sun UltraSparc T1",
.machine_id = sun4v_id,
.prom_addr = 0x1fff0000000ULL,
.console_serial_base = 0,
@@ -635,6 +631,7 @@ static void sun4u_class_init(ObjectClass *oc, void *data)
mc->max_cpus = 1; /* XXX for now */
mc->is_default = 1;
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-UltraSparc-IIi");
}
static const TypeInfo sun4u_type = {
@@ -652,6 +649,7 @@ static void sun4v_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_IDE;
mc->max_cpus = 1; /* XXX for now */
mc->default_boot_order = "c";
+ mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Sun-UltraSparc-T1");
}
static const TypeInfo sun4v_type = {
diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c
index 0486f8a1d9..ac75eb2128 100644
--- a/hw/tricore/tricore_testboard.c
+++ b/hw/tricore/tricore_testboard.c
@@ -71,10 +71,7 @@ static void tricore_testboard_init(MachineState *machine, int board_id)
MemoryRegion *pcp_data = g_new(MemoryRegion, 1);
MemoryRegion *pcp_text = g_new(MemoryRegion, 1);
- if (!machine->cpu_model) {
- machine->cpu_model = "tc1796";
- }
- cpu = TRICORE_CPU(cpu_generic_init(TYPE_TRICORE_CPU, machine->cpu_model));
+ cpu = TRICORE_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
memory_region_init_ram(ext_cram, NULL, "powerlink_ext_c.ram",
2 * 1024 * 1024, &error_fatal);
@@ -114,6 +111,7 @@ static void ttb_machine_init(MachineClass *mc)
mc->desc = "a minimal TriCore board";
mc->init = tricoreboard_init;
mc->is_default = 0;
+ mc->default_cpu_type = TRICORE_CPU_TYPE_NAME("tc1796");
}
DEFINE_MACHINE("tricore_testboard", ttb_machine_init)
diff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c
index 504ea46211..1b39cc035b 100644
--- a/hw/unicore32/puv3.c
+++ b/hw/unicore32/puv3.c
@@ -112,7 +112,6 @@ static void puv3_load_kernel(const char *kernel_filename)
static void puv3_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
const char *initrd_filename = machine->initrd_filename;
CPUUniCore32State *env;
@@ -123,11 +122,7 @@ static void puv3_init(MachineState *machine)
exit(1);
}
- if (!cpu_model) {
- cpu_model = "UniCore-II";
- }
-
- cpu = UNICORE32_CPU(cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model));
+ cpu = UNICORE32_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
puv3_soc_init(env);
@@ -140,6 +135,7 @@ static void puv3_machine_init(MachineClass *mc)
mc->desc = "PKUnity Version-3 based on UniCore32";
mc->init = puv3_init;
mc->is_default = 1;
+ mc->default_cpu_type = UNICORE32_CPU_TYPE_NAME("UniCore-II");
}
DEFINE_MACHINE("puv3", puv3_machine_init)
diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
index b3580b11fa..2bb883b664 100644
--- a/hw/xtensa/sim.c
+++ b/hw/xtensa/sim.c
@@ -75,16 +75,11 @@ static void xtensa_sim_init(MachineState *machine)
XtensaCPU *cpu = NULL;
CPUXtensaState *env = NULL;
ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
int n;
- if (!cpu_model) {
- cpu_model = XTENSA_DEFAULT_CPU_MODEL;
- }
-
for (n = 0; n < smp_cpus; n++) {
- cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));
+ cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
env->sregs[PRID] = n;
@@ -133,6 +128,7 @@ static void xtensa_sim_machine_init(MachineClass *mc)
mc->init = xtensa_sim_init;
mc->max_cpus = 4;
mc->no_serial = 1;
+ mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
}
DEFINE_MACHINE("sim", xtensa_sim_machine_init)
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index a19ccebdba..1971ecfdc5 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -220,19 +220,14 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine)
DriveInfo *dinfo;
pflash_t *flash = NULL;
QemuOpts *machine_opts = qemu_get_machine_opts();
- const char *cpu_model = machine->cpu_model;
const char *kernel_filename = qemu_opt_get(machine_opts, "kernel");
const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");
const char *dtb_filename = qemu_opt_get(machine_opts, "dtb");
const char *initrd_filename = qemu_opt_get(machine_opts, "initrd");
int n;
- if (!cpu_model) {
- cpu_model = XTENSA_DEFAULT_CPU_MODEL;
- }
-
for (n = 0; n < smp_cpus; n++) {
- cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));
+ cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
env->sregs[PRID] = n;
@@ -454,6 +449,7 @@ static void xtensa_lx60_class_init(ObjectClass *oc, void *data)
mc->desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
mc->init = xtensa_lx60_init;
mc->max_cpus = 4;
+ mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
}
static const TypeInfo xtensa_lx60_type = {
@@ -469,6 +465,7 @@ static void xtensa_lx200_class_init(ObjectClass *oc, void *data)
mc->desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
mc->init = xtensa_lx200_init;
mc->max_cpus = 4;
+ mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
}
static const TypeInfo xtensa_lx200_type = {
@@ -484,6 +481,7 @@ static void xtensa_ml605_class_init(ObjectClass *oc, void *data)
mc->desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
mc->init = xtensa_ml605_init;
mc->max_cpus = 4;
+ mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
}
static const TypeInfo xtensa_ml605_type = {
@@ -499,6 +497,7 @@ static void xtensa_kc705_class_init(ObjectClass *oc, void *data)
mc->desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
mc->init = xtensa_kc705_init;
mc->max_cpus = 4;
+ mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
}
static const TypeInfo xtensa_kc705_type = {
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-31 23:38:21 +0000