aboutsummaryrefslogtreecommitdiff
path: root/hw
diff options
context:
space:
mode:
Diffstat (limited to 'hw')
-rw-r--r--hw/arm_boot.c2
-rw-r--r--hw/armv7m.c2
-rw-r--r--hw/cris-boot.c2
-rw-r--r--hw/leon3.c2
-rw-r--r--hw/lm32_boards.c2
-rw-r--r--hw/microblaze_boot.c2
-rw-r--r--hw/milkymist.c2
-rw-r--r--hw/mips_fulong2e.c2
-rw-r--r--hw/mips_jazz.c2
-rw-r--r--hw/mips_malta.c2
-rw-r--r--hw/mips_mipssim.c2
-rw-r--r--hw/mips_r4k.c2
-rw-r--r--hw/omap1.c2
-rw-r--r--hw/omap2.c2
-rw-r--r--hw/pc.c2
-rw-r--r--hw/ppc440_bamboo.c2
-rw-r--r--hw/ppc4xx_devs.c9
-rw-r--r--hw/ppc_newworld.c9
-rw-r--r--hw/ppc_oldworld.c9
-rw-r--r--hw/ppc_prep.c9
-rw-r--r--hw/ppce500_mpc8544ds.c4
-rw-r--r--hw/pxa2xx.c2
-rw-r--r--hw/r2d.c2
-rw-r--r--hw/spapr.c9
-rw-r--r--hw/sun4m.c4
-rw-r--r--hw/sun4u.c2
-rw-r--r--hw/virtex_ml507.c2
-rw-r--r--hw/xtensa_lx60.c8
-rw-r--r--hw/xtensa_sim.c2
29 files changed, 70 insertions, 33 deletions
diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index fc669100c5..23b3f0aad4 100644
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -277,7 +277,7 @@ static void do_cpu_reset(void *opaque)
CPUState *env = opaque;
const struct arm_boot_info *info = env->boot_info;
- cpu_reset(env);
+ cpu_state_reset(env);
if (info) {
if (!info->is_linux) {
/* Jump to the entry point. */
diff --git a/hw/armv7m.c b/hw/armv7m.c
index 6b805798e6..9cf96f412b 100644
--- a/hw/armv7m.c
+++ b/hw/armv7m.c
@@ -149,7 +149,7 @@ static void armv7m_bitband_init(void)
static void armv7m_reset(void *opaque)
{
- cpu_reset((CPUState *)opaque);
+ cpu_state_reset((CPUState *)opaque);
}
/* Init CPU and memory for a v7-M based board.
diff --git a/hw/cris-boot.c b/hw/cris-boot.c
index 37894f8b53..ade517dd25 100644
--- a/hw/cris-boot.c
+++ b/hw/cris-boot.c
@@ -34,7 +34,7 @@ static void main_cpu_reset(void *opaque)
li = env->load_info;
- cpu_reset(env);
+ cpu_state_reset(env);
if (!li) {
/* nothing more to do. */
diff --git a/hw/leon3.c b/hw/leon3.c
index 71d79a65a7..1dc5a02327 100644
--- a/hw/leon3.c
+++ b/hw/leon3.c
@@ -51,7 +51,7 @@ static void main_cpu_reset(void *opaque)
ResetData *s = (ResetData *)opaque;
CPUState *env = s->env;
- cpu_reset(env);
+ cpu_state_reset(env);
env->halted = 0;
env->pc = s->entry;
diff --git a/hw/lm32_boards.c b/hw/lm32_boards.c
index 3cdf120a14..51c8a0f913 100644
--- a/hw/lm32_boards.c
+++ b/hw/lm32_boards.c
@@ -56,7 +56,7 @@ static void main_cpu_reset(void *opaque)
ResetInfo *reset_info = opaque;
CPUState *env = reset_info->env;
- cpu_reset(env);
+ cpu_state_reset(env);
/* init defaults */
env->pc = (uint32_t)reset_info->bootstrap_pc;
diff --git a/hw/microblaze_boot.c b/hw/microblaze_boot.c
index b2f96df344..7ce04dcd63 100644
--- a/hw/microblaze_boot.c
+++ b/hw/microblaze_boot.c
@@ -45,7 +45,7 @@ static void main_cpu_reset(void *opaque)
{
CPUState *env = opaque;
- cpu_reset(env);
+ cpu_state_reset(env);
env->regs[5] = boot_info.cmdline;
env->regs[7] = boot_info.fdt;
env->sregs[SR_PC] = boot_info.bootstrap_pc;
diff --git a/hw/milkymist.c b/hw/milkymist.c
index eaef0c24c3..7ec65549f4 100644
--- a/hw/milkymist.c
+++ b/hw/milkymist.c
@@ -61,7 +61,7 @@ static void main_cpu_reset(void *opaque)
ResetInfo *reset_info = opaque;
CPUState *env = reset_info->env;
- cpu_reset(env);
+ cpu_state_reset(env);
/* init defaults */
env->pc = reset_info->bootstrap_pc;
diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c
index efdfdc29ff..dae488a965 100644
--- a/hw/mips_fulong2e.c
+++ b/hw/mips_fulong2e.c
@@ -200,7 +200,7 @@ static void main_cpu_reset(void *opaque)
{
CPUState *env = opaque;
- cpu_reset(env);
+ cpu_state_reset(env);
/* TODO: 2E reset stuff */
if (loaderparams.kernel_filename) {
env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 2b4678e170..d5f1b341b1 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -51,7 +51,7 @@ enum jazz_model_e
static void main_cpu_reset(void *opaque)
{
CPUState *env = opaque;
- cpu_reset(env);
+ cpu_state_reset(env);
}
static uint64_t rtc_read(void *opaque, target_phys_addr_t addr, unsigned size)
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 866699dbf0..3335e11c44 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -745,7 +745,7 @@ static void malta_mips_config(CPUState *env)
static void main_cpu_reset(void *opaque)
{
CPUState *env = opaque;
- cpu_reset(env);
+ cpu_state_reset(env);
/* The bootloader does not need to be rewritten as it is located in a
read only location. The kernel location and the arguments table
diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c
index 76c95b2ec0..1fe4ac5b4d 100644
--- a/hw/mips_mipssim.c
+++ b/hw/mips_mipssim.c
@@ -107,7 +107,7 @@ static void main_cpu_reset(void *opaque)
ResetData *s = (ResetData *)opaque;
CPUState *env = s->env;
- cpu_reset(env);
+ cpu_state_reset(env);
env->active_tc.PC = s->vector & ~(target_ulong)1;
if (s->vector & 1) {
env->hflags |= MIPS_HFLAG_M16;
diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c
index 83401f0648..96ad80883a 100644
--- a/hw/mips_r4k.c
+++ b/hw/mips_r4k.c
@@ -145,7 +145,7 @@ static void main_cpu_reset(void *opaque)
ResetData *s = (ResetData *)opaque;
CPUState *env = s->env;
- cpu_reset(env);
+ cpu_state_reset(env);
env->active_tc.PC = s->vector;
}
diff --git a/hw/omap1.c b/hw/omap1.c
index 1aa5f2388b..5317b9be2b 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -3702,7 +3702,7 @@ static void omap1_mpu_reset(void *opaque)
omap_lpg_reset(mpu->led[0]);
omap_lpg_reset(mpu->led[1]);
omap_clkm_reset(mpu);
- cpu_reset(mpu->env);
+ cpu_state_reset(mpu->env);
}
static const struct omap_map_s {
diff --git a/hw/omap2.c b/hw/omap2.c
index a6851b0fb0..157defb393 100644
--- a/hw/omap2.c
+++ b/hw/omap2.c
@@ -2224,7 +2224,7 @@ static void omap2_mpu_reset(void *opaque)
omap_mcspi_reset(mpu->mcspi[1]);
omap_i2c_reset(mpu->i2c[0]);
omap_i2c_reset(mpu->i2c[1]);
- cpu_reset(mpu->env);
+ cpu_state_reset(mpu->env);
}
static int omap2_validate_addr(struct omap_mpu_state_s *s,
diff --git a/hw/pc.c b/hw/pc.c
index bb9867b070..aca4460062 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -928,7 +928,7 @@ static void pc_cpu_reset(void *opaque)
{
CPUState *env = opaque;
- cpu_reset(env);
+ cpu_state_reset(env);
env->halted = !cpu_is_bsp(env);
}
diff --git a/hw/ppc440_bamboo.c b/hw/ppc440_bamboo.c
index f86b16838a..835e36d49a 100644
--- a/hw/ppc440_bamboo.c
+++ b/hw/ppc440_bamboo.c
@@ -147,7 +147,7 @@ static void main_cpu_reset(void *opaque)
{
CPUState *env = opaque;
- cpu_reset(env);
+ cpu_state_reset(env);
env->gpr[1] = (16<<20) - 8;
env->gpr[3] = FDT_ADDR;
env->nip = entry;
diff --git a/hw/ppc4xx_devs.c b/hw/ppc4xx_devs.c
index 26040ac3ad..23111620a3 100644
--- a/hw/ppc4xx_devs.c
+++ b/hw/ppc4xx_devs.c
@@ -38,6 +38,13 @@
# define LOG_UIC(...) do { } while (0)
#endif
+static void ppc4xx_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_state_reset(env);
+}
+
/*****************************************************************************/
/* Generic PowerPC 4xx processor instantiation */
CPUState *ppc4xx_init (const char *cpu_model,
@@ -60,7 +67,7 @@ CPUState *ppc4xx_init (const char *cpu_model,
tb_clk->opaque = env;
ppc_dcr_init(env, NULL, NULL);
/* Register qemu callbacks */
- qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
+ qemu_register_reset(ppc4xx_reset, env);
return env;
}
diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c
index 2fec5b4d67..ee50652372 100644
--- a/hw/ppc_newworld.c
+++ b/hw/ppc_newworld.c
@@ -121,6 +121,13 @@ static target_phys_addr_t round_page(target_phys_addr_t addr)
return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
}
+static void ppc_core99_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_state_reset(env);
+}
+
/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size,
const char *boot_device,
@@ -166,7 +173,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
}
/* Set time-base frequency to 100 Mhz */
cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
- qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
+ qemu_register_reset(ppc_core99_reset, env);
}
/* allocate RAM */
diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c
index 49c2c9795e..be70124627 100644
--- a/hw/ppc_oldworld.c
+++ b/hw/ppc_oldworld.c
@@ -65,6 +65,13 @@ static target_phys_addr_t round_page(target_phys_addr_t addr)
return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
}
+static void ppc_heathrow_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_state_reset(env);
+}
+
static void ppc_heathrow_init (ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
@@ -104,7 +111,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
}
/* Set time-base frequency to 16.6 Mhz */
cpu_ppc_tb_init(env, 16600000UL);
- qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
+ qemu_register_reset(ppc_heathrow_reset, env);
}
/* allocate RAM */
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index dc9edd7bf5..6ccd6faede 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -470,6 +470,13 @@ static void cpu_request_exit(void *opaque, int irq, int level)
}
}
+static void ppc_prep_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_state_reset(env);
+}
+
/* PowerPC PREP hardware initialisation */
static void ppc_prep_init (ram_addr_t ram_size,
const char *boot_device,
@@ -524,7 +531,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
/* Set time-base frequency to 100 Mhz */
cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
}
- qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
+ qemu_register_reset(ppc_prep_reset, env);
}
/* allocate RAM */
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index d69f78cf33..752aed982a 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -198,7 +198,7 @@ static void mpc8544ds_cpu_reset_sec(void *opaque)
{
CPUState *env = opaque;
- cpu_reset(env);
+ cpu_state_reset(env);
/* Secondary CPU starts in halted state for now. Needs to change when
implementing non-kernel boot. */
@@ -211,7 +211,7 @@ static void mpc8544ds_cpu_reset(void *opaque)
CPUState *env = opaque;
struct boot_info *bi = env->load_info;
- cpu_reset(env);
+ cpu_state_reset(env);
/* Set initial guest state. */
env->halted = 0;
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index 1ab27012c1..f55287774a 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -2045,7 +2045,7 @@ static void pxa2xx_reset(void *opaque, int line, int level)
PXA2xxState *s = (PXA2xxState *) opaque;
if (level && (s->pm_regs[PCFR >> 2] & 0x10)) { /* GPR_EN */
- cpu_reset(s->env);
+ cpu_state_reset(s->env);
/* TODO: reset peripherals */
}
}
diff --git a/hw/r2d.c b/hw/r2d.c
index c80f9e3a29..ae327a73f3 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -201,7 +201,7 @@ static void main_cpu_reset(void *opaque)
ResetData *s = (ResetData *)opaque;
CPUState *env = s->env;
- cpu_reset(env);
+ cpu_state_reset(env);
env->pc = s->vector;
}
diff --git a/hw/spapr.c b/hw/spapr.c
index dffb6a2a50..3f9d87ceed 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -502,6 +502,13 @@ static void spapr_reset(void *opaque)
}
+static void spapr_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_state_reset(env);
+}
+
/* pSeries LPAR / sPAPR hardware init */
static void ppc_spapr_init(ram_addr_t ram_size,
const char *boot_device,
@@ -560,7 +567,7 @@ static void ppc_spapr_init(ram_addr_t ram_size,
}
/* Set time-base frequency to 512 MHz */
cpu_ppc_tb_init(env, TIMEBASE_FREQ);
- qemu_register_reset((QEMUResetHandler *)&cpu_reset, env);
+ qemu_register_reset(spapr_cpu_reset, env);
env->hreset_vector = 0x60;
env->hreset_excp_prefix = 0;
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 99fb219b3a..4045740667 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -283,7 +283,7 @@ static void main_cpu_reset(void *opaque)
{
CPUState *env = opaque;
- cpu_reset(env);
+ cpu_state_reset(env);
env->halted = 0;
}
@@ -291,7 +291,7 @@ static void secondary_cpu_reset(void *opaque)
{
CPUState *env = opaque;
- cpu_reset(env);
+ cpu_state_reset(env);
env->halted = 1;
}
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 423108f236..8b043f2e5f 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -376,7 +376,7 @@ static void main_cpu_reset(void *opaque)
CPUState *env = s->env;
static unsigned int nr_resets;
- cpu_reset(env);
+ cpu_state_reset(env);
cpu_timer_reset(env->tick);
cpu_timer_reset(env->stick);
diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c
index f8d2b1be04..e67249030b 100644
--- a/hw/virtex_ml507.c
+++ b/hw/virtex_ml507.c
@@ -109,7 +109,7 @@ static void main_cpu_reset(void *opaque)
CPUState *env = opaque;
struct boot_info *bi = env->load_info;
- cpu_reset(env);
+ cpu_state_reset(env);
/* Linux Kernel Parameters (passing device tree):
* r3: pointer to the fdt
* r4: 0
diff --git a/hw/xtensa_lx60.c b/hw/xtensa_lx60.c
index 26112c3eb0..80ba4d722a 100644
--- a/hw/xtensa_lx60.c
+++ b/hw/xtensa_lx60.c
@@ -146,9 +146,11 @@ static uint64_t translate_phys_addr(void *env, uint64_t addr)
return cpu_get_phys_page_debug(env, addr);
}
-static void lx60_reset(void *env)
+static void lx60_reset(void *opaque)
{
- cpu_reset(env);
+ CPUState *env = opaque;
+
+ cpu_state_reset(env);
}
static void lx_init(const LxBoardDesc *board,
@@ -183,7 +185,7 @@ static void lx_init(const LxBoardDesc *board,
/* Need MMU initialized prior to ELF loading,
* so that ELF gets loaded into virtual addresses
*/
- cpu_reset(env);
+ cpu_state_reset(env);
}
ram = g_malloc(sizeof(*ram));
diff --git a/hw/xtensa_sim.c b/hw/xtensa_sim.c
index 104e5dc619..445cfde217 100644
--- a/hw/xtensa_sim.c
+++ b/hw/xtensa_sim.c
@@ -39,7 +39,7 @@ static uint64_t translate_phys_addr(void *env, uint64_t addr)
static void sim_reset(void *env)
{
- cpu_reset(env);
+ cpu_state_reset(env);
}
static void sim_init(ram_addr_t ram_size,
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-04 16:08:12 +0000