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-rw-r--r--hw/unin_pci.c28
1 files changed, 8 insertions, 20 deletions
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index 949e63f44d..9fc073ab54 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -92,31 +92,20 @@ static CPUReadMemoryFunc *pci_unin_main_read[] = {
&pci_host_data_readl,
};
-#if 0
-
static void pci_unin_config_writel (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
UNINState *s = opaque;
-#ifdef TARGET_WORDS_BIGENDIAN
- val = bswap32(val);
-#endif
- s->config_reg = 0x80000000 | (val & ~0x00000001);
+ s->config_reg = val;
}
static uint32_t pci_unin_config_readl (void *opaque,
target_phys_addr_t addr)
{
UNINState *s = opaque;
- uint32_t val;
-
- val = (s->config_reg | 0x00000001) & ~0x80000000;
-#ifdef TARGET_WORDS_BIGENDIAN
- val = bswap32(val);
-#endif
- return val;
+ return s->config_reg;
}
static CPUWriteMemoryFunc *pci_unin_config_write[] = {
@@ -131,6 +120,7 @@ static CPUReadMemoryFunc *pci_unin_config_read[] = {
&pci_unin_config_readl,
};
+#if 0
static CPUWriteMemoryFunc *pci_unin_write[] = {
&pci_host_pci_writeb,
&pci_host_pci_writew,
@@ -233,18 +223,17 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
d->config[0x27] = 0x7F;
// d->config[0x34] = 0xdc // capabilities_pointer
#endif
-#if 0 // XXX: not needed for now
+
/* Uninorth AGP bus */
- s = &pci_bridge[1];
pci_mem_config = cpu_register_io_memory(0, pci_unin_config_read,
pci_unin_config_write, s);
- pci_mem_data = cpu_register_io_memory(0, pci_unin_read,
- pci_unin_write, s);
+ pci_mem_data = cpu_register_io_memory(0, pci_unin_main_read,
+ pci_unin_main_write, s);
cpu_register_physical_memory(0xf0800000, 0x1000, pci_mem_config);
cpu_register_physical_memory(0xf0c00000, 0x1000, pci_mem_data);
- d = pci_register_device("Uni-north AGP", sizeof(PCIDevice), 0, 11 << 3,
- NULL, NULL);
+ d = pci_register_device(s->bus, "Uni-north AGP", sizeof(PCIDevice),
+ 11 << 3, NULL, NULL);
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_AGP);
d->config[0x08] = 0x00; // revision
@@ -253,7 +242,6 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
d->config[0x0D] = 0x10; // latency_timer
d->config[0x0E] = 0x00; // header_type
// d->config[0x34] = 0x80; // capabilities_pointer
-#endif
#if 0 // XXX: not needed for now
/* Uninorth internal bus */