aboutsummaryrefslogtreecommitdiff
path: root/hw
diff options
context:
space:
mode:
Diffstat (limited to 'hw')
-rw-r--r--hw/apb_pci.c2
-rw-r--r--hw/boards.h2
-rw-r--r--hw/e1000.c3
-rw-r--r--hw/elf_ops.h9
-rw-r--r--hw/loader.c14
-rw-r--r--hw/lsi53c895a.c2
-rw-r--r--hw/mac_dbdma.c85
-rw-r--r--hw/pc.c15
-rw-r--r--hw/pci.c29
-rw-r--r--hw/pci.h4
-rw-r--r--hw/scsi-bus.c4
-rw-r--r--hw/sun4m.c9
-rw-r--r--hw/sun4u.c26
13 files changed, 138 insertions, 66 deletions
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index fe8faa6d05..f05308b92b 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -225,6 +225,8 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
pci_apb_set_irq, pci_pbm_map_irq, pic,
0, 32);
+ pci_bus_set_mem_base(d->host_state.bus, mem_base);
+
pci_create_simple(d->host_state.bus, 0, "pbm");
/* APB secondary busses */
*bus2 = pci_bridge_init(d->host_state.bus, PCI_DEVFN(1, 0),
diff --git a/hw/boards.h b/hw/boards.h
index e1beda308b..6f0f0d7925 100644
--- a/hw/boards.h
+++ b/hw/boards.h
@@ -19,7 +19,7 @@ typedef struct QEMUMachine {
QEMUMachineInitFunc *init;
int use_scsi;
int max_cpus;
- int no_serial:1,
+ unsigned int no_serial:1,
no_parallel:1,
use_virtcon:1,
no_vga:1,
diff --git a/hw/e1000.c b/hw/e1000.c
index 51c9d7d81b..fd3059ad8a 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -1,6 +1,9 @@
/*
* QEMU e1000 emulation
*
+ * Software developer's manual:
+ * http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf
+ *
* Nir Peleg, Tutis Systems Ltd. for Qumranet Inc.
* Copyright (c) 2008 Qumranet
* Based on work done by:
diff --git a/hw/elf_ops.h b/hw/elf_ops.h
index 6093deaa73..14b9ec0444 100644
--- a/hw/elf_ops.h
+++ b/hw/elf_ops.h
@@ -149,9 +149,14 @@ static int glue(load_symbols, SZ)(struct elfhdr *ehdr, int fd, int must_swab,
}
i++;
}
- syms = qemu_realloc(syms, nsyms * sizeof(*syms));
+ if (nsyms) {
+ syms = qemu_realloc(syms, nsyms * sizeof(*syms));
- qsort(syms, nsyms, sizeof(*syms), glue(symcmp, SZ));
+ qsort(syms, nsyms, sizeof(*syms), glue(symcmp, SZ));
+ } else {
+ qemu_free(syms);
+ syms = NULL;
+ }
/* String table */
if (symtab->sh_link >= ehdr->e_shnum)
diff --git a/hw/loader.c b/hw/loader.c
index 2ceb8eba48..3aba47c6a7 100644
--- a/hw/loader.c
+++ b/hw/loader.c
@@ -636,6 +636,9 @@ static void rom_reset(void *unused)
Rom *rom;
QTAILQ_FOREACH(rom, &roms, next) {
+ if (rom->fw_file) {
+ continue;
+ }
if (rom->data == NULL)
continue;
cpu_physical_memory_write_rom(rom->addr, rom->data, rom->romsize);
@@ -654,6 +657,9 @@ int rom_load_all(void)
Rom *rom;
QTAILQ_FOREACH(rom, &roms, next) {
+ if (rom->fw_file) {
+ continue;
+ }
if (addr > rom->addr) {
fprintf(stderr, "rom: requested regions overlap "
"(rom %s. free=0x" TARGET_FMT_plx
@@ -689,6 +695,9 @@ static Rom *find_rom(target_phys_addr_t addr)
Rom *rom;
QTAILQ_FOREACH(rom, &roms, next) {
+ if (rom->fw_file) {
+ continue;
+ }
if (rom->addr > addr)
continue;
if (rom->addr + rom->romsize < addr)
@@ -711,6 +720,9 @@ int rom_copy(uint8_t *dest, target_phys_addr_t addr, size_t size)
Rom *rom;
QTAILQ_FOREACH(rom, &roms, next) {
+ if (rom->fw_file) {
+ continue;
+ }
if (rom->addr + rom->romsize < addr)
continue;
if (rom->addr > end)
@@ -752,7 +764,7 @@ void do_info_roms(Monitor *mon)
Rom *rom;
QTAILQ_FOREACH(rom, &roms, next) {
- if (rom->addr) {
+ if (!rom->fw_file) {
monitor_printf(mon, "addr=" TARGET_FMT_plx
" size=0x%06zx mem=%s name=\"%s\" \n",
rom->addr, rom->romsize,
diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c
index 463a889d6f..f6660a314a 100644
--- a/hw/lsi53c895a.c
+++ b/hw/lsi53c895a.c
@@ -607,7 +607,7 @@ static void lsi_reselect(LSIState *s, uint32_t tag)
id = (tag >> 8) & 0xf;
s->ssid = id | 0x80;
/* LSI53C700 Family Compatibility, see LSI53C895A 4-73 */
- if (!s->dcntl & LSI_DCNTL_COM) {
+ if (!(s->dcntl & LSI_DCNTL_COM)) {
s->sfbr = 1 << (id & 0x7);
}
DPRINTF("Reselected target %d\n", id);
diff --git a/hw/mac_dbdma.c b/hw/mac_dbdma.c
index 98dccfd244..8ec3d99314 100644
--- a/hw/mac_dbdma.c
+++ b/hw/mac_dbdma.c
@@ -184,19 +184,19 @@ static void dump_dbdma_cmd(dbdma_cmd *cmd)
static void dbdma_cmdptr_load(DBDMA_channel *ch)
{
DBDMA_DPRINTF("dbdma_cmdptr_load 0x%08x\n",
- be32_to_cpu(ch->regs[DBDMA_CMDPTR_LO]));
- cpu_physical_memory_read(be32_to_cpu(ch->regs[DBDMA_CMDPTR_LO]),
+ ch->regs[DBDMA_CMDPTR_LO]);
+ cpu_physical_memory_read(ch->regs[DBDMA_CMDPTR_LO],
(uint8_t*)&ch->current, sizeof(dbdma_cmd));
}
static void dbdma_cmdptr_save(DBDMA_channel *ch)
{
DBDMA_DPRINTF("dbdma_cmdptr_save 0x%08x\n",
- be32_to_cpu(ch->regs[DBDMA_CMDPTR_LO]));
+ ch->regs[DBDMA_CMDPTR_LO]);
DBDMA_DPRINTF("xfer_status 0x%08x res_count 0x%04x\n",
le16_to_cpu(ch->current.xfer_status),
le16_to_cpu(ch->current.res_count));
- cpu_physical_memory_write(be32_to_cpu(ch->regs[DBDMA_CMDPTR_LO]),
+ cpu_physical_memory_write(ch->regs[DBDMA_CMDPTR_LO],
(uint8_t*)&ch->current, sizeof(dbdma_cmd));
}
@@ -204,8 +204,8 @@ static void kill_channel(DBDMA_channel *ch)
{
DBDMA_DPRINTF("kill_channel\n");
- ch->regs[DBDMA_STATUS] |= cpu_to_be32(DEAD);
- ch->regs[DBDMA_STATUS] &= cpu_to_be32(~ACTIVE);
+ ch->regs[DBDMA_STATUS] |= DEAD;
+ ch->regs[DBDMA_STATUS] &= ~ACTIVE;
qemu_irq_raise(ch->irq);
}
@@ -230,10 +230,10 @@ static void conditional_interrupt(DBDMA_channel *ch)
return;
}
- status = be32_to_cpu(ch->regs[DBDMA_STATUS]) & DEVSTAT;
+ status = ch->regs[DBDMA_STATUS] & DEVSTAT;
- sel_mask = (be32_to_cpu(ch->regs[DBDMA_INTR_SEL]) >> 16) & 0x0f;
- sel_value = be32_to_cpu(ch->regs[DBDMA_INTR_SEL]) & 0x0f;
+ sel_mask = (ch->regs[DBDMA_INTR_SEL] >> 16) & 0x0f;
+ sel_value = ch->regs[DBDMA_INTR_SEL] & 0x0f;
cond = (status & sel_mask) == (sel_value & sel_mask);
@@ -268,10 +268,10 @@ static int conditional_wait(DBDMA_channel *ch)
return 1;
}
- status = be32_to_cpu(ch->regs[DBDMA_STATUS]) & DEVSTAT;
+ status = ch->regs[DBDMA_STATUS] & DEVSTAT;
- sel_mask = (be32_to_cpu(ch->regs[DBDMA_WAIT_SEL]) >> 16) & 0x0f;
- sel_value = be32_to_cpu(ch->regs[DBDMA_WAIT_SEL]) & 0x0f;
+ sel_mask = (ch->regs[DBDMA_WAIT_SEL] >> 16) & 0x0f;
+ sel_value = ch->regs[DBDMA_WAIT_SEL] & 0x0f;
cond = (status & sel_mask) == (sel_value & sel_mask);
@@ -292,10 +292,10 @@ static void next(DBDMA_channel *ch)
{
uint32_t cp;
- ch->regs[DBDMA_STATUS] &= cpu_to_be32(~BT);
+ ch->regs[DBDMA_STATUS] &= ~BT;
- cp = be32_to_cpu(ch->regs[DBDMA_CMDPTR_LO]);
- ch->regs[DBDMA_CMDPTR_LO] = cpu_to_be32(cp + sizeof(dbdma_cmd));
+ cp = ch->regs[DBDMA_CMDPTR_LO];
+ ch->regs[DBDMA_CMDPTR_LO] = cp + sizeof(dbdma_cmd);
dbdma_cmdptr_load(ch);
}
@@ -304,7 +304,7 @@ static void branch(DBDMA_channel *ch)
dbdma_cmd *current = &ch->current;
ch->regs[DBDMA_CMDPTR_LO] = current->cmd_dep;
- ch->regs[DBDMA_STATUS] |= cpu_to_be32(BT);
+ ch->regs[DBDMA_STATUS] |= BT;
dbdma_cmdptr_load(ch);
}
@@ -331,10 +331,10 @@ static void conditional_branch(DBDMA_channel *ch)
return;
}
- status = be32_to_cpu(ch->regs[DBDMA_STATUS]) & DEVSTAT;
+ status = ch->regs[DBDMA_STATUS] & DEVSTAT;
- sel_mask = (be32_to_cpu(ch->regs[DBDMA_BRANCH_SEL]) >> 16) & 0x0f;
- sel_value = be32_to_cpu(ch->regs[DBDMA_BRANCH_SEL]) & 0x0f;
+ sel_mask = (ch->regs[DBDMA_BRANCH_SEL] >> 16) & 0x0f;
+ sel_value = ch->regs[DBDMA_BRANCH_SEL] & 0x0f;
cond = (status & sel_mask) == (sel_value & sel_mask);
@@ -365,19 +365,19 @@ static void dbdma_end(DBDMA_io *io)
if (conditional_wait(ch))
goto wait;
- current->xfer_status = cpu_to_le16(be32_to_cpu(ch->regs[DBDMA_STATUS]));
- current->res_count = cpu_to_le16(be32_to_cpu(io->len));
+ current->xfer_status = cpu_to_le16(ch->regs[DBDMA_STATUS]);
+ current->res_count = cpu_to_le16(io->len);
dbdma_cmdptr_save(ch);
if (io->is_last)
- ch->regs[DBDMA_STATUS] &= cpu_to_be32(~FLUSH);
+ ch->regs[DBDMA_STATUS] &= ~FLUSH;
conditional_interrupt(ch);
conditional_branch(ch);
wait:
ch->processing = 0;
- if ((ch->regs[DBDMA_STATUS] & cpu_to_be32(RUN)) &&
- (ch->regs[DBDMA_STATUS] & cpu_to_be32(ACTIVE)))
+ if ((ch->regs[DBDMA_STATUS] & RUN) &&
+ (ch->regs[DBDMA_STATUS] & ACTIVE))
channel_run(ch);
}
@@ -456,9 +456,9 @@ static void load_word(DBDMA_channel *ch, int key, uint32_t addr,
if (conditional_wait(ch))
goto wait;
- current->xfer_status = cpu_to_le16(be32_to_cpu(ch->regs[DBDMA_STATUS]));
+ current->xfer_status = cpu_to_le16(ch->regs[DBDMA_STATUS]);
dbdma_cmdptr_save(ch);
- ch->regs[DBDMA_STATUS] &= cpu_to_be32(~FLUSH);
+ ch->regs[DBDMA_STATUS] &= ~FLUSH;
conditional_interrupt(ch);
next(ch);
@@ -494,9 +494,9 @@ static void store_word(DBDMA_channel *ch, int key, uint32_t addr,
if (conditional_wait(ch))
goto wait;
- current->xfer_status = cpu_to_le16(be32_to_cpu(ch->regs[DBDMA_STATUS]));
+ current->xfer_status = cpu_to_le16(ch->regs[DBDMA_STATUS]);
dbdma_cmdptr_save(ch);
- ch->regs[DBDMA_STATUS] &= cpu_to_be32(~FLUSH);
+ ch->regs[DBDMA_STATUS] &= ~FLUSH;
conditional_interrupt(ch);
next(ch);
@@ -512,7 +512,7 @@ static void nop(DBDMA_channel *ch)
if (conditional_wait(ch))
goto wait;
- current->xfer_status = cpu_to_le16(be32_to_cpu(ch->regs[DBDMA_STATUS]));
+ current->xfer_status = cpu_to_le16(ch->regs[DBDMA_STATUS]);
dbdma_cmdptr_save(ch);
conditional_interrupt(ch);
@@ -524,7 +524,7 @@ wait:
static void stop(DBDMA_channel *ch)
{
- ch->regs[DBDMA_STATUS] &= cpu_to_be32(~(ACTIVE|DEAD|FLUSH));
+ ch->regs[DBDMA_STATUS] &= ~(ACTIVE|DEAD|FLUSH);
/* the stop command does not increment command pointer */
}
@@ -541,7 +541,7 @@ static void channel_run(DBDMA_channel *ch)
/* clear WAKE flag at command fetch */
- ch->regs[DBDMA_STATUS] &= cpu_to_be32(~WAKE);
+ ch->regs[DBDMA_STATUS] &= ~WAKE;
cmd = le16_to_cpu(current->command) & COMMAND_MASK;
@@ -618,7 +618,7 @@ static void DBDMA_run (DBDMA_channel *ch)
int channel;
for (channel = 0; channel < DBDMA_CHANNELS; channel++, ch++) {
- uint32_t status = be32_to_cpu(ch->regs[DBDMA_STATUS]);
+ uint32_t status = ch->regs[DBDMA_STATUS];
if (!ch->processing && (status & RUN) && (status & ACTIVE))
channel_run(ch);
}
@@ -660,12 +660,12 @@ dbdma_control_write(DBDMA_channel *ch)
uint16_t mask, value;
uint32_t status;
- mask = (be32_to_cpu(ch->regs[DBDMA_CONTROL]) >> 16) & 0xffff;
- value = be32_to_cpu(ch->regs[DBDMA_CONTROL]) & 0xffff;
+ mask = (ch->regs[DBDMA_CONTROL] >> 16) & 0xffff;
+ value = ch->regs[DBDMA_CONTROL] & 0xffff;
value &= (RUN | PAUSE | FLUSH | WAKE | DEVSTAT);
- status = be32_to_cpu(ch->regs[DBDMA_STATUS]);
+ status = ch->regs[DBDMA_STATUS];
status = (value & mask) | (status & ~mask);
@@ -677,14 +677,14 @@ dbdma_control_write(DBDMA_channel *ch)
}
if (status & PAUSE)
status &= ~ACTIVE;
- if ((be32_to_cpu(ch->regs[DBDMA_STATUS]) & RUN) && !(status & RUN)) {
+ if ((ch->regs[DBDMA_STATUS] & RUN) && !(status & RUN)) {
/* RUN is cleared */
status &= ~(ACTIVE|DEAD);
}
DBDMA_DPRINTF(" status 0x%08x\n", status);
- ch->regs[DBDMA_STATUS] = cpu_to_be32(status);
+ ch->regs[DBDMA_STATUS] = status;
if (status & ACTIVE)
qemu_bh_schedule(dbdma_bh);
@@ -703,10 +703,14 @@ static void dbdma_writel (void *opaque,
DBDMA_DPRINTF("channel 0x%x reg 0x%x\n",
(uint32_t)addr >> DBDMA_CHANNEL_SHIFT, reg);
+#ifdef TARGET_WORDS_BIGENDIAN
+ value = bswap32(value);
+#endif
+
/* cmdptr cannot be modified if channel is RUN or ACTIVE */
if (reg == DBDMA_CMDPTR_LO &&
- (ch->regs[DBDMA_STATUS] & cpu_to_be32(RUN | ACTIVE)))
+ (ch->regs[DBDMA_STATUS] & (RUN | ACTIVE)))
return;
ch->regs[reg] = value;
@@ -717,7 +721,7 @@ static void dbdma_writel (void *opaque,
break;
case DBDMA_CMDPTR_LO:
/* 16-byte aligned */
- ch->regs[DBDMA_CMDPTR_LO] &= cpu_to_be32(~0xf);
+ ch->regs[DBDMA_CMDPTR_LO] &= ~0xf;
dbdma_cmdptr_load(ch);
break;
case DBDMA_STATUS:
@@ -782,6 +786,9 @@ static uint32_t dbdma_readl (void *opaque, target_phys_addr_t addr)
break;
}
+#ifdef TARGET_WORDS_BIGENDIAN
+ value = bswap32(value);
+#endif
return value;
}
diff --git a/hw/pc.c b/hw/pc.c
index db7d58efea..83f8dd01fc 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -613,7 +613,10 @@ static int load_multiboot(void *fw_cfg,
mb_kernel_data = qemu_malloc(mb_kernel_size);
fseek(f, mb_kernel_text_offset, SEEK_SET);
- fread(mb_kernel_data, 1, mb_kernel_size, f);
+ if (fread(mb_kernel_data, 1, mb_kernel_size, f) != mb_kernel_size) {
+ fprintf(stderr, "fread() failed\n");
+ exit(1);
+ }
fclose(f);
}
@@ -887,8 +890,14 @@ static void load_linux(void *fw_cfg,
setup = qemu_malloc(setup_size);
kernel = qemu_malloc(kernel_size);
fseek(f, 0, SEEK_SET);
- fread(setup, 1, setup_size, f);
- fread(kernel, 1, kernel_size, f);
+ if (fread(setup, 1, setup_size, f) != setup_size) {
+ fprintf(stderr, "fread() failed\n");
+ exit(1);
+ }
+ if (fread(kernel, 1, kernel_size, f) != kernel_size) {
+ fprintf(stderr, "fread() failed\n");
+ exit(1);
+ }
fclose(f);
memcpy(setup, header, MIN(sizeof(header), setup_size));
diff --git a/hw/pci.c b/hw/pci.c
index bf6ceb9c70..08e51f8d6c 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -44,6 +44,7 @@ struct PCIBus {
void *irq_opaque;
PCIDevice *devices[256];
PCIDevice *parent_dev;
+ target_phys_addr_t mem_base;
QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
@@ -71,7 +72,6 @@ static void pci_update_mappings(PCIDevice *d);
static void pci_set_irq(void *opaque, int irq_num, int level);
static int pci_add_option_rom(PCIDevice *pdev);
-target_phys_addr_t pci_mem_base;
static uint16_t pci_default_sub_vendor_id = PCI_SUBVENDOR_ID_REDHAT_QUMRANET;
static uint16_t pci_default_sub_device_id = PCI_SUBDEVICE_ID_QEMU;
@@ -237,6 +237,11 @@ void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug)
bus->hotplug = hotplug;
}
+void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base)
+{
+ bus->mem_base = base;
+}
+
PCIBus *pci_register_bus(DeviceState *parent, const char *name,
pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
void *irq_opaque, int devfn_min, int nirq)
@@ -634,9 +639,11 @@ PCIDevice *pci_register_device(PCIBus *bus, const char *name,
}
return pci_dev;
}
-static target_phys_addr_t pci_to_cpu_addr(target_phys_addr_t addr)
+
+static target_phys_addr_t pci_to_cpu_addr(PCIBus *bus,
+ target_phys_addr_t addr)
{
- return addr + pci_mem_base;
+ return addr + bus->mem_base;
}
static void pci_unregister_io_regions(PCIDevice *pci_dev)
@@ -651,9 +658,10 @@ static void pci_unregister_io_regions(PCIDevice *pci_dev)
if (r->type == PCI_BASE_ADDRESS_SPACE_IO) {
isa_unassign_ioport(r->addr, r->filtered_size);
} else {
- cpu_register_physical_memory(pci_to_cpu_addr(r->addr),
- r->filtered_size,
- IO_MEM_UNASSIGNED);
+ cpu_register_physical_memory(pci_to_cpu_addr(pci_dev->bus,
+ r->addr),
+ r->filtered_size,
+ IO_MEM_UNASSIGNED);
}
}
}
@@ -925,7 +933,7 @@ static void pci_update_mappings(PCIDevice *d)
isa_unassign_ioport(r->addr, r->filtered_size);
}
} else {
- cpu_register_physical_memory(pci_to_cpu_addr(r->addr),
+ cpu_register_physical_memory(pci_to_cpu_addr(d->bus, r->addr),
r->filtered_size,
IO_MEM_UNASSIGNED);
qemu_unregister_coalesced_mmio(r->addr, r->filtered_size);
@@ -941,7 +949,12 @@ static void pci_update_mappings(PCIDevice *d)
* Teach them such cases, such that filtered_size < size and
* addr & (size - 1) != 0.
*/
- r->map_func(d, i, r->addr, r->filtered_size, r->type);
+ if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
+ r->map_func(d, i, r->addr, r->filtered_size, r->type);
+ } else {
+ r->map_func(d, i, pci_to_cpu_addr(d->bus, r->addr),
+ r->filtered_size, r->type);
+ }
}
}
}
diff --git a/hw/pci.h b/hw/pci.h
index 5687bcbfd6..9b5ae9798e 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -10,8 +10,6 @@
/* PCI bus */
-extern target_phys_addr_t pci_mem_base;
-
#define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn) ((devfn) & 0x07)
@@ -219,6 +217,8 @@ PCIBus *pci_register_bus(DeviceState *parent, const char *name,
pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
void *irq_opaque, int devfn_min, int nirq);
+void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base);
+
PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model,
const char *default_devaddr);
PCIDevice *pci_nic_init_nofail(NICInfo *nd, const char *default_model,
diff --git a/hw/scsi-bus.c b/hw/scsi-bus.c
index 736e91e91b..a2f9cc1cc3 100644
--- a/hw/scsi-bus.c
+++ b/hw/scsi-bus.c
@@ -374,6 +374,7 @@ static const char *scsi_command_name(uint8_t cmd)
static const char *names[] = {
[ TEST_UNIT_READY ] = "TEST_UNIT_READY",
[ REZERO_UNIT ] = "REZERO_UNIT",
+ /* REWIND and REZERO_UNIT use the same operation code */
[ REQUEST_SENSE ] = "REQUEST_SENSE",
[ FORMAT_UNIT ] = "FORMAT_UNIT",
[ READ_BLOCK_LIMITS ] = "READ_BLOCK_LIMITS",
@@ -409,7 +410,7 @@ static const char *scsi_command_name(uint8_t cmd)
[ SEARCH_LOW ] = "SEARCH_LOW",
[ SET_LIMITS ] = "SET_LIMITS",
[ PRE_FETCH ] = "PRE_FETCH",
- [ READ_POSITION ] = "READ_POSITION",
+ /* READ_POSITION and PRE_FETCH use the same operation code */
[ SYNCHRONIZE_CACHE ] = "SYNCHRONIZE_CACHE",
[ LOCK_UNLOCK_CACHE ] = "LOCK_UNLOCK_CACHE",
[ READ_DEFECT_DATA ] = "READ_DEFECT_DATA",
@@ -443,7 +444,6 @@ static const char *scsi_command_name(uint8_t cmd)
[ SEND_VOLUME_TAG ] = "SEND_VOLUME_TAG",
[ WRITE_LONG_2 ] = "WRITE_LONG_2",
- [ REWIND ] = "REWIND",
[ REPORT_DENSITY_SUPPORT ] = "REPORT_DENSITY_SUPPORT",
[ GET_CONFIGURATION ] = "GET_CONFIGURATION",
[ READ_16 ] = "READ_16",
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 7db00b8222..ad1efb1ebc 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -917,6 +917,9 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
if (kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
+ (uint8_t*)strdup(kernel_cmdline),
+ strlen(kernel_cmdline) + 1);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
}
@@ -1500,6 +1503,9 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
if (kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
+ (uint8_t*)strdup(kernel_cmdline),
+ strlen(kernel_cmdline) + 1);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
}
@@ -1688,6 +1694,9 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
if (kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
+ (uint8_t*)strdup(kernel_cmdline),
+ strlen(kernel_cmdline) + 1);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
}
diff --git a/hw/sun4u.c b/hw/sun4u.c
index a7a227bbec..9d46f08815 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -39,12 +39,20 @@
#include "elf.h"
//#define DEBUG_IRQ
+//#define DEBUG_EBUS
#ifdef DEBUG_IRQ
-#define DPRINTF(fmt, ...) \
+#define CPUIRQ_DPRINTF(fmt, ...) \
do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
#else
-#define DPRINTF(fmt, ...)
+#define CPUIRQ_DPRINTF(fmt, ...)
+#endif
+
+#ifdef DEBUG_EBUS
+#define EBUS_DPRINTF(fmt, ...) \
+ do { printf("EBUS: " fmt , ## __VA_ARGS__); } while (0)
+#else
+#define EBUS_DPRINTF(fmt, ...)
#endif
#define KERNEL_LOAD_ADDR 0x00404000
@@ -238,14 +246,14 @@ void cpu_check_irqs(CPUState *env)
env->interrupt_index = TT_EXTINT | i;
if (old_interrupt != env->interrupt_index) {
- DPRINTF("Set CPU IRQ %d\n", i);
+ CPUIRQ_DPRINTF("Set CPU IRQ %d\n", i);
cpu_interrupt(env, CPU_INTERRUPT_HARD);
}
break;
}
}
} else if (!pil && (env->interrupt_index & ~15) == TT_EXTINT) {
- DPRINTF("Reset CPU IRQ %d\n", env->interrupt_index & 15);
+ CPUIRQ_DPRINTF("Reset CPU IRQ %d\n", env->interrupt_index & 15);
env->interrupt_index = 0;
cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
}
@@ -256,12 +264,12 @@ static void cpu_set_irq(void *opaque, int irq, int level)
CPUState *env = opaque;
if (level) {
- DPRINTF("Raise CPU IRQ %d\n", irq);
+ CPUIRQ_DPRINTF("Raise CPU IRQ %d\n", irq);
env->halted = 0;
env->pil_in |= 1 << irq;
cpu_check_irqs(env);
} else {
- DPRINTF("Lower CPU IRQ %d\n", irq);
+ CPUIRQ_DPRINTF("Lower CPU IRQ %d\n", irq);
env->pil_in &= ~(1 << irq);
cpu_check_irqs(env);
}
@@ -347,7 +355,8 @@ void cpu_tick_set_limit(void *opaque, uint64_t limit)
static void ebus_mmio_mapfunc(PCIDevice *pci_dev, int region_num,
pcibus_t addr, pcibus_t size, int type)
{
- DPRINTF("Mapping region %d registers at %08x\n", region_num, addr);
+ EBUS_DPRINTF("Mapping region %d registers at %" FMT_PCIBUS "\n",
+ region_num, addr);
switch (region_num) {
case 0:
isa_mmio_init(addr, 0x1000000);
@@ -652,6 +661,9 @@ static void sun4uv_init(ram_addr_t RAM_size,
if (kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
+ (uint8_t*)strdup(kernel_cmdline),
+ strlen(kernel_cmdline) + 1);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
}
generated by cgit v1.2.3 (git 2.26.2) at 2025-02-02 03:59:44 +0000