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-rw-r--r--hw/timer/altera_timer.c6
-rw-r--r--hw/timer/arm_timer.c11
-rw-r--r--hw/timer/cadence_ttc.c6
-rw-r--r--hw/timer/etraxfs_timer.c6
-rw-r--r--hw/timer/exynos4210_mct.c6
-rw-r--r--hw/timer/exynos4210_pwm.c6
-rw-r--r--hw/timer/grlib_gptimer.c3
-rw-r--r--hw/timer/hpet.c6
-rw-r--r--hw/timer/i8254.c6
-rw-r--r--hw/timer/lm32_timer.c3
-rw-r--r--hw/timer/milkymist-sysctl.c3
-rw-r--r--hw/timer/puv3_ost.c6
-rw-r--r--hw/timer/pxa2xx_timer.c3
-rw-r--r--hw/timer/slavio_timer.c6
-rw-r--r--hw/timer/xilinx_timer.c1
15 files changed, 52 insertions, 26 deletions
diff --git a/hw/timer/altera_timer.c b/hw/timer/altera_timer.c
index be81b7a518..93bd5b9587 100644
--- a/hw/timer/altera_timer.c
+++ b/hw/timer/altera_timer.c
@@ -26,6 +26,7 @@
#include "hw/irq.h"
#include "hw/ptimer.h"
#include "hw/qdev-properties.h"
+#include "qom/object.h"
#define R_STATUS 0
#define R_CONTROL 1
@@ -44,17 +45,18 @@
#define CONTROL_STOP 0x0008
#define TYPE_ALTERA_TIMER "ALTR.timer"
+typedef struct AlteraTimer AlteraTimer;
#define ALTERA_TIMER(obj) \
OBJECT_CHECK(AlteraTimer, (obj), TYPE_ALTERA_TIMER)
-typedef struct AlteraTimer {
+struct AlteraTimer {
SysBusDevice busdev;
MemoryRegion mmio;
qemu_irq irq;
uint32_t freq_hz;
ptimer_state *ptimer;
uint32_t regs[R_MAX];
-} AlteraTimer;
+};
static int timer_irq_state(AlteraTimer *t)
{
diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c
index 9607366d78..d728a80937 100644
--- a/hw/timer/arm_timer.c
+++ b/hw/timer/arm_timer.c
@@ -16,6 +16,7 @@
#include "hw/qdev-properties.h"
#include "qemu/module.h"
#include "qemu/log.h"
+#include "qom/object.h"
/* Common timer implementation. */
@@ -190,9 +191,10 @@ static arm_timer_state *arm_timer_init(uint32_t freq)
*/
#define TYPE_SP804 "sp804"
+typedef struct SP804State SP804State;
#define SP804(obj) OBJECT_CHECK(SP804State, (obj), TYPE_SP804)
-typedef struct SP804State {
+struct SP804State {
SysBusDevice parent_obj;
MemoryRegion iomem;
@@ -200,7 +202,7 @@ typedef struct SP804State {
uint32_t freq0, freq1;
int level[2];
qemu_irq irq;
-} SP804State;
+};
static const uint8_t sp804_ids[] = {
/* Timer ID */
@@ -310,15 +312,16 @@ static void sp804_realize(DeviceState *dev, Error **errp)
/* Integrator/CP timer module. */
#define TYPE_INTEGRATOR_PIT "integrator_pit"
+typedef struct icp_pit_state icp_pit_state;
#define INTEGRATOR_PIT(obj) \
OBJECT_CHECK(icp_pit_state, (obj), TYPE_INTEGRATOR_PIT)
-typedef struct {
+struct icp_pit_state {
SysBusDevice parent_obj;
MemoryRegion iomem;
arm_timer_state *timer[3];
-} icp_pit_state;
+};
static uint64_t icp_pit_read(void *opaque, hwaddr offset,
unsigned size)
diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c
index b0ba6b2bba..24de679d9c 100644
--- a/hw/timer/cadence_ttc.c
+++ b/hw/timer/cadence_ttc.c
@@ -22,6 +22,7 @@
#include "migration/vmstate.h"
#include "qemu/module.h"
#include "qemu/timer.h"
+#include "qom/object.h"
#ifdef CADENCE_TTC_ERR_DEBUG
#define DB_PRINT(...) do { \
@@ -69,15 +70,16 @@ typedef struct {
} CadenceTimerState;
#define TYPE_CADENCE_TTC "cadence_ttc"
+typedef struct CadenceTTCState CadenceTTCState;
#define CADENCE_TTC(obj) \
OBJECT_CHECK(CadenceTTCState, (obj), TYPE_CADENCE_TTC)
-typedef struct CadenceTTCState {
+struct CadenceTTCState {
SysBusDevice parent_obj;
MemoryRegion iomem;
CadenceTimerState timer[3];
-} CadenceTTCState;
+};
static void cadence_timer_update(CadenceTimerState *s)
{
diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c
index afe3d30a8e..92b8999b79 100644
--- a/hw/timer/etraxfs_timer.c
+++ b/hw/timer/etraxfs_timer.c
@@ -30,6 +30,7 @@
#include "qemu/timer.h"
#include "hw/irq.h"
#include "hw/ptimer.h"
+#include "qom/object.h"
#define D(x)
@@ -48,10 +49,11 @@
#define R_MASKED_INTR 0x54
#define TYPE_ETRAX_FS_TIMER "etraxfs,timer"
+typedef struct ETRAXTimerState ETRAXTimerState;
#define ETRAX_TIMER(obj) \
OBJECT_CHECK(ETRAXTimerState, (obj), TYPE_ETRAX_FS_TIMER)
-typedef struct ETRAXTimerState {
+struct ETRAXTimerState {
SysBusDevice parent_obj;
MemoryRegion mmio;
@@ -79,7 +81,7 @@ typedef struct ETRAXTimerState {
uint32_t rw_ack_intr;
uint32_t r_intr;
uint32_t r_masked_intr;
-} ETRAXTimerState;
+};
static uint64_t
timer_read(void *opaque, hwaddr addr, unsigned int size)
diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c
index 29a4b10676..aa8753ded8 100644
--- a/hw/timer/exynos4210_mct.c
+++ b/hw/timer/exynos4210_mct.c
@@ -62,6 +62,7 @@
#include "hw/arm/exynos4210.h"
#include "hw/irq.h"
+#include "qom/object.h"
//#define DEBUG_MCT
@@ -242,10 +243,11 @@ typedef struct {
} Exynos4210MCTLT;
#define TYPE_EXYNOS4210_MCT "exynos4210.mct"
+typedef struct Exynos4210MCTState Exynos4210MCTState;
#define EXYNOS4210_MCT(obj) \
OBJECT_CHECK(Exynos4210MCTState, (obj), TYPE_EXYNOS4210_MCT)
-typedef struct Exynos4210MCTState {
+struct Exynos4210MCTState {
SysBusDevice parent_obj;
MemoryRegion iomem;
@@ -257,7 +259,7 @@ typedef struct Exynos4210MCTState {
Exynos4210MCTGT g_timer;
uint32_t freq; /* all timers tick frequency, TCLK */
-} Exynos4210MCTState;
+};
/*** VMState ***/
static const VMStateDescription vmstate_tick_timer = {
diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c
index 59a8c08db0..34224020c0 100644
--- a/hw/timer/exynos4210_pwm.c
+++ b/hw/timer/exynos4210_pwm.c
@@ -30,6 +30,7 @@
#include "hw/arm/exynos4210.h"
#include "hw/irq.h"
+#include "qom/object.h"
//#define DEBUG_PWM
@@ -102,10 +103,11 @@ typedef struct {
} Exynos4210PWM;
#define TYPE_EXYNOS4210_PWM "exynos4210.pwm"
+typedef struct Exynos4210PWMState Exynos4210PWMState;
#define EXYNOS4210_PWM(obj) \
OBJECT_CHECK(Exynos4210PWMState, (obj), TYPE_EXYNOS4210_PWM)
-typedef struct Exynos4210PWMState {
+struct Exynos4210PWMState {
SysBusDevice parent_obj;
MemoryRegion iomem;
@@ -116,7 +118,7 @@ typedef struct Exynos4210PWMState {
Exynos4210PWM timer[EXYNOS4210_PWM_TIMERS_NUM];
-} Exynos4210PWMState;
+};
/*** VMState ***/
static const VMStateDescription vmstate_exynos4210_pwm = {
diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c
index eff0ee3491..91d42837c9 100644
--- a/hw/timer/grlib_gptimer.c
+++ b/hw/timer/grlib_gptimer.c
@@ -32,6 +32,7 @@
#include "qemu/module.h"
#include "trace.h"
+#include "qom/object.h"
#define UNIT_REG_SIZE 16 /* Size of memory mapped regs for the unit */
#define GPTIMER_REG_SIZE 16 /* Size of memory mapped regs for a GPTimer */
@@ -55,11 +56,11 @@
#define COUNTER_RELOAD_OFFSET 0x04
#define TIMER_BASE 0x10
+typedef struct GPTimerUnit GPTimerUnit;
#define GRLIB_GPTIMER(obj) \
OBJECT_CHECK(GPTimerUnit, (obj), TYPE_GRLIB_GPTIMER)
typedef struct GPTimer GPTimer;
-typedef struct GPTimerUnit GPTimerUnit;
struct GPTimer {
struct ptimer_state *ptimer;
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 380acfa7c8..07b3c0f9be 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -37,6 +37,7 @@
#include "migration/vmstate.h"
#include "hw/timer/i8254.h"
#include "exec/address-spaces.h"
+#include "qom/object.h"
//#define HPET_DEBUG
#ifdef HPET_DEBUG
@@ -47,6 +48,7 @@
#define HPET_MSI_SUPPORT 0
+typedef struct HPETState HPETState;
#define HPET(obj) OBJECT_CHECK(HPETState, (obj), TYPE_HPET)
struct HPETState;
@@ -65,7 +67,7 @@ typedef struct HPETTimer { /* timers */
*/
} HPETTimer;
-typedef struct HPETState {
+struct HPETState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
@@ -87,7 +89,7 @@ typedef struct HPETState {
uint64_t isr; /* interrupt status reg */
uint64_t hpet_counter; /* main counter */
uint8_t hpet_id; /* instance id */
-} HPETState;
+};
static uint32_t hpet_in_legacy_mode(HPETState *s)
{
diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c
index 29f62e5356..54639d13d8 100644
--- a/hw/timer/i8254.c
+++ b/hw/timer/i8254.c
@@ -28,6 +28,7 @@
#include "qemu/timer.h"
#include "hw/timer/i8254.h"
#include "hw/timer/i8254_internal.h"
+#include "qom/object.h"
//#define DEBUG_PIT
@@ -36,14 +37,15 @@
#define RW_STATE_WORD0 3
#define RW_STATE_WORD1 4
+typedef struct PITClass PITClass;
#define PIT_CLASS(class) OBJECT_CLASS_CHECK(PITClass, (class), TYPE_I8254)
#define PIT_GET_CLASS(obj) OBJECT_GET_CLASS(PITClass, (obj), TYPE_I8254)
-typedef struct PITClass {
+struct PITClass {
PITCommonClass parent_class;
DeviceRealize parent_realize;
-} PITClass;
+};
static void pit_irq_timer_update(PITChannelState *s, int64_t current_time);
diff --git a/hw/timer/lm32_timer.c b/hw/timer/lm32_timer.c
index f703f407f5..807ceb514c 100644
--- a/hw/timer/lm32_timer.c
+++ b/hw/timer/lm32_timer.c
@@ -31,6 +31,7 @@
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
+#include "qom/object.h"
#define DEFAULT_FREQUENCY (50*1000000)
@@ -55,6 +56,7 @@ enum {
};
#define TYPE_LM32_TIMER "lm32-timer"
+typedef struct LM32TimerState LM32TimerState;
#define LM32_TIMER(obj) OBJECT_CHECK(LM32TimerState, (obj), TYPE_LM32_TIMER)
struct LM32TimerState {
@@ -69,7 +71,6 @@ struct LM32TimerState {
uint32_t regs[R_MAX];
};
-typedef struct LM32TimerState LM32TimerState;
static void timer_update_irq(LM32TimerState *s)
{
diff --git a/hw/timer/milkymist-sysctl.c b/hw/timer/milkymist-sysctl.c
index 94389820b2..3667a09c99 100644
--- a/hw/timer/milkymist-sysctl.c
+++ b/hw/timer/milkymist-sysctl.c
@@ -32,6 +32,7 @@
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
+#include "qom/object.h"
enum {
CTRL_ENABLE = (1<<0),
@@ -62,6 +63,7 @@ enum {
};
#define TYPE_MILKYMIST_SYSCTL "milkymist-sysctl"
+typedef struct MilkymistSysctlState MilkymistSysctlState;
#define MILKYMIST_SYSCTL(obj) \
OBJECT_CHECK(MilkymistSysctlState, (obj), TYPE_MILKYMIST_SYSCTL)
@@ -84,7 +86,6 @@ struct MilkymistSysctlState {
qemu_irq timer0_irq;
qemu_irq timer1_irq;
};
-typedef struct MilkymistSysctlState MilkymistSysctlState;
static void sysctl_icap_write(MilkymistSysctlState *s, uint32_t value)
{
diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c
index f76b0bb1ca..8d61c670de 100644
--- a/hw/timer/puv3_ost.c
+++ b/hw/timer/puv3_ost.c
@@ -15,15 +15,17 @@
#include "hw/ptimer.h"
#include "qemu/module.h"
#include "qemu/log.h"
+#include "qom/object.h"
#undef DEBUG_PUV3
#include "hw/unicore32/puv3.h"
#define TYPE_PUV3_OST "puv3_ost"
+typedef struct PUV3OSTState PUV3OSTState;
#define PUV3_OST(obj) OBJECT_CHECK(PUV3OSTState, (obj), TYPE_PUV3_OST)
/* puv3 ostimer implementation. */
-typedef struct PUV3OSTState {
+struct PUV3OSTState {
SysBusDevice parent_obj;
MemoryRegion iomem;
@@ -34,7 +36,7 @@ typedef struct PUV3OSTState {
uint32_t reg_OSCR;
uint32_t reg_OSSR;
uint32_t reg_OIER;
-} PUV3OSTState;
+};
static uint64_t puv3_ost_read(void *opaque, hwaddr offset,
unsigned size)
diff --git a/hw/timer/pxa2xx_timer.c b/hw/timer/pxa2xx_timer.c
index 944c165889..c73cc721e1 100644
--- a/hw/timer/pxa2xx_timer.c
+++ b/hw/timer/pxa2xx_timer.c
@@ -17,6 +17,7 @@
#include "migration/vmstate.h"
#include "qemu/log.h"
#include "qemu/module.h"
+#include "qom/object.h"
#define OSMR0 0x00
#define OSMR1 0x04
@@ -66,10 +67,10 @@ static int pxa2xx_timer4_freq[8] = {
};
#define TYPE_PXA2XX_TIMER "pxa2xx-timer"
+typedef struct PXA2xxTimerInfo PXA2xxTimerInfo;
#define PXA2XX_TIMER(obj) \
OBJECT_CHECK(PXA2xxTimerInfo, (obj), TYPE_PXA2XX_TIMER)
-typedef struct PXA2xxTimerInfo PXA2xxTimerInfo;
typedef struct {
uint32_t value;
diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c
index 4c5d65e391..28d612372b 100644
--- a/hw/timer/slavio_timer.c
+++ b/hw/timer/slavio_timer.c
@@ -31,6 +31,7 @@
#include "migration/vmstate.h"
#include "trace.h"
#include "qemu/module.h"
+#include "qom/object.h"
/*
* Registers of hardware timer in sun4m.
@@ -59,16 +60,17 @@ typedef struct CPUTimerState {
} CPUTimerState;
#define TYPE_SLAVIO_TIMER "slavio_timer"
+typedef struct SLAVIO_TIMERState SLAVIO_TIMERState;
#define SLAVIO_TIMER(obj) \
OBJECT_CHECK(SLAVIO_TIMERState, (obj), TYPE_SLAVIO_TIMER)
-typedef struct SLAVIO_TIMERState {
+struct SLAVIO_TIMERState {
SysBusDevice parent_obj;
uint32_t num_cpus;
uint32_t cputimer_mode;
CPUTimerState cputimer[MAX_CPUS + 1];
-} SLAVIO_TIMERState;
+};
typedef struct TimerContext {
MemoryRegion iomem;
diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c
index 0190aa47d0..c262f6d96f 100644
--- a/hw/timer/xilinx_timer.c
+++ b/hw/timer/xilinx_timer.c
@@ -29,6 +29,7 @@
#include "hw/qdev-properties.h"
#include "qemu/log.h"
#include "qemu/module.h"
+#include "qom/object.h"
#define D(x)
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-16 19:17:50 +0000