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-rw-r--r--hw/timer/exynos4210_mct.c4
-rw-r--r--hw/timer/pxa2xx_timer.c1
-rw-r--r--hw/timer/stm32f2xx_timer.c1
3 files changed, 1 insertions, 5 deletions
diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c
index 944120aea5..570cf7075b 100644
--- a/hw/timer/exynos4210_mct.c
+++ b/hw/timer/exynos4210_mct.c
@@ -1367,7 +1367,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
case L0_TCNTB: case L1_TCNTB:
lt_i = GET_L_TIMER_IDX(offset);
- index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i);
/*
* TCNTB is updated to internal register only after CNT expired.
@@ -1396,7 +1395,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
case L0_ICNTB: case L1_ICNTB:
lt_i = GET_L_TIMER_IDX(offset);
- index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i);
s->l_timer[lt_i].reg.wstat |= L_WSTAT_ICNTB_WRITE;
s->l_timer[lt_i].reg.cnt[L_REG_CNT_ICNTB] = value &
@@ -1438,8 +1436,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
case L0_FRCNTB: case L1_FRCNTB:
lt_i = GET_L_TIMER_IDX(offset);
- index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i);
-
DPRINTF("local timer[%d] FRCNTB write %llx\n", lt_i, value);
s->l_timer[lt_i].reg.wstat |= L_WSTAT_FRCCNTB_WRITE;
diff --git a/hw/timer/pxa2xx_timer.c b/hw/timer/pxa2xx_timer.c
index cd172cc1e9..944c165889 100644
--- a/hw/timer/pxa2xx_timer.c
+++ b/hw/timer/pxa2xx_timer.c
@@ -140,6 +140,7 @@ static void pxa2xx_timer_update4(void *opaque, uint64_t now_qemu, int n)
static const int counters[8] = { 0, 0, 0, 0, 4, 4, 6, 6 };
int counter;
+ assert(n < ARRAY_SIZE(counters));
if (s->tm4[n].control & (1 << 7))
counter = n;
else
diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c
index 06ec8a02c2..ba8694dcd3 100644
--- a/hw/timer/stm32f2xx_timer.c
+++ b/hw/timer/stm32f2xx_timer.c
@@ -222,7 +222,6 @@ static void stm32f2xx_timer_write(void *opaque, hwaddr offset,
case TIM_PSC:
timer_val = stm32f2xx_ns_to_ticks(s, now) - s->tick_offset;
s->tim_psc = value & 0xFFFF;
- value = timer_val;
break;
case TIM_CNT:
timer_val = value;