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-rw-r--r--hw/ssi/pl022.c2
-rw-r--r--hw/ssi/ssi.c48
-rw-r--r--hw/ssi/xilinx_spips.c7
3 files changed, 29 insertions, 28 deletions
diff --git a/hw/ssi/pl022.c b/hw/ssi/pl022.c
index cade2e92a8..8954ffebb1 100644
--- a/hw/ssi/pl022.c
+++ b/hw/ssi/pl022.c
@@ -174,7 +174,7 @@ static void pl022_write(void *opaque, hwaddr offset,
s->cr1 = value;
if ((s->cr1 & (PL022_CR1_MS | PL022_CR1_SSE))
== (PL022_CR1_MS | PL022_CR1_SSE)) {
- BADF("SPI slave mode not implemented\n");
+ BADF("SPI peripheral mode not implemented\n");
}
pl022_xfer(s);
break;
diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c
index 4278d0e444..e5d7ce9523 100644
--- a/hw/ssi/ssi.c
+++ b/hw/ssi/ssi.c
@@ -34,11 +34,11 @@ static const TypeInfo ssi_bus_info = {
static void ssi_cs_default(void *opaque, int n, int level)
{
- SSISlave *s = SSI_SLAVE(opaque);
+ SSIPeripheral *s = SSI_PERIPHERAL(opaque);
bool cs = !!level;
assert(n == 0);
if (s->cs != cs) {
- SSISlaveClass *ssc = SSI_SLAVE_GET_CLASS(s);
+ SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(s);
if (ssc->set_cs) {
ssc->set_cs(s, cs);
}
@@ -46,9 +46,9 @@ static void ssi_cs_default(void *opaque, int n, int level)
s->cs = cs;
}
-static uint32_t ssi_transfer_raw_default(SSISlave *dev, uint32_t val)
+static uint32_t ssi_transfer_raw_default(SSIPeripheral *dev, uint32_t val)
{
- SSISlaveClass *ssc = SSI_SLAVE_GET_CLASS(dev);
+ SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(dev);
if ((dev->cs && ssc->cs_polarity == SSI_CS_HIGH) ||
(!dev->cs && ssc->cs_polarity == SSI_CS_LOW) ||
@@ -58,10 +58,10 @@ static uint32_t ssi_transfer_raw_default(SSISlave *dev, uint32_t val)
return 0;
}
-static void ssi_slave_realize(DeviceState *dev, Error **errp)
+static void ssi_peripheral_realize(DeviceState *dev, Error **errp)
{
- SSISlave *s = SSI_SLAVE(dev);
- SSISlaveClass *ssc = SSI_SLAVE_GET_CLASS(s);
+ SSIPeripheral *s = SSI_PERIPHERAL(dev);
+ SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(s);
if (ssc->transfer_raw == ssi_transfer_raw_default &&
ssc->cs_polarity != SSI_CS_NONE) {
@@ -71,23 +71,23 @@ static void ssi_slave_realize(DeviceState *dev, Error **errp)
ssc->realize(s, errp);
}
-static void ssi_slave_class_init(ObjectClass *klass, void *data)
+static void ssi_peripheral_class_init(ObjectClass *klass, void *data)
{
- SSISlaveClass *ssc = SSI_SLAVE_CLASS(klass);
+ SSIPeripheralClass *ssc = SSI_PERIPHERAL_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->realize = ssi_slave_realize;
+ dc->realize = ssi_peripheral_realize;
dc->bus_type = TYPE_SSI_BUS;
if (!ssc->transfer_raw) {
ssc->transfer_raw = ssi_transfer_raw_default;
}
}
-static const TypeInfo ssi_slave_info = {
- .name = TYPE_SSI_SLAVE,
+static const TypeInfo ssi_peripheral_info = {
+ .name = TYPE_SSI_PERIPHERAL,
.parent = TYPE_DEVICE,
- .class_init = ssi_slave_class_init,
- .class_size = sizeof(SSISlaveClass),
+ .class_init = ssi_peripheral_class_init,
+ .class_size = sizeof(SSIPeripheralClass),
.abstract = true,
};
@@ -96,7 +96,7 @@ bool ssi_realize_and_unref(DeviceState *dev, SSIBus *bus, Error **errp)
return qdev_realize_and_unref(dev, &bus->parent_obj, errp);
}
-DeviceState *ssi_create_slave(SSIBus *bus, const char *name)
+DeviceState *ssi_create_peripheral(SSIBus *bus, const char *name)
{
DeviceState *dev = qdev_new(name);
@@ -115,32 +115,32 @@ uint32_t ssi_transfer(SSIBus *bus, uint32_t val)
{
BusState *b = BUS(bus);
BusChild *kid;
- SSISlaveClass *ssc;
+ SSIPeripheralClass *ssc;
uint32_t r = 0;
QTAILQ_FOREACH(kid, &b->children, sibling) {
- SSISlave *slave = SSI_SLAVE(kid->child);
- ssc = SSI_SLAVE_GET_CLASS(slave);
- r |= ssc->transfer_raw(slave, val);
+ SSIPeripheral *peripheral = SSI_PERIPHERAL(kid->child);
+ ssc = SSI_PERIPHERAL_GET_CLASS(peripheral);
+ r |= ssc->transfer_raw(peripheral, val);
}
return r;
}
-const VMStateDescription vmstate_ssi_slave = {
+const VMStateDescription vmstate_ssi_peripheral = {
.name = "SSISlave",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
- VMSTATE_BOOL(cs, SSISlave),
+ VMSTATE_BOOL(cs, SSIPeripheral),
VMSTATE_END_OF_LIST()
}
};
-static void ssi_slave_register_types(void)
+static void ssi_peripheral_register_types(void)
{
type_register_static(&ssi_bus_info);
- type_register_static(&ssi_slave_info);
+ type_register_static(&ssi_peripheral_info);
}
-type_init(ssi_slave_register_types)
+type_init(ssi_peripheral_register_types)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index b9371dbf8d..dd8df9daf4 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -236,7 +236,8 @@ static void xilinx_spips_update_cs(XilinxSPIPS *s, int field)
if (old_state != new_state) {
s->cs_lines_state[i] = new_state;
s->rx_discard = ARRAY_FIELD_EX32(s->regs, CMND, RX_DISCARD);
- DB_PRINT_L(1, "%sselecting slave %d\n", new_state ? "" : "de", i);
+ DB_PRINT_L(1, "%sselecting peripheral %d\n",
+ new_state ? "" : "de", i);
}
qemu_set_irq(s->cs_lines[i], !new_state);
}
@@ -1154,7 +1155,7 @@ static void lqspi_load_cache(void *opaque, hwaddr addr)
int i;
int flash_addr = ((addr & ~(LQSPI_CACHE_SIZE - 1))
/ num_effective_busses(s));
- int slave = flash_addr >> LQSPI_ADDRESS_BITS;
+ int peripheral = flash_addr >> LQSPI_ADDRESS_BITS;
int cache_entry = 0;
uint32_t u_page_save = s->regs[R_LQSPI_STS] & ~LQSPI_CFG_U_PAGE;
@@ -1162,7 +1163,7 @@ static void lqspi_load_cache(void *opaque, hwaddr addr)
addr > q->lqspi_cached_addr + LQSPI_CACHE_SIZE - 4) {
xilinx_qspips_invalidate_mmio_ptr(q);
s->regs[R_LQSPI_STS] &= ~LQSPI_CFG_U_PAGE;
- s->regs[R_LQSPI_STS] |= slave ? LQSPI_CFG_U_PAGE : 0;
+ s->regs[R_LQSPI_STS] |= peripheral ? LQSPI_CFG_U_PAGE : 0;
DB_PRINT_L(0, "config reg status: %08x\n", s->regs[R_LQSPI_CFG]);
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-27 21:53:03 +0000