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Diffstat (limited to 'hw/sparc/sun4m.c')
-rw-r--r--hw/sparc/sun4m.c64
1 files changed, 32 insertions, 32 deletions
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 249f7ba7ea..ee52b5cbbc 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -316,10 +316,10 @@ static void *iommu_init(hwaddr addr, uint32_t version, qemu_irq irq)
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, TYPE_SUN4M_IOMMU);
+ dev = qdev_new(TYPE_SUN4M_IOMMU);
qdev_prop_set_uint32(dev, "version", version);
- qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, irq);
sysbus_mmio_map(s, 0, addr);
@@ -336,8 +336,8 @@ static void *sparc32_dma_init(hwaddr dma_base,
SysBusESPState *esp;
SysBusPCNetState *lance;
- dma = qdev_create(NULL, TYPE_SPARC32_DMA);
- qdev_init_nofail(dma);
+ dma = qdev_new(TYPE_SPARC32_DMA);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, dma_base);
espdma = SPARC32_ESPDMA_DEVICE(object_resolve_path_component(
@@ -367,10 +367,10 @@ static DeviceState *slavio_intctl_init(hwaddr addr,
SysBusDevice *s;
unsigned int i, j;
- dev = qdev_create(NULL, "slavio_intctl");
- qdev_init_nofail(dev);
+ dev = qdev_new("slavio_intctl");
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
for (i = 0; i < MAX_CPUS; i++) {
for (j = 0; j < MAX_PILS; j++) {
@@ -395,10 +395,10 @@ static void slavio_timer_init_all(hwaddr addr, qemu_irq master_irq,
SysBusDevice *s;
unsigned int i;
- dev = qdev_create(NULL, "slavio_timer");
+ dev = qdev_new("slavio_timer");
qdev_prop_set_uint32(dev, "num_cpus", num_cpus);
- qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, master_irq);
sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET);
@@ -433,9 +433,9 @@ static void slavio_misc_init(hwaddr base,
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, "slavio_misc");
- qdev_init_nofail(dev);
+ dev = qdev_new("slavio_misc");
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
if (base) {
/* 8 bit registers */
/* Slavio control */
@@ -470,10 +470,10 @@ static void ecc_init(hwaddr base, qemu_irq irq, uint32_t version)
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, "eccmemctl");
+ dev = qdev_new("eccmemctl");
qdev_prop_set_uint32(dev, "version", version);
- qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, irq);
sysbus_mmio_map(s, 0, base);
if (version == 0) { // SS-600MP only
@@ -486,9 +486,9 @@ static void apc_init(hwaddr power_base, qemu_irq cpu_halt)
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, "apc");
- qdev_init_nofail(dev);
+ dev = qdev_new("apc");
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
/* Power management (APC) XXX: not a Slavio device */
sysbus_mmio_map(s, 0, power_base);
sysbus_connect_irq(s, 0, cpu_halt);
@@ -500,13 +500,13 @@ static void tcx_init(hwaddr addr, qemu_irq irq, int vram_size, int width,
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, "SUNW,tcx");
+ dev = qdev_new("SUNW,tcx");
qdev_prop_set_uint32(dev, "vram_size", vram_size);
qdev_prop_set_uint16(dev, "width", width);
qdev_prop_set_uint16(dev, "height", height);
qdev_prop_set_uint16(dev, "depth", depth);
- qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
/* 10/ROM : FCode ROM */
sysbus_mmio_map(s, 0, addr);
@@ -552,13 +552,13 @@ static void cg3_init(hwaddr addr, qemu_irq irq, int vram_size, int width,
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, "cgthree");
+ dev = qdev_new("cgthree");
qdev_prop_set_uint32(dev, "vram-size", vram_size);
qdev_prop_set_uint16(dev, "width", width);
qdev_prop_set_uint16(dev, "height", height);
qdev_prop_set_uint16(dev, "depth", depth);
- qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
/* FCode ROM */
sysbus_mmio_map(s, 0, addr);
@@ -581,9 +581,9 @@ static void idreg_init(hwaddr addr)
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, TYPE_MACIO_ID_REGISTER);
- qdev_init_nofail(dev);
+ dev = qdev_new(TYPE_MACIO_ID_REGISTER);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, addr);
address_space_write_rom(&address_space_memory, addr,
@@ -647,9 +647,9 @@ static void afx_init(hwaddr addr)
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, TYPE_TCX_AFX);
- qdev_init_nofail(dev);
+ dev = qdev_new(TYPE_TCX_AFX);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, addr);
}
@@ -708,9 +708,9 @@ static void prom_init(hwaddr addr, const char *bios_name)
char *filename;
int ret;
- dev = qdev_create(NULL, TYPE_OPENPROM);
- qdev_init_nofail(dev);
+ dev = qdev_new(TYPE_OPENPROM);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, addr);
@@ -877,9 +877,9 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS);
/* Create and map RAM frontend */
- dev = qdev_create(NULL, "memory");
+ dev = qdev_new("memory");
object_property_set_link(OBJECT(dev), ram_memdev, "memdev", &error_fatal);
- qdev_init_nofail(dev);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0);
/* models without ECC don't trap when missing ram is accessed */
@@ -982,7 +982,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
/* Slavio TTYA (base+4, Linux ttyS0) is the first QEMU serial device
Slavio TTYB (base+0, Linux ttyS1) is the second QEMU serial device */
- dev = qdev_create(NULL, TYPE_ESCC);
+ dev = qdev_new(TYPE_ESCC);
qdev_prop_set_uint32(dev, "disabled", !machine->enable_graphics);
qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK);
qdev_prop_set_uint32(dev, "it_shift", 1);
@@ -990,13 +990,13 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
qdev_prop_set_chr(dev, "chrA", NULL);
qdev_prop_set_uint32(dev, "chnBtype", escc_mouse);
qdev_prop_set_uint32(dev, "chnAtype", escc_kbd);
- qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, slavio_irq[14]);
sysbus_connect_irq(s, 1, slavio_irq[14]);
sysbus_mmio_map(s, 0, hwdef->ms_kb_base);
- dev = qdev_create(NULL, TYPE_ESCC);
+ dev = qdev_new(TYPE_ESCC);
qdev_prop_set_uint32(dev, "disabled", 0);
qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK);
qdev_prop_set_uint32(dev, "it_shift", 1);
@@ -1004,9 +1004,9 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
qdev_prop_set_chr(dev, "chrA", serial_hd(0));
qdev_prop_set_uint32(dev, "chnBtype", escc_serial);
qdev_prop_set_uint32(dev, "chnAtype", escc_serial);
- qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, slavio_irq[15]);
sysbus_connect_irq(s, 1, slavio_irq[15]);
sysbus_mmio_map(s, 0, hwdef->serial_base);
@@ -1062,14 +1062,14 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
ecc_init(hwdef->ecc_base, slavio_irq[28],
hwdef->ecc_version);
- dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
+ dev = qdev_new(TYPE_FW_CFG_MEM);
fw_cfg = FW_CFG(dev);
qdev_prop_set_uint32(dev, "data_width", 1);
qdev_prop_set_bit(dev, "dma_enabled", false);
object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
OBJECT(fw_cfg));
- qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, CFG_ADDR);
sysbus_mmio_map(s, 1, CFG_ADDR + 2);
generated by cgit v1.2.3 (git 2.26.2) at 2025-02-22 18:28:26 +0000