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-rw-r--r--hw/sd/allwinner-sdhost.c14
-rw-r--r--hw/sd/sdhci.c35
2 files changed, 30 insertions, 19 deletions
diff --git a/hw/sd/allwinner-sdhost.c b/hw/sd/allwinner-sdhost.c
index 9166d6638d..de5bc49e68 100644
--- a/hw/sd/allwinner-sdhost.c
+++ b/hw/sd/allwinner-sdhost.c
@@ -311,7 +311,8 @@ static uint32_t allwinner_sdhost_process_desc(AwSdHostState *s,
uint8_t buf[1024];
/* Read descriptor */
- dma_memory_read(&s->dma_as, desc_addr, desc, sizeof(*desc));
+ dma_memory_read(&s->dma_as, desc_addr, desc, sizeof(*desc),
+ MEMTXATTRS_UNSPECIFIED);
if (desc->size == 0) {
desc->size = klass->max_desc_size;
} else if (desc->size > klass->max_desc_size) {
@@ -337,23 +338,24 @@ static uint32_t allwinner_sdhost_process_desc(AwSdHostState *s,
/* Write to SD bus */
if (is_write) {
dma_memory_read(&s->dma_as,
- (desc->addr & DESC_SIZE_MASK) + num_done,
- buf, buf_bytes);
+ (desc->addr & DESC_SIZE_MASK) + num_done, buf,
+ buf_bytes, MEMTXATTRS_UNSPECIFIED);
sdbus_write_data(&s->sdbus, buf, buf_bytes);
/* Read from SD bus */
} else {
sdbus_read_data(&s->sdbus, buf, buf_bytes);
dma_memory_write(&s->dma_as,
- (desc->addr & DESC_SIZE_MASK) + num_done,
- buf, buf_bytes);
+ (desc->addr & DESC_SIZE_MASK) + num_done, buf,
+ buf_bytes, MEMTXATTRS_UNSPECIFIED);
}
num_done += buf_bytes;
}
/* Clear hold flag and flush descriptor */
desc->status &= ~DESC_STATUS_HOLD;
- dma_memory_write(&s->dma_as, desc_addr, desc, sizeof(*desc));
+ dma_memory_write(&s->dma_as, desc_addr, desc, sizeof(*desc),
+ MEMTXATTRS_UNSPECIFIED);
return num_done;
}
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index c9dc065cc5..e0bbc90344 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -616,8 +616,8 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
s->blkcnt--;
}
}
- dma_memory_write(s->dma_as, s->sdmasysad,
- &s->fifo_buffer[begin], s->data_count - begin);
+ dma_memory_write(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin],
+ s->data_count - begin, MEMTXATTRS_UNSPECIFIED);
s->sdmasysad += s->data_count - begin;
if (s->data_count == block_size) {
s->data_count = 0;
@@ -637,8 +637,8 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
s->data_count = block_size;
boundary_count -= block_size - begin;
}
- dma_memory_read(s->dma_as, s->sdmasysad,
- &s->fifo_buffer[begin], s->data_count - begin);
+ dma_memory_read(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin],
+ s->data_count - begin, MEMTXATTRS_UNSPECIFIED);
s->sdmasysad += s->data_count - begin;
if (s->data_count == block_size) {
sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size);
@@ -670,9 +670,11 @@ static void sdhci_sdma_transfer_single_block(SDHCIState *s)
if (s->trnmod & SDHC_TRNS_READ) {
sdbus_read_data(&s->sdbus, s->fifo_buffer, datacnt);
- dma_memory_write(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt);
+ dma_memory_write(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt,
+ MEMTXATTRS_UNSPECIFIED);
} else {
- dma_memory_read(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt);
+ dma_memory_read(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt,
+ MEMTXATTRS_UNSPECIFIED);
sdbus_write_data(&s->sdbus, s->fifo_buffer, datacnt);
}
s->blkcnt--;
@@ -694,7 +696,8 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
hwaddr entry_addr = (hwaddr)s->admasysaddr;
switch (SDHC_DMA_TYPE(s->hostctl1)) {
case SDHC_CTRL_ADMA2_32:
- dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2));
+ dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2),
+ MEMTXATTRS_UNSPECIFIED);
adma2 = le64_to_cpu(adma2);
/* The spec does not specify endianness of descriptor table.
* We currently assume that it is LE.
@@ -705,7 +708,8 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
dscr->incr = 8;
break;
case SDHC_CTRL_ADMA1_32:
- dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1));
+ dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1),
+ MEMTXATTRS_UNSPECIFIED);
adma1 = le32_to_cpu(adma1);
dscr->addr = (hwaddr)(adma1 & 0xFFFFF000);
dscr->attr = (uint8_t)extract32(adma1, 0, 7);
@@ -717,10 +721,13 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
}
break;
case SDHC_CTRL_ADMA2_64:
- dma_memory_read(s->dma_as, entry_addr, &dscr->attr, 1);
- dma_memory_read(s->dma_as, entry_addr + 2, &dscr->length, 2);
+ dma_memory_read(s->dma_as, entry_addr, &dscr->attr, 1,
+ MEMTXATTRS_UNSPECIFIED);
+ dma_memory_read(s->dma_as, entry_addr + 2, &dscr->length, 2,
+ MEMTXATTRS_UNSPECIFIED);
dscr->length = le16_to_cpu(dscr->length);
- dma_memory_read(s->dma_as, entry_addr + 4, &dscr->addr, 8);
+ dma_memory_read(s->dma_as, entry_addr + 4, &dscr->addr, 8,
+ MEMTXATTRS_UNSPECIFIED);
dscr->addr = le64_to_cpu(dscr->addr);
dscr->attr &= (uint8_t) ~0xC0;
dscr->incr = 12;
@@ -785,7 +792,8 @@ static void sdhci_do_adma(SDHCIState *s)
}
dma_memory_write(s->dma_as, dscr.addr,
&s->fifo_buffer[begin],
- s->data_count - begin);
+ s->data_count - begin,
+ MEMTXATTRS_UNSPECIFIED);
dscr.addr += s->data_count - begin;
if (s->data_count == block_size) {
s->data_count = 0;
@@ -810,7 +818,8 @@ static void sdhci_do_adma(SDHCIState *s)
}
dma_memory_read(s->dma_as, dscr.addr,
&s->fifo_buffer[begin],
- s->data_count - begin);
+ s->data_count - begin,
+ MEMTXATTRS_UNSPECIFIED);
dscr.addr += s->data_count - begin;
if (s->data_count == block_size) {
sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size);