diff options
Diffstat (limited to 'hw/riscv')
-rw-r--r-- | hw/riscv/opentitan.c | 7 | ||||
-rw-r--r-- | hw/riscv/sifive_e.c | 5 | ||||
-rw-r--r-- | hw/riscv/sifive_u.c | 4 |
3 files changed, 4 insertions, 12 deletions
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 7003b1f62d..a8f0039e51 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -106,7 +106,6 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) MachineState *ms = MACHINE(qdev_get_machine()); LowRISCIbexSoCState *s = RISCV_IBEX_SOC(dev_soc); MemoryRegion *sys_mem = get_system_memory(); - Error *err = NULL; object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type, &error_abort); @@ -127,16 +126,14 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) &s->flash_mem); /* PLIC */ - if (!sysbus_realize(SYS_BUS_DEVICE(&s->plic), &err)) { - error_propagate(errp, err); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->plic), errp)) { return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_PLIC].base); /* UART */ qdev_prop_set_chr(DEVICE(&(s->uart)), "chardev", serial_hd(0)); - if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), &err)) { - error_propagate(errp, err); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), errp)) { return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart), 0, memmap[IBEX_UART].base); diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index f2df06cc43..7bb97b463d 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -185,8 +185,6 @@ static void sifive_e_soc_realize(DeviceState *dev, Error **errp) { MachineState *ms = MACHINE(qdev_get_machine()); const struct MemmapEntry *memmap = sifive_e_memmap; - Error *err = NULL; - SiFiveESoCState *s = RISCV_E_SOC(dev); MemoryRegion *sys_mem = get_system_memory(); @@ -221,8 +219,7 @@ static void sifive_e_soc_realize(DeviceState *dev, Error **errp) /* GPIO */ - if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), &err)) { - error_propagate(errp, err); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { return; } diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index e70253d58f..7851326988 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -608,7 +608,6 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) char *plic_hart_config; size_t plic_hart_config_len; int i; - Error *err = NULL; NICInfo *nd = &nd_table[0]; sysbus_realize(SYS_BUS_DEVICE(&s->e_cpus), &error_abort); @@ -710,8 +709,7 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) } object_property_set_int(OBJECT(&s->gem), "revision", GEM_REVISION, &error_abort); - if (!sysbus_realize(SYS_BUS_DEVICE(&s->gem), &err)) { - error_propagate(errp, err); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->gem), errp)) { return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem), 0, memmap[SIFIVE_U_GEM].base); |