diff options
Diffstat (limited to 'hw/ppc/spapr.c')
| -rw-r--r-- | hw/ppc/spapr.c | 29 |
1 files changed, 11 insertions, 18 deletions
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index fd5bfd11a8..c18eab0a23 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -96,7 +96,6 @@ * * We load our kernel at 4M, leaving space for SLOF initial image */ -#define FDT_MAX_SIZE 0x100000 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */ #define FW_MAX_SIZE 0x400000 #define FW_FILE_NAME "slof.bin" @@ -1580,9 +1579,7 @@ void spapr_setup_hpt(SpaprMachineState *spapr) { int hpt_shift; - if ((spapr->resize_hpt == SPAPR_RESIZE_HPT_DISABLED) - || (spapr->cas_reboot - && !spapr_ovec_test(spapr->ov5_cas, OV5_HPT_RESIZE))) { + if (spapr->resize_hpt == SPAPR_RESIZE_HPT_DISABLED) { hpt_shift = spapr_hpt_shift_for_ramsize(MACHINE(spapr)->maxram_size); } else { uint64_t current_ram_size; @@ -1646,16 +1643,10 @@ static void spapr_machine_reset(MachineState *machine) qemu_devices_reset(); - /* - * If this reset wasn't generated by CAS, we should reset our - * negotiated options and start from scratch - */ - if (!spapr->cas_reboot) { - spapr_ovec_cleanup(spapr->ov5_cas); - spapr->ov5_cas = spapr_ovec_new(); + spapr_ovec_cleanup(spapr->ov5_cas); + spapr->ov5_cas = spapr_ovec_new(); - ppc_set_compat_all(spapr->max_compat_pvr, &error_fatal); - } + ppc_set_compat_all(spapr->max_compat_pvr, &error_fatal); /* * This is fixing some of the default configuration of the XIVE @@ -1708,8 +1699,6 @@ static void spapr_machine_reset(MachineState *machine) spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, 0, fdt_addr, 0); first_ppc_cpu->env.gpr[5] = 0; - spapr->cas_reboot = false; - spapr->fwnmi_system_reset_addr = -1; spapr->fwnmi_machine_check_addr = -1; spapr->fwnmi_machine_check_interlock = -1; @@ -2837,6 +2826,7 @@ static void spapr_machine_init(MachineState *machine) if ((!kvm_enabled() || kvmppc_has_cap_mmu_radix()) && ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, 0, spapr->max_compat_pvr)) { + spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_300); /* KVM and TCG always allow GTSE with radix... */ spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_GTSE); } @@ -3385,13 +3375,13 @@ static void spapr_machine_finalizefn(Object *obj) void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg) { SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; cpu_synchronize_state(cs); /* If FWNMI is inactive, addr will be -1, which will deliver to 0x100 */ if (spapr->fwnmi_system_reset_addr != -1) { uint64_t rtas_addr, addr; - PowerPCCPU *cpu = POWERPC_CPU(cs); - CPUPPCState *env = &cpu->env; /* get rtas addr from fdt */ rtas_addr = spapr_get_rtas_addr(); @@ -3405,7 +3395,10 @@ void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg) stq_be_phys(&address_space_memory, addr + sizeof(uint64_t), 0); env->gpr[3] = addr; } - ppc_cpu_do_system_reset(cs, spapr->fwnmi_system_reset_addr); + ppc_cpu_do_system_reset(cs); + if (spapr->fwnmi_system_reset_addr != -1) { + env->nip = spapr->fwnmi_system_reset_addr; + } } static void spapr_nmi(NMIState *n, int cpu_index, Error **errp) |