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Diffstat (limited to 'hw/ppc/e500plat.c')
-rw-r--r--hw/ppc/e500plat.c64
1 files changed, 39 insertions, 25 deletions
diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c
index 81d03e1038..f69aadb666 100644
--- a/hw/ppc/e500plat.c
+++ b/hw/ppc/e500plat.c
@@ -21,7 +21,7 @@
#include "hw/ppc/openpic.h"
#include "kvm_ppc.h"
-static void e500plat_fixup_devtree(PPCE500Params *params, void *fdt)
+static void e500plat_fixup_devtree(void *fdt)
{
const char model[] = "QEMU ppce500";
const char compatible[] = "fsl,qemu-e500";
@@ -33,40 +33,54 @@ static void e500plat_fixup_devtree(PPCE500Params *params, void *fdt)
static void e500plat_init(MachineState *machine)
{
- PPCE500Params params = {
- .pci_first_slot = 0x1,
- .pci_nr_slots = PCI_SLOT_MAX - 1,
- .fixup_devtree = e500plat_fixup_devtree,
- .mpic_version = OPENPIC_MODEL_FSL_MPIC_42,
- .has_mpc8xxx_gpio = true,
- .has_platform_bus = true,
- .platform_bus_base = 0xf00000000ULL,
- .platform_bus_size = (128ULL * 1024 * 1024),
- .platform_bus_first_irq = 5,
- .platform_bus_num_irqs = 10,
- .ccsrbar_base = 0xFE0000000ULL,
- .pci_pio_base = 0xFE1000000ULL,
- .pci_mmio_base = 0xC00000000ULL,
- .pci_mmio_bus_base = 0xE0000000ULL,
- .spin_base = 0xFEF000000ULL,
- };
-
+ PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(machine);
/* Older KVM versions don't support EPR which breaks guests when we announce
MPIC variants that support EPR. Revert to an older one for those */
if (kvm_enabled() && !kvmppc_has_cap_epr()) {
- params.mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
+ pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
}
- ppce500_init(machine, &params);
+ ppce500_init(machine);
}
-static void e500plat_machine_init(MachineClass *mc)
+#define TYPE_E500PLAT_MACHINE MACHINE_TYPE_NAME("ppce500")
+
+static void e500plat_machine_class_init(ObjectClass *oc, void *data)
{
+ PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc);
+ MachineClass *mc = MACHINE_CLASS(oc);
+
+ pmc->pci_first_slot = 0x1;
+ pmc->pci_nr_slots = PCI_SLOT_MAX - 1;
+ pmc->fixup_devtree = e500plat_fixup_devtree;
+ pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_42;
+ pmc->has_mpc8xxx_gpio = true;
+ pmc->has_platform_bus = true;
+ pmc->platform_bus_base = 0xf00000000ULL;
+ pmc->platform_bus_size = (128ULL * 1024 * 1024);
+ pmc->platform_bus_first_irq = 5;
+ pmc->platform_bus_num_irqs = 10;
+ pmc->ccsrbar_base = 0xFE0000000ULL;
+ pmc->pci_pio_base = 0xFE1000000ULL;
+ pmc->pci_mmio_base = 0xC00000000ULL;
+ pmc->pci_mmio_bus_base = 0xE0000000ULL;
+ pmc->spin_base = 0xFEF000000ULL;
+
mc->desc = "generic paravirt e500 platform";
mc->init = e500plat_init;
mc->max_cpus = 32;
- machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ETSEC_COMMON);
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
-}
+ machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ETSEC_COMMON);
+ }
+
+static const TypeInfo e500plat_info = {
+ .name = TYPE_E500PLAT_MACHINE,
+ .parent = TYPE_PPCE500_MACHINE,
+ .class_init = e500plat_machine_class_init,
+};
-DEFINE_MACHINE("ppce500", e500plat_machine_init)
+static void e500plat_register_types(void)
+{
+ type_register_static(&e500plat_info);
+}
+type_init(e500plat_register_types)