diff options
Diffstat (limited to 'hw/pci.c')
| -rw-r--r-- | hw/pci.c | 42 |
1 files changed, 21 insertions, 21 deletions
@@ -2,7 +2,7 @@ * QEMU PCI bus manager * * Copyright (c) 2004 Fabrice Bellard - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights @@ -96,16 +96,16 @@ int pci_device_load(PCIDevice *s, QEMUFile *f) } /* -1 for devfn means auto assign */ -PCIDevice *pci_register_device(PCIBus *bus, const char *name, +PCIDevice *pci_register_device(PCIBus *bus, const char *name, int instance_size, int devfn, - PCIConfigReadFunc *config_read, + PCIConfigReadFunc *config_read, PCIConfigWriteFunc *config_write) { PCIDevice *pci_dev; if (pci_irq_index >= PCI_DEVICES_MAX) return NULL; - + if (devfn < 0) { for(devfn = bus->devfn_min ; devfn < 256; devfn += 8) { if (!bus->devices[devfn]) @@ -134,8 +134,8 @@ PCIDevice *pci_register_device(PCIBus *bus, const char *name, return pci_dev; } -void pci_register_io_region(PCIDevice *pci_dev, int region_num, - uint32_t size, int type, +void pci_register_io_region(PCIDevice *pci_dev, int region_num, + uint32_t size, int type, PCIMapIORegionFunc *map_func) { PCIIORegion *r; @@ -166,7 +166,7 @@ static void pci_update_mappings(PCIDevice *d) PCIIORegion *r; int cmd, i; uint32_t last_addr, new_addr, config_ofs; - + cmd = le16_to_cpu(*(uint16_t *)(d->config + PCI_COMMAND)); for(i = 0; i < PCI_NUM_REGIONS; i++) { r = &d->io_regions[i]; @@ -178,7 +178,7 @@ static void pci_update_mappings(PCIDevice *d) if (r->size != 0) { if (r->type & PCI_ADDRESS_SPACE_IO) { if (cmd & PCI_COMMAND_IO) { - new_addr = le32_to_cpu(*(uint32_t *)(d->config + + new_addr = le32_to_cpu(*(uint32_t *)(d->config + config_ofs)); new_addr = new_addr & ~(r->size - 1); last_addr = new_addr + r->size - 1; @@ -192,7 +192,7 @@ static void pci_update_mappings(PCIDevice *d) } } else { if (cmd & PCI_COMMAND_MEMORY) { - new_addr = le32_to_cpu(*(uint32_t *)(d->config + + new_addr = le32_to_cpu(*(uint32_t *)(d->config + config_ofs)); /* the ROM slot has a specific enable bit */ if (i == PCI_ROM_SLOT && !(new_addr & 1)) @@ -227,7 +227,7 @@ static void pci_update_mappings(PCIDevice *d) } } else { cpu_register_physical_memory(pci_to_cpu_addr(r->addr), - r->size, + r->size, IO_MEM_UNASSIGNED); } } @@ -240,7 +240,7 @@ static void pci_update_mappings(PCIDevice *d) } } -uint32_t pci_default_read_config(PCIDevice *d, +uint32_t pci_default_read_config(PCIDevice *d, uint32_t address, int len) { uint32_t val; @@ -266,13 +266,13 @@ uint32_t pci_default_read_config(PCIDevice *d, return val; } -void pci_default_write_config(PCIDevice *d, +void pci_default_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len) { int can_write, i; uint32_t end, addr; - if (len == 4 && ((address >= 0x10 && address < 0x10 + 4 * 6) || + if (len == 4 && ((address >= 0x10 && address < 0x10 + 4 * 6) || (address >= 0x30 && address < 0x34))) { PCIIORegion *r; int reg; @@ -367,7 +367,7 @@ void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len) PCIBus *s = opaque; PCIDevice *pci_dev; int config_addr, bus_num; - + #if defined(DEBUG_PCI) && 0 printf("pci_data_write: addr=%08x val=%08x len=%d\n", addr, val, len); @@ -440,7 +440,7 @@ static void pci_set_irq(void *opaque, int irq_num, int level) PCIDevice *pci_dev = (PCIDevice *)opaque; PCIBus *bus; int change; - + change = level - pci_dev->irq_state[irq_num]; if (!change) return; @@ -465,7 +465,7 @@ typedef struct { const char *desc; } pci_class_desc; -static pci_class_desc pci_class_descriptions[] = +static pci_class_desc pci_class_descriptions[] = { { 0x0100, "SCSI controller"}, { 0x0101, "IDE controller"}, @@ -538,10 +538,10 @@ static void pci_info_device(PCIDevice *d) if (r->size != 0) { term_printf(" BAR%d: ", i); if (r->type & PCI_ADDRESS_SPACE_IO) { - term_printf("I/O at 0x%04x [0x%04x].\n", + term_printf("I/O at 0x%04x [0x%04x].\n", r->addr, r->addr + r->size - 1); } else { - term_printf("32 bit memory at 0x%08x [0x%08x].\n", + term_printf("32 bit memory at 0x%08x [0x%08x].\n", r->addr, r->addr + r->size - 1); } } @@ -556,7 +556,7 @@ void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d)) PCIBus *bus = first_bus; PCIDevice *d; int devfn; - + while (bus && bus->bus_num != bus_num) bus = bus->next; if (bus) { @@ -603,7 +603,7 @@ typedef struct { PCIBus *bus; } PCIBridge; -void pci_bridge_write_config(PCIDevice *d, +void pci_bridge_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len) { PCIBridge *s = (PCIBridge *)d; @@ -624,7 +624,7 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id, pci_map_irq_fn map_irq, const char *name) { PCIBridge *s; - s = (PCIBridge *)pci_register_device(bus, name, sizeof(PCIBridge), + s = (PCIBridge *)pci_register_device(bus, name, sizeof(PCIBridge), devfn, NULL, pci_bridge_write_config); s->dev.config[0x00] = id >> 16; s->dev.config[0x01] = id >> 24; |