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-rw-r--r--hw/pci-host/bonito.c14
-rw-r--r--hw/pci-host/grackle.c10
-rw-r--r--hw/pci-host/i440fx.c10
-rw-r--r--hw/pci-host/pnv_phb3.c5
-rw-r--r--hw/pci-host/pnv_phb4.c5
-rw-r--r--hw/pci-host/ppce500.c13
-rw-r--r--hw/pci-host/prep.c19
-rw-r--r--hw/pci-host/sabre.c8
-rw-r--r--hw/pci-host/versatile.c14
9 files changed, 56 insertions, 42 deletions
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 1405b3fc70..d10fbd39d3 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -52,6 +52,7 @@
#include "exec/address-spaces.h"
#include "hw/misc/unimp.h"
#include "hw/registerfields.h"
+#include "qom/object.h"
/* #define DEBUG_BONITO */
@@ -200,7 +201,7 @@ FIELD(BONGENCFG, PCIQUEUE, 12, 1)
typedef struct BonitoState BonitoState;
-typedef struct PCIBonitoState {
+struct PCIBonitoState {
PCIDevice dev;
BonitoState *pcihost;
@@ -228,7 +229,8 @@ typedef struct PCIBonitoState {
MemoryRegion bonito_pciio;
MemoryRegion bonito_localio;
-} PCIBonitoState;
+};
+typedef struct PCIBonitoState PCIBonitoState;
struct BonitoState {
PCIHostState parent_obj;
@@ -238,12 +240,12 @@ struct BonitoState {
};
#define TYPE_BONITO_PCI_HOST_BRIDGE "Bonito-pcihost"
-#define BONITO_PCI_HOST_BRIDGE(obj) \
- OBJECT_CHECK(BonitoState, (obj), TYPE_BONITO_PCI_HOST_BRIDGE)
+DECLARE_INSTANCE_CHECKER(BonitoState, BONITO_PCI_HOST_BRIDGE,
+ TYPE_BONITO_PCI_HOST_BRIDGE)
#define TYPE_PCI_BONITO "Bonito"
-#define PCI_BONITO(obj) \
- OBJECT_CHECK(PCIBonitoState, (obj), TYPE_PCI_BONITO)
+DECLARE_INSTANCE_CHECKER(PCIBonitoState, PCI_BONITO,
+ TYPE_PCI_BONITO)
static void bonito_writel(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index 4b3af0c704..fd7d6dcc06 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -33,11 +33,13 @@
#include "qapi/error.h"
#include "qemu/module.h"
#include "trace.h"
+#include "qom/object.h"
-#define GRACKLE_PCI_HOST_BRIDGE(obj) \
- OBJECT_CHECK(GrackleState, (obj), TYPE_GRACKLE_PCI_HOST_BRIDGE)
+typedef struct GrackleState GrackleState;
+DECLARE_INSTANCE_CHECKER(GrackleState, GRACKLE_PCI_HOST_BRIDGE,
+ TYPE_GRACKLE_PCI_HOST_BRIDGE)
-typedef struct GrackleState {
+struct GrackleState {
PCIHostState parent_obj;
uint32_t ofw_addr;
@@ -46,7 +48,7 @@ typedef struct GrackleState {
MemoryRegion pci_mmio;
MemoryRegion pci_hole;
MemoryRegion pci_io;
-} GrackleState;
+};
/* Don't know if this matches real hardware, but it agrees with OHW. */
static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
index 8ed2417f0c..93c62235ca 100644
--- a/hw/pci-host/i440fx.c
+++ b/hw/pci-host/i440fx.c
@@ -35,22 +35,24 @@
#include "migration/vmstate.h"
#include "qapi/visitor.h"
#include "qemu/error-report.h"
+#include "qom/object.h"
/*
* I440FX chipset data sheet.
* https://wiki.qemu.org/File:29054901.pdf
*/
-#define I440FX_PCI_HOST_BRIDGE(obj) \
- OBJECT_CHECK(I440FXState, (obj), TYPE_I440FX_PCI_HOST_BRIDGE)
+typedef struct I440FXState I440FXState;
+DECLARE_INSTANCE_CHECKER(I440FXState, I440FX_PCI_HOST_BRIDGE,
+ TYPE_I440FX_PCI_HOST_BRIDGE)
-typedef struct I440FXState {
+struct I440FXState {
PCIHostState parent_obj;
Range pci_hole;
uint64_t pci_hole64_size;
bool pci_hole64_fix;
uint32_t short_root_bus;
-} I440FXState;
+};
#define I440FX_PAM 0x59
#define I440FX_PAM_SIZE 7
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index 82132c12ca..a7f9685005 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -18,6 +18,7 @@
#include "hw/ppc/pnv.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
+#include "qom/object.h"
#define phb3_error(phb, fmt, ...) \
qemu_log_mask(LOG_GUEST_ERROR, "phb3[%d:%d]: " fmt "\n", \
@@ -877,8 +878,8 @@ static IOMMUTLBEntry pnv_phb3_translate_iommu(IOMMUMemoryRegion *iommu,
}
#define TYPE_PNV_PHB3_IOMMU_MEMORY_REGION "pnv-phb3-iommu-memory-region"
-#define PNV_PHB3_IOMMU_MEMORY_REGION(obj) \
- OBJECT_CHECK(IOMMUMemoryRegion, (obj), TYPE_PNV_PHB3_IOMMU_MEMORY_REGION)
+DECLARE_INSTANCE_CHECKER(IOMMUMemoryRegion, PNV_PHB3_IOMMU_MEMORY_REGION,
+ TYPE_PNV_PHB3_IOMMU_MEMORY_REGION)
static void pnv_phb3_iommu_memory_region_class_init(ObjectClass *klass,
void *data)
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 75ad766fe0..03daf40a23 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -21,6 +21,7 @@
#include "hw/ppc/pnv_xscom.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
+#include "qom/object.h"
#define phb_error(phb, fmt, ...) \
qemu_log_mask(LOG_GUEST_ERROR, "phb4[%d:%d]: " fmt "\n", \
@@ -1042,8 +1043,8 @@ static IOMMUTLBEntry pnv_phb4_translate_iommu(IOMMUMemoryRegion *iommu,
}
#define TYPE_PNV_PHB4_IOMMU_MEMORY_REGION "pnv-phb4-iommu-memory-region"
-#define PNV_PHB4_IOMMU_MEMORY_REGION(obj) \
- OBJECT_CHECK(IOMMUMemoryRegion, (obj), TYPE_PNV_PHB4_IOMMU_MEMORY_REGION)
+DECLARE_INSTANCE_CHECKER(IOMMUMemoryRegion, PNV_PHB4_IOMMU_MEMORY_REGION,
+ TYPE_PNV_PHB4_IOMMU_MEMORY_REGION)
static void pnv_phb4_iommu_memory_region_class_init(ObjectClass *klass,
void *data)
diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
index 1a62b2f8cc..f376374e24 100644
--- a/hw/pci-host/ppce500.c
+++ b/hw/pci-host/ppce500.c
@@ -24,6 +24,7 @@
#include "qemu/bswap.h"
#include "qemu/module.h"
#include "hw/pci-host/ppce500.h"
+#include "qom/object.h"
#ifdef DEBUG_PCI
#define pci_debug(fmt, ...) fprintf(stderr, fmt, ## __VA_ARGS__)
@@ -91,8 +92,9 @@ struct pci_inbound {
#define TYPE_PPC_E500_PCI_HOST_BRIDGE "e500-pcihost"
-#define PPC_E500_PCI_HOST_BRIDGE(obj) \
- OBJECT_CHECK(PPCE500PCIState, (obj), TYPE_PPC_E500_PCI_HOST_BRIDGE)
+typedef struct PPCE500PCIState PPCE500PCIState;
+DECLARE_INSTANCE_CHECKER(PPCE500PCIState, PPC_E500_PCI_HOST_BRIDGE,
+ TYPE_PPC_E500_PCI_HOST_BRIDGE)
struct PPCE500PCIState {
PCIHostState parent_obj;
@@ -114,8 +116,9 @@ struct PPCE500PCIState {
};
#define TYPE_PPC_E500_PCI_BRIDGE "e500-host-bridge"
-#define PPC_E500_PCI_BRIDGE(obj) \
- OBJECT_CHECK(PPCE500PCIBridgeState, (obj), TYPE_PPC_E500_PCI_BRIDGE)
+typedef struct PPCE500PCIBridgeState PPCE500PCIBridgeState;
+DECLARE_INSTANCE_CHECKER(PPCE500PCIBridgeState, PPC_E500_PCI_BRIDGE,
+ TYPE_PPC_E500_PCI_BRIDGE)
struct PPCE500PCIBridgeState {
/*< private >*/
@@ -125,8 +128,6 @@ struct PPCE500PCIBridgeState {
MemoryRegion bar0;
};
-typedef struct PPCE500PCIBridgeState PPCE500PCIBridgeState;
-typedef struct PPCE500PCIState PPCE500PCIState;
static uint64_t pci_reg_read4(void *opaque, hwaddr addr,
unsigned size)
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 4b93fd2b01..b234fd7c8a 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -38,25 +38,28 @@
#include "hw/or-irq.h"
#include "exec/address-spaces.h"
#include "elf.h"
+#include "qom/object.h"
#define TYPE_RAVEN_PCI_DEVICE "raven"
#define TYPE_RAVEN_PCI_HOST_BRIDGE "raven-pcihost"
-#define RAVEN_PCI_DEVICE(obj) \
- OBJECT_CHECK(RavenPCIState, (obj), TYPE_RAVEN_PCI_DEVICE)
+typedef struct RavenPCIState RavenPCIState;
+DECLARE_INSTANCE_CHECKER(RavenPCIState, RAVEN_PCI_DEVICE,
+ TYPE_RAVEN_PCI_DEVICE)
-typedef struct RavenPCIState {
+struct RavenPCIState {
PCIDevice dev;
uint32_t elf_machine;
char *bios_name;
MemoryRegion bios;
-} RavenPCIState;
+};
-#define RAVEN_PCI_HOST_BRIDGE(obj) \
- OBJECT_CHECK(PREPPCIState, (obj), TYPE_RAVEN_PCI_HOST_BRIDGE)
+typedef struct PRePPCIState PREPPCIState;
+DECLARE_INSTANCE_CHECKER(PREPPCIState, RAVEN_PCI_HOST_BRIDGE,
+ TYPE_RAVEN_PCI_HOST_BRIDGE)
-typedef struct PRePPCIState {
+struct PRePPCIState {
PCIHostState parent_obj;
qemu_or_irq *or_irq;
@@ -75,7 +78,7 @@ typedef struct PRePPCIState {
int contiguous_map;
bool is_legacy_prep;
-} PREPPCIState;
+};
#define BIOS_SIZE (1 * MiB)
diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c
index 0cc68585f8..5ac6283623 100644
--- a/hw/pci-host/sabre.c
+++ b/hw/pci-host/sabre.c
@@ -338,7 +338,7 @@ static void pci_sabre_set_irq(void *opaque, int irq_num, int level)
static void sabre_reset(DeviceState *d)
{
- SabreState *s = SABRE_DEVICE(d);
+ SabreState *s = SABRE(d);
PCIDevice *pci_dev;
unsigned int i;
uint16_t cmd;
@@ -376,7 +376,7 @@ static const MemoryRegionOps pci_config_ops = {
static void sabre_realize(DeviceState *dev, Error **errp)
{
- SabreState *s = SABRE_DEVICE(dev);
+ SabreState *s = SABRE(dev);
PCIHostState *phb = PCI_HOST_BRIDGE(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(s);
PCIDevice *pci_dev;
@@ -421,7 +421,7 @@ static void sabre_realize(DeviceState *dev, Error **errp)
static void sabre_init(Object *obj)
{
- SabreState *s = SABRE_DEVICE(obj);
+ SabreState *s = SABRE(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
unsigned int i;
@@ -502,7 +502,7 @@ static const TypeInfo sabre_pci_info = {
static char *sabre_ofw_unit_address(const SysBusDevice *dev)
{
- SabreState *s = SABRE_DEVICE(dev);
+ SabreState *s = SABRE(dev);
return g_strdup_printf("%x,%x",
(uint32_t)((s->special_base >> 32) & 0xffffffff),
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index 7e4aa467a2..3553277f94 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -18,6 +18,7 @@
#include "hw/qdev-properties.h"
#include "qemu/log.h"
#include "qemu/module.h"
+#include "qom/object.h"
/* Old and buggy versions of QEMU used the wrong mapping from
* PCI IRQs to system interrupt lines. Unfortunately the Linux
@@ -71,7 +72,7 @@ enum {
PCI_VPB_IRQMAP_FORCE_OK,
};
-typedef struct {
+struct PCIVPBState {
PCIHostState parent_obj;
qemu_irq irq[4];
@@ -100,7 +101,8 @@ typedef struct {
uint32_t selfid;
uint32_t flags;
uint8_t irq_mapping;
-} PCIVPBState;
+};
+typedef struct PCIVPBState PCIVPBState;
static void pci_vpb_update_window(PCIVPBState *s, int i)
{
@@ -156,12 +158,12 @@ static const VMStateDescription pci_vpb_vmstate = {
};
#define TYPE_VERSATILE_PCI "versatile_pci"
-#define PCI_VPB(obj) \
- OBJECT_CHECK(PCIVPBState, (obj), TYPE_VERSATILE_PCI)
+DECLARE_INSTANCE_CHECKER(PCIVPBState, PCI_VPB,
+ TYPE_VERSATILE_PCI)
#define TYPE_VERSATILE_PCI_HOST "versatile_pci_host"
-#define PCI_VPB_HOST(obj) \
- OBJECT_CHECK(PCIDevice, (obj), TYPE_VERSATILE_PCI_HOST)
+DECLARE_INSTANCE_CHECKER(PCIDevice, PCI_VPB_HOST,
+ TYPE_VERSATILE_PCI_HOST)
typedef enum {
PCI_IMAP0 = 0x0,
generated by cgit v1.2.3 (git 2.26.2) at 2025-02-20 03:28:00 +0000