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-rw-r--r--hw/pci-host/pnv_phb4.c51
1 files changed, 51 insertions, 0 deletions
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index b98c394713..824e1a73fb 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -1551,6 +1551,12 @@ void pnv_phb4_bus_init(DeviceState *dev, PnvPHB4 *phb)
pnv_phb4_set_irq, pnv_phb4_map_irq, phb,
&phb->pci_mmio, &phb->pci_io,
0, 4, TYPE_PNV_PHB4_ROOT_BUS);
+
+ object_property_set_int(OBJECT(pci->bus), "phb-id", phb->phb_id,
+ &error_abort);
+ object_property_set_int(OBJECT(pci->bus), "chip-id", phb->chip_id,
+ &error_abort);
+
pci_setup_iommu(pci->bus, pnv_phb4_dma_iommu, phb);
pci->bus->flags |= PCI_BUS_EXTENDED_CONFIG_SPACE;
}
@@ -1708,10 +1714,55 @@ static const TypeInfo pnv_phb5_type_info = {
.instance_size = sizeof(PnvPHB4),
};
+static void pnv_phb4_root_bus_get_prop(Object *obj, Visitor *v,
+ const char *name,
+ void *opaque, Error **errp)
+{
+ PnvPHB4RootBus *bus = PNV_PHB4_ROOT_BUS(obj);
+ uint64_t value = 0;
+
+ if (strcmp(name, "phb-id") == 0) {
+ value = bus->phb_id;
+ } else {
+ value = bus->chip_id;
+ }
+
+ visit_type_size(v, name, &value, errp);
+}
+
+static void pnv_phb4_root_bus_set_prop(Object *obj, Visitor *v,
+ const char *name,
+ void *opaque, Error **errp)
+
+{
+ PnvPHB4RootBus *bus = PNV_PHB4_ROOT_BUS(obj);
+ uint64_t value;
+
+ if (!visit_type_size(v, name, &value, errp)) {
+ return;
+ }
+
+ if (strcmp(name, "phb-id") == 0) {
+ bus->phb_id = value;
+ } else {
+ bus->chip_id = value;
+ }
+}
+
static void pnv_phb4_root_bus_class_init(ObjectClass *klass, void *data)
{
BusClass *k = BUS_CLASS(klass);
+ object_class_property_add(klass, "phb-id", "int",
+ pnv_phb4_root_bus_get_prop,
+ pnv_phb4_root_bus_set_prop,
+ NULL, NULL);
+
+ object_class_property_add(klass, "chip-id", "int",
+ pnv_phb4_root_bus_get_prop,
+ pnv_phb4_root_bus_set_prop,
+ NULL, NULL);
+
/*
* PHB4 has only a single root complex. Enforce the limit on the
* parent bus