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-rw-r--r--hw/pci-host/q35.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 24df6b55cb..3a5cff989e 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -244,6 +244,14 @@ static int mch_init(PCIDevice *d)
hwaddr pci_hole64_size;
MCHPCIState *mch = MCH_PCI_DEVICE(d);
+ /* Leave enough space for the biggest MCFG BAR */
+ /* TODO: this matches current bios behaviour, but
+ * it's not a power of two, which means an MTRR
+ * can't cover it exactly.
+ */
+ mch->guest_info->pci_info.w32.begin = MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT +
+ MCH_HOST_BRIDGE_PCIEXBAR_MAX;
+
/* setup pci memory regions */
memory_region_init_alias(&mch->pci_hole, "pci-hole",
mch->pci_address_space,