aboutsummaryrefslogtreecommitdiff
path: root/hw/pci-bridge/ioh3420.c
diff options
context:
space:
mode:
Diffstat (limited to 'hw/pci-bridge/ioh3420.c')
-rw-r--r--hw/pci-bridge/ioh3420.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c
index f4e17ac41a..7cd87fcbb4 100644
--- a/hw/pci-bridge/ioh3420.c
+++ b/hw/pci-bridge/ioh3420.c
@@ -180,6 +180,12 @@ PCIESlot *ioh3420_init(PCIBus *bus, int devfn, bool multifunction,
return PCIE_SLOT(d);
}
+static Property ioh3420_props[] = {
+ DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present,
+ QEMU_PCIE_SLTCAP_PCP_BITNR, true),
+ DEFINE_PROP_END_OF_LIST()
+};
+
static const VMStateDescription vmstate_ioh3420 = {
.name = "ioh-3240-express-root-port",
.version_id = 1,
@@ -210,6 +216,7 @@ static void ioh3420_class_init(ObjectClass *klass, void *data)
dc->desc = "Intel IOH device id 3420 PCIE Root Port";
dc->reset = ioh3420_reset;
dc->vmsd = &vmstate_ioh3420;
+ dc->props = ioh3420_props;
}
static const TypeInfo ioh3420_info = {