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-rw-r--r--hw/openrisc/cputimer.c10
-rw-r--r--hw/openrisc/openrisc_sim.c3
-rw-r--r--hw/openrisc/pic_cpu.c17
3 files changed, 14 insertions, 16 deletions
diff --git a/hw/openrisc/cputimer.c b/hw/openrisc/cputimer.c
index 4144b34be7..988ca20898 100644
--- a/hw/openrisc/cputimer.c
+++ b/hw/openrisc/cputimer.c
@@ -33,9 +33,9 @@ void cpu_openrisc_count_update(OpenRISCCPU *cpu)
uint64_t now, next;
uint32_t wait;
- now = qemu_get_clock_ns(vm_clock);
+ now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
if (!is_counting) {
- qemu_del_timer(cpu->env.timer);
+ timer_del(cpu->env.timer);
last_clk = now;
return;
}
@@ -52,7 +52,7 @@ void cpu_openrisc_count_update(OpenRISCCPU *cpu)
}
next = now + muldiv64(wait, get_ticks_per_sec(), TIMER_FREQ);
- qemu_mod_timer(cpu->env.timer, next);
+ timer_mod(cpu->env.timer, next);
}
void cpu_openrisc_count_start(OpenRISCCPU *cpu)
@@ -72,7 +72,7 @@ static void openrisc_timer_cb(void *opaque)
OpenRISCCPU *cpu = opaque;
if ((cpu->env.ttmr & TTMR_IE) &&
- qemu_timer_expired(cpu->env.timer, qemu_get_clock_ns(vm_clock))) {
+ timer_expired(cpu->env.timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL))) {
CPUState *cs = CPU(cpu);
cpu->env.ttmr |= TTMR_IP;
@@ -97,7 +97,7 @@ static void openrisc_timer_cb(void *opaque)
void cpu_openrisc_clock_init(OpenRISCCPU *cpu)
{
- cpu->env.timer = qemu_new_timer_ns(vm_clock, &openrisc_timer_cb, cpu);
+ cpu->env.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &openrisc_timer_cb, cpu);
cpu->env.ttmr = 0x00000000;
cpu->env.ttcr = 0x00000000;
}
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 2a2d077acf..8e1af8bf2e 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -86,9 +86,8 @@ static void cpu_openrisc_load_kernel(ram_addr_t ram_size,
kernel_filename);
exit(1);
}
+ cpu->env.pc = entry;
}
-
- cpu->env.pc = entry;
}
static void openrisc_sim_init(QEMUMachineInitArgs *args)
diff --git a/hw/openrisc/pic_cpu.c b/hw/openrisc/pic_cpu.c
index ca0b7c11bd..2af1d6013a 100644
--- a/hw/openrisc/pic_cpu.c
+++ b/hw/openrisc/pic_cpu.c
@@ -26,26 +26,25 @@ static void openrisc_pic_cpu_handler(void *opaque, int irq, int level)
{
OpenRISCCPU *cpu = (OpenRISCCPU *)opaque;
CPUState *cs = CPU(cpu);
- int i;
- uint32_t irq_bit = 1 << irq;
+ uint32_t irq_bit;
if (irq > 31 || irq < 0) {
return;
}
+ irq_bit = 1U << irq;
+
if (level) {
cpu->env.picsr |= irq_bit;
} else {
cpu->env.picsr &= ~irq_bit;
}
- for (i = 0; i < 32; i++) {
- if ((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i))) {
- cpu_interrupt(cs, CPU_INTERRUPT_HARD);
- } else {
- cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
- cpu->env.picsr &= ~(1 << i);
- }
+ if (cpu->env.picsr & cpu->env.picmr) {
+ cpu_interrupt(cs, CPU_INTERRUPT_HARD);
+ } else {
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
+ cpu->env.picsr = 0;
}
}