diff options
Diffstat (limited to 'hw/nvram/mac_nvram.c')
| -rw-r--r-- | hw/nvram/mac_nvram.c | 196 |
1 files changed, 196 insertions, 0 deletions
diff --git a/hw/nvram/mac_nvram.c b/hw/nvram/mac_nvram.c new file mode 100644 index 0000000000..5223330838 --- /dev/null +++ b/hw/nvram/mac_nvram.c @@ -0,0 +1,196 @@ +/* + * PowerMac NVRAM emulation + * + * Copyright (c) 2005-2007 Fabrice Bellard + * Copyright (c) 2007 Jocelyn Mayer + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "hw/hw.h" +#include "hw/sparc/firmware_abi.h" +#include "sysemu/sysemu.h" +#include "hw/ppc/mac.h" + +/* debug NVR */ +//#define DEBUG_NVR + +#ifdef DEBUG_NVR +#define NVR_DPRINTF(fmt, ...) \ + do { printf("NVR: " fmt , ## __VA_ARGS__); } while (0) +#else +#define NVR_DPRINTF(fmt, ...) +#endif + +#define DEF_SYSTEM_SIZE 0xc10 + +/* Direct access to NVRAM */ +uint8_t macio_nvram_read(MacIONVRAMState *s, uint32_t addr) +{ + uint32_t ret; + + if (addr < s->size) { + ret = s->data[addr]; + } else { + ret = -1; + } + NVR_DPRINTF("read addr %04" PRIx32 " val %" PRIx8 "\n", addr, ret); + + return ret; +} + +void macio_nvram_write(MacIONVRAMState *s, uint32_t addr, uint8_t val) +{ + NVR_DPRINTF("write addr %04" PRIx32 " val %" PRIx8 "\n", addr, val); + if (addr < s->size) { + s->data[addr] = val; + } +} + +/* macio style NVRAM device */ +static void macio_nvram_writeb(void *opaque, hwaddr addr, + uint64_t value, unsigned size) +{ + MacIONVRAMState *s = opaque; + + addr = (addr >> s->it_shift) & (s->size - 1); + s->data[addr] = value; + NVR_DPRINTF("writeb addr %04" PHYS_PRIx " val %" PRIx64 "\n", addr, value); +} + +static uint64_t macio_nvram_readb(void *opaque, hwaddr addr, + unsigned size) +{ + MacIONVRAMState *s = opaque; + uint32_t value; + + addr = (addr >> s->it_shift) & (s->size - 1); + value = s->data[addr]; + NVR_DPRINTF("readb addr %04x val %x\n", (int)addr, value); + + return value; +} + +static const MemoryRegionOps macio_nvram_ops = { + .read = macio_nvram_readb, + .write = macio_nvram_writeb, + .endianness = DEVICE_BIG_ENDIAN, +}; + +static const VMStateDescription vmstate_macio_nvram = { + .name = "macio_nvram", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .fields = (VMStateField[]) { + VMSTATE_VBUFFER_UINT32(data, MacIONVRAMState, 0, NULL, 0, size), + VMSTATE_END_OF_LIST() + } +}; + + +static void macio_nvram_reset(DeviceState *dev) +{ +} + +static void macio_nvram_realizefn(DeviceState *dev, Error **errp) +{ + SysBusDevice *d = SYS_BUS_DEVICE(dev); + MacIONVRAMState *s = MACIO_NVRAM(dev); + + s->data = g_malloc0(s->size); + + memory_region_init_io(&s->mem, &macio_nvram_ops, s, "macio-nvram", + s->size << s->it_shift); + sysbus_init_mmio(d, &s->mem); +} + +static void macio_nvram_unrealizefn(DeviceState *dev, Error **errp) +{ + MacIONVRAMState *s = MACIO_NVRAM(dev); + + g_free(s->data); +} + +static Property macio_nvram_properties[] = { + DEFINE_PROP_UINT32("size", MacIONVRAMState, size, 0), + DEFINE_PROP_UINT32("it_shift", MacIONVRAMState, it_shift, 0), + DEFINE_PROP_END_OF_LIST() +}; + +static void macio_nvram_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + + dc->realize = macio_nvram_realizefn; + dc->unrealize = macio_nvram_unrealizefn; + dc->reset = macio_nvram_reset; + dc->vmsd = &vmstate_macio_nvram; + dc->props = macio_nvram_properties; +} + +static const TypeInfo macio_nvram_type_info = { + .name = TYPE_MACIO_NVRAM, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(MacIONVRAMState), + .class_init = macio_nvram_class_init, +}; + +static void macio_nvram_register_types(void) +{ + type_register_static(&macio_nvram_type_info); +} + +/* Set up a system OpenBIOS NVRAM partition */ +void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len) +{ + unsigned int i; + uint32_t start = 0, end; + struct OpenBIOS_nvpart_v1 *part_header; + + // OpenBIOS nvram variables + // Variable partition + part_header = (struct OpenBIOS_nvpart_v1 *)nvr->data; + part_header->signature = OPENBIOS_PART_SYSTEM; + pstrcpy(part_header->name, sizeof(part_header->name), "system"); + + end = start + sizeof(struct OpenBIOS_nvpart_v1); + for (i = 0; i < nb_prom_envs; i++) + end = OpenBIOS_set_var(nvr->data, end, prom_envs[i]); + + // End marker + nvr->data[end++] = '\0'; + + end = start + ((end - start + 15) & ~15); + /* XXX: OpenBIOS is not able to grow up a partition. Leave some space for + new variables. */ + if (end < DEF_SYSTEM_SIZE) + end = DEF_SYSTEM_SIZE; + OpenBIOS_finish_partition(part_header, end - start); + + // free partition + start = end; + part_header = (struct OpenBIOS_nvpart_v1 *)&nvr->data[start]; + part_header->signature = OPENBIOS_PART_FREE; + pstrcpy(part_header->name, sizeof(part_header->name), "free"); + + end = len; + OpenBIOS_finish_partition(part_header, end - start); +} + +type_init(macio_nvram_register_types) |