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Diffstat (limited to 'hw/net/xilinx_axienet.c')
-rw-r--r--hw/net/xilinx_axienet.c23
1 files changed, 11 insertions, 12 deletions
diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c
index 2e89f236b4..4e13786e50 100644
--- a/hw/net/xilinx_axienet.c
+++ b/hw/net/xilinx_axienet.c
@@ -35,6 +35,7 @@
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "hw/stream.h"
+#include "qom/object.h"
#define DPHY(x)
@@ -42,16 +43,16 @@
#define TYPE_XILINX_AXI_ENET_DATA_STREAM "xilinx-axienet-data-stream"
#define TYPE_XILINX_AXI_ENET_CONTROL_STREAM "xilinx-axienet-control-stream"
-#define XILINX_AXI_ENET(obj) \
- OBJECT_CHECK(XilinxAXIEnet, (obj), TYPE_XILINX_AXI_ENET)
+typedef struct XilinxAXIEnet XilinxAXIEnet;
+DECLARE_INSTANCE_CHECKER(XilinxAXIEnet, XILINX_AXI_ENET,
+ TYPE_XILINX_AXI_ENET)
-#define XILINX_AXI_ENET_DATA_STREAM(obj) \
- OBJECT_CHECK(XilinxAXIEnetStreamSlave, (obj),\
- TYPE_XILINX_AXI_ENET_DATA_STREAM)
+typedef struct XilinxAXIEnetStreamSlave XilinxAXIEnetStreamSlave;
+DECLARE_INSTANCE_CHECKER(XilinxAXIEnetStreamSlave, XILINX_AXI_ENET_DATA_STREAM,
+ TYPE_XILINX_AXI_ENET_DATA_STREAM)
-#define XILINX_AXI_ENET_CONTROL_STREAM(obj) \
- OBJECT_CHECK(XilinxAXIEnetStreamSlave, (obj),\
- TYPE_XILINX_AXI_ENET_CONTROL_STREAM)
+DECLARE_INSTANCE_CHECKER(XilinxAXIEnetStreamSlave, XILINX_AXI_ENET_CONTROL_STREAM,
+ TYPE_XILINX_AXI_ENET_CONTROL_STREAM)
/* Advertisement control register. */
#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
@@ -310,8 +311,6 @@ struct TEMAC {
void *parent;
};
-typedef struct XilinxAXIEnetStreamSlave XilinxAXIEnetStreamSlave;
-typedef struct XilinxAXIEnet XilinxAXIEnet;
struct XilinxAXIEnetStreamSlave {
Object parent;
@@ -1046,7 +1045,7 @@ static const TypeInfo xilinx_enet_info = {
static const TypeInfo xilinx_enet_data_stream_info = {
.name = TYPE_XILINX_AXI_ENET_DATA_STREAM,
.parent = TYPE_OBJECT,
- .instance_size = sizeof(struct XilinxAXIEnetStreamSlave),
+ .instance_size = sizeof(XilinxAXIEnetStreamSlave),
.class_init = xilinx_enet_data_stream_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_STREAM_SLAVE },
@@ -1057,7 +1056,7 @@ static const TypeInfo xilinx_enet_data_stream_info = {
static const TypeInfo xilinx_enet_control_stream_info = {
.name = TYPE_XILINX_AXI_ENET_CONTROL_STREAM,
.parent = TYPE_OBJECT,
- .instance_size = sizeof(struct XilinxAXIEnetStreamSlave),
+ .instance_size = sizeof(XilinxAXIEnetStreamSlave),
.class_init = xilinx_enet_control_stream_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_STREAM_SLAVE },