diff options
Diffstat (limited to 'hw/misc')
| -rw-r--r-- | hw/misc/auxbus.c | 28 |
1 files changed, 11 insertions, 17 deletions
diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 9cc9cf3be3..d96219aef8 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -106,7 +106,6 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, AUXReply ret = AUX_NACK; I2CBus *i2c_bus = aux_get_i2c_bus(bus); size_t i; - bool is_write = false; DPRINTF("request at address 0x%" PRIX32 ", command %u, len %u\n", address, cmd, len); @@ -117,11 +116,10 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, */ case WRITE_AUX: case READ_AUX: - is_write = cmd == READ_AUX ? false : true; for (i = 0; i < len; i++) { if (!address_space_rw(&bus->aux_addr_space, address++, MEMTXATTRS_UNSPECIFIED, data++, 1, - is_write)) { + cmd == WRITE_AUX)) { ret = AUX_I2C_ACK; } else { ret = AUX_NACK; @@ -133,19 +131,18 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, * Classic I2C transactions.. */ case READ_I2C: - is_write = cmd == READ_I2C ? false : true; if (i2c_bus_busy(i2c_bus)) { i2c_end_transfer(i2c_bus); } - if (i2c_start_transfer(i2c_bus, address, !is_write)) { + if (i2c_start_transfer(i2c_bus, address, true)) { ret = AUX_I2C_NACK; break; } ret = AUX_I2C_ACK; while (len > 0) { - if (i2c_send_recv(i2c_bus, data++, is_write) < 0) { + if (i2c_send_recv(i2c_bus, data++, false) < 0) { ret = AUX_I2C_NACK; break; } @@ -154,19 +151,18 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, i2c_end_transfer(i2c_bus); break; case WRITE_I2C: - is_write = cmd == READ_I2C ? false : true; if (i2c_bus_busy(i2c_bus)) { i2c_end_transfer(i2c_bus); } - if (i2c_start_transfer(i2c_bus, address, !is_write)) { + if (i2c_start_transfer(i2c_bus, address, false)) { ret = AUX_I2C_NACK; break; } ret = AUX_I2C_ACK; while (len > 0) { - if (i2c_send_recv(i2c_bus, data++, is_write) < 0) { + if (i2c_send_recv(i2c_bus, data++, true) < 0) { ret = AUX_I2C_NACK; break; } @@ -183,13 +179,12 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, * - We changed the address. */ case WRITE_I2C_MOT: - is_write = cmd == READ_I2C_MOT ? false : true; ret = AUX_I2C_NACK; if (!i2c_bus_busy(i2c_bus)) { /* * No transactions started.. */ - if (i2c_start_transfer(i2c_bus, address, !is_write)) { + if (i2c_start_transfer(i2c_bus, address, false)) { break; } } else if ((address != bus->last_i2c_address) || @@ -198,7 +193,7 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, * Transaction started but we need to restart.. */ i2c_end_transfer(i2c_bus); - if (i2c_start_transfer(i2c_bus, address, !is_write)) { + if (i2c_start_transfer(i2c_bus, address, false)) { break; } } @@ -206,7 +201,7 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, bus->last_transaction = cmd; bus->last_i2c_address = address; while (len > 0) { - if (i2c_send_recv(i2c_bus, data++, is_write) < 0) { + if (i2c_send_recv(i2c_bus, data++, true) < 0) { i2c_end_transfer(i2c_bus); break; } @@ -217,13 +212,12 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, } break; case READ_I2C_MOT: - is_write = cmd == READ_I2C_MOT ? false : true; ret = AUX_I2C_NACK; if (!i2c_bus_busy(i2c_bus)) { /* * No transactions started.. */ - if (i2c_start_transfer(i2c_bus, address, !is_write)) { + if (i2c_start_transfer(i2c_bus, address, true)) { break; } } else if ((address != bus->last_i2c_address) || @@ -232,7 +226,7 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, * Transaction started but we need to restart.. */ i2c_end_transfer(i2c_bus); - if (i2c_start_transfer(i2c_bus, address, !is_write)) { + if (i2c_start_transfer(i2c_bus, address, true)) { break; } } @@ -240,7 +234,7 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, bus->last_transaction = cmd; bus->last_i2c_address = address; while (len > 0) { - if (i2c_send_recv(i2c_bus, data++, is_write) < 0) { + if (i2c_send_recv(i2c_bus, data++, false) < 0) { i2c_end_transfer(i2c_bus); break; } |