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-rw-r--r--hw/misc/aspeed_hace.c21
1 files changed, 15 insertions, 6 deletions
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index ac21be306c..12a761f1f5 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -193,6 +193,7 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
size_t digest_len = 0;
int niov = 0;
int i;
+ void *haddr;
if (sg_mode) {
uint32_t len = 0;
@@ -217,9 +218,13 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
addr &= SG_LIST_ADDR_MASK;
plen = len & SG_LIST_LEN_MASK;
- iov[i].iov_base = address_space_map(&s->dram_as, addr, &plen, false,
- MEMTXATTRS_UNSPECIFIED);
-
+ haddr = address_space_map(&s->dram_as, addr, &plen, false,
+ MEMTXATTRS_UNSPECIFIED);
+ if (haddr == NULL) {
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto failed\n", __func__);
+ return;
+ }
+ iov[i].iov_base = haddr;
if (acc_mode) {
niov = gen_acc_mode_iov(s, iov, i, &plen);
@@ -230,10 +235,14 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
} else {
hwaddr len = s->regs[R_HASH_SRC_LEN];
+ haddr = address_space_map(&s->dram_as, s->regs[R_HASH_SRC],
+ &len, false, MEMTXATTRS_UNSPECIFIED);
+ if (haddr == NULL) {
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto failed\n", __func__);
+ return;
+ }
+ iov[0].iov_base = haddr;
iov[0].iov_len = len;
- iov[0].iov_base = address_space_map(&s->dram_as, s->regs[R_HASH_SRC],
- &len, false,
- MEMTXATTRS_UNSPECIFIED);
i = 1;
if (s->iov_count) {