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-rw-r--r--hw/mips/boston.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index e815be6a6c..1cb4b6aca2 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -437,7 +437,6 @@ static void boston_mach_init(MachineState *machine)
DeviceState *dev;
BostonState *s;
Error *err = NULL;
- const char *cpu_model;
MemoryRegion *flash, *ddr, *ddr_low_alias, *lcd, *platreg;
MemoryRegion *sys_mem = get_system_memory();
XilinxPCIEHost *pcie2;
@@ -453,25 +452,24 @@ static void boston_mach_init(MachineState *machine)
exit(1);
}
- cpu_model = machine->cpu_model ?: "I6400";
-
dev = qdev_create(NULL, TYPE_MIPS_BOSTON);
qdev_init_nofail(dev);
s = BOSTON(dev);
s->mach = machine;
- if (!cpu_supports_cps_smp(cpu_model)) {
+ if (!cpu_supports_cps_smp(machine->cpu_type)) {
error_report("Boston requires CPUs which support CPS");
exit(1);
}
- is_64b = cpu_supports_isa(cpu_model, ISA_MIPS64);
+ is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64);
s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
- object_property_set_str(OBJECT(s->cps), cpu_model, "cpu-model", &err);
+ object_property_set_str(OBJECT(s->cps), machine->cpu_type, "cpu-type",
+ &err);
object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err);
object_property_set_bool(OBJECT(s->cps), true, "realized", &err);
@@ -571,6 +569,7 @@ static void boston_mach_class_init(MachineClass *mc)
mc->block_default_type = IF_IDE;
mc->default_ram_size = 1 * G_BYTE;
mc->max_cpus = 16;
+ mc->default_cpu_type = MIPS_CPU_TYPE_NAME("I6400");
}
DEFINE_MACHINE("boston", boston_mach_class_init)