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Diffstat (limited to 'hw/mc146818rtc.c')
-rw-r--r--hw/mc146818rtc.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index a1b0e31ee5..1c9a706b1b 100644
--- a/hw/mc146818rtc.c
+++ b/hw/mc146818rtc.c
@@ -112,7 +112,7 @@ static void rtc_coalesced_timer_update(RTCState *s)
} else {
/* divide each RTC interval to 2 - 8 smaller intervals */
int c = MIN(s->irq_coalesced, 7) + 1;
- int64_t next_clock = qemu_get_clock(rtc_clock) +
+ int64_t next_clock = qemu_get_clock_ns(rtc_clock) +
muldiv64(s->period / c, get_ticks_per_sec(), 32768);
qemu_mod_timer(s->coalesced_timer, next_clock);
}
@@ -234,7 +234,7 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data)
/* UIP bit is read only */
s->cmos_data[RTC_REG_A] = (data & ~REG_A_UIP) |
(s->cmos_data[RTC_REG_A] & REG_A_UIP);
- rtc_timer_update(s, qemu_get_clock(rtc_clock));
+ rtc_timer_update(s, qemu_get_clock_ns(rtc_clock));
break;
case RTC_REG_B:
if (data & REG_B_SET) {
@@ -256,7 +256,7 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data)
} else {
s->cmos_data[RTC_REG_B] = data;
}
- rtc_timer_update(s, qemu_get_clock(rtc_clock));
+ rtc_timer_update(s, qemu_get_clock_ns(rtc_clock));
break;
case RTC_REG_C:
case RTC_REG_D:
@@ -599,17 +599,17 @@ static int rtc_initfn(ISADevice *dev)
rtc_set_date_from_host(dev);
- s->periodic_timer = qemu_new_timer(rtc_clock, rtc_periodic_timer, s);
+ s->periodic_timer = qemu_new_timer_ns(rtc_clock, rtc_periodic_timer, s);
#ifdef TARGET_I386
if (rtc_td_hack)
s->coalesced_timer =
- qemu_new_timer(rtc_clock, rtc_coalesced_timer, s);
+ qemu_new_timer_ns(rtc_clock, rtc_coalesced_timer, s);
#endif
- s->second_timer = qemu_new_timer(rtc_clock, rtc_update_second, s);
- s->second_timer2 = qemu_new_timer(rtc_clock, rtc_update_second2, s);
+ s->second_timer = qemu_new_timer_ns(rtc_clock, rtc_update_second, s);
+ s->second_timer2 = qemu_new_timer_ns(rtc_clock, rtc_update_second2, s);
s->next_second_time =
- qemu_get_clock(rtc_clock) + (get_ticks_per_sec() * 99) / 100;
+ qemu_get_clock_ns(rtc_clock) + (get_ticks_per_sec() * 99) / 100;
qemu_mod_timer(s->second_timer2, s->next_second_time);
register_ioport_write(base, 2, 1, cmos_ioport_write, s);