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-rw-r--r--hw/isa/apm.c2
-rw-r--r--hw/isa/i82378.c6
-rw-r--r--hw/isa/isa-bus.c2
-rw-r--r--hw/isa/isa_mmio.c2
-rw-r--r--hw/isa/lpc_ich9.c13
-rw-r--r--hw/isa/pc87312.c2
-rw-r--r--hw/isa/vt82c686.c42
7 files changed, 42 insertions, 27 deletions
diff --git a/hw/isa/apm.c b/hw/isa/apm.c
index 5f21d21473..f97e7a0c24 100644
--- a/hw/isa/apm.c
+++ b/hw/isa/apm.c
@@ -96,7 +96,7 @@ void apm_init(PCIDevice *dev, APMState *apm, apm_ctrl_changed_t callback,
apm->arg = arg;
/* ioport 0xb2, 0xb3 */
- memory_region_init_io(&apm->io, &apm_ops, apm, "apm-io", 2);
+ memory_region_init_io(&apm->io, OBJECT(dev), &apm_ops, apm, "apm-io", 2);
memory_region_add_subregion(pci_address_space_io(dev), APM_CNT_IOPORT,
&apm->io);
}
diff --git a/hw/isa/i82378.c b/hw/isa/i82378.c
index a24cb98cba..b25ed04af3 100644
--- a/hw/isa/i82378.c
+++ b/hw/isa/i82378.c
@@ -221,10 +221,12 @@ static int pci_i82378_init(PCIDevice *dev)
pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin 0 */
- memory_region_init_io(&s->io, &i82378_io_ops, s, "i82378-io", 0x00010000);
+ memory_region_init_io(&s->io, OBJECT(pci), &i82378_io_ops, s,
+ "i82378-io", 0x00010000);
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->io);
- memory_region_init_io(&s->mem, &i82378_mem_ops, s, "i82378-mem", 0x01000000);
+ memory_region_init_io(&s->mem, OBJECT(pci), &i82378_mem_ops, s,
+ "i82378-mem", 0x01000000);
pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
/* Make I/O address read only */
diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c
index 136d17ede0..cfd610c681 100644
--- a/hw/isa/isa-bus.c
+++ b/hw/isa/isa-bus.c
@@ -115,7 +115,7 @@ void isa_register_portio_list(ISADevice *dev, uint16_t start,
actually handled e.g. the FDC device. */
isa_init_ioport(dev, start);
- portio_list_init(piolist, pio_start, opaque, name);
+ portio_list_init(piolist, OBJECT(dev), pio_start, opaque, name);
portio_list_add(piolist, isabus->address_space_io, start);
}
diff --git a/hw/isa/isa_mmio.c b/hw/isa/isa_mmio.c
index d4dbf13831..00ae8ebc2e 100644
--- a/hw/isa/isa_mmio.c
+++ b/hw/isa/isa_mmio.c
@@ -69,7 +69,7 @@ static const MemoryRegionOps isa_mmio_ops = {
void isa_mmio_setup(MemoryRegion *mr, hwaddr size)
{
- memory_region_init_io(mr, &isa_mmio_ops, NULL, "isa-mmio", size);
+ memory_region_init_io(mr, NULL, &isa_mmio_ops, NULL, "isa-mmio", size);
}
void isa_mmio_init(hwaddr base, hwaddr size)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 667e882962..b49be4dae3 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -477,22 +477,23 @@ static const MemoryRegionOps rbca_mmio_ops = {
static void ich9_lpc_machine_ready(Notifier *n, void *opaque)
{
ICH9LPCState *s = container_of(n, ICH9LPCState, machine_ready);
+ MemoryRegion *io_as = pci_address_space_io(&s->d);
uint8_t *pci_conf;
pci_conf = s->d.config;
- if (isa_is_ioport_assigned(0x3f8)) {
+ if (memory_region_present(io_as, 0x3f8)) {
/* com1 */
pci_conf[0x82] |= 0x01;
}
- if (isa_is_ioport_assigned(0x2f8)) {
+ if (memory_region_present(io_as, 0x2f8)) {
/* com2 */
pci_conf[0x82] |= 0x02;
}
- if (isa_is_ioport_assigned(0x378)) {
+ if (memory_region_present(io_as, 0x378)) {
/* lpt */
pci_conf[0x82] |= 0x04;
}
- if (isa_is_ioport_assigned(0x3f0)) {
+ if (memory_region_present(io_as, 0x3f0)) {
/* floppy */
pci_conf[0x82] |= 0x08;
}
@@ -534,7 +535,7 @@ static int ich9_lpc_initfn(PCIDevice *d)
pci_set_long(d->wmask + ICH9_LPC_PMBASE,
ICH9_LPC_PMBASE_BASE_ADDRESS_MASK);
- memory_region_init_io(&lpc->rbca_mem, &rbca_mmio_ops, lpc,
+ memory_region_init_io(&lpc->rbca_mem, OBJECT(d), &rbca_mmio_ops, lpc,
"lpc-rbca-mmio", ICH9_CC_SIZE);
lpc->isa_bus = isa_bus;
@@ -545,7 +546,7 @@ static int ich9_lpc_initfn(PCIDevice *d)
lpc->machine_ready.notify = ich9_lpc_machine_ready;
qemu_add_machine_init_done_notifier(&lpc->machine_ready);
- memory_region_init_io(&lpc->rst_cnt_mem, &ich9_rst_cnt_ops, lpc,
+ memory_region_init_io(&lpc->rst_cnt_mem, OBJECT(d), &ich9_rst_cnt_ops, lpc,
"lpc-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(d),
ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index cc426df7f8..46a23fb6b4 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -352,7 +352,7 @@ static void pc87312_initfn(Object *obj)
{
PC87312State *s = PC87312(obj);
- memory_region_init_io(&s->io, &pc87312_io_ops, s, "pc87312", 2);
+ memory_region_init_io(&s->io, obj, &pc87312_io_ops, s, "pc87312", 2);
}
static const VMStateDescription vmstate_pc87312 = {
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 391d90d14a..2174eaaf87 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -43,10 +43,12 @@ typedef struct SuperIOConfig
typedef struct VT82C686BState {
PCIDevice dev;
+ MemoryRegion superio;
SuperIOConfig superio_conf;
} VT82C686BState;
-static void superio_ioport_writeb(void *opaque, uint32_t addr, uint32_t data)
+static void superio_ioport_writeb(void *opaque, hwaddr addr, uint64_t data,
+ unsigned size)
{
int can_write;
SuperIOConfig *superio_conf = opaque;
@@ -93,7 +95,7 @@ static void superio_ioport_writeb(void *opaque, uint32_t addr, uint32_t data)
}
}
-static uint32_t superio_ioport_readb(void *opaque, uint32_t addr)
+static uint64_t superio_ioport_readb(void *opaque, hwaddr addr, unsigned size)
{
SuperIOConfig *superio_conf = opaque;
@@ -101,6 +103,16 @@ static uint32_t superio_ioport_readb(void *opaque, uint32_t addr)
return (superio_conf->config[superio_conf->index]);
}
+static const MemoryRegionOps superio_ops = {
+ .read = superio_ioport_readb,
+ .write = superio_ioport_writeb,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 1,
+ },
+};
+
static void vt82c686b_reset(void * opaque)
{
PCIDevice *d = opaque;
@@ -140,17 +152,7 @@ static void vt82c686b_write_config(PCIDevice * d, uint32_t address,
pci_default_write_config(d, address, val, len);
if (address == 0x85) { /* enable or disable super IO configure */
- if (val & 0x2) {
- /* floppy also uses 0x3f0 and 0x3f1.
- * But we do not emulate flopy,so just set it here. */
- isa_unassign_ioport(0x3f0, 2);
- register_ioport_read(0x3f0, 2, 1, superio_ioport_readb,
- &vt686->superio_conf);
- register_ioport_write(0x3f0, 2, 1, superio_ioport_writeb,
- &vt686->superio_conf);
- } else {
- isa_unassign_ioport(0x3f0, 2);
- }
+ memory_region_set_enabled(&vt686->superio, val & 0x2);
}
}
@@ -354,7 +356,7 @@ static int vt82c686b_pm_initfn(PCIDevice *dev)
apm_init(dev, &s->apm, NULL, s);
- memory_region_init(&s->io, "vt82c686-pm", 64);
+ memory_region_init(&s->io, OBJECT(dev), "vt82c686-pm", 64);
memory_region_set_enabled(&s->io, false);
memory_region_add_subregion(get_system_io(), 0, &s->io);
@@ -423,11 +425,13 @@ static const VMStateDescription vmstate_via = {
/* init the PCI-to-ISA bridge */
static int vt82c686b_initfn(PCIDevice *d)
{
+ VT82C686BState *vt82c = DO_UPCAST(VT82C686BState, dev, d);
uint8_t *pci_conf;
+ ISABus *isa_bus;
uint8_t *wmask;
int i;
- isa_bus_new(&d->qdev, pci_address_space_io(d));
+ isa_bus = isa_bus_new(&d->qdev, pci_address_space_io(d));
pci_conf = d->config;
pci_config_set_prog_interface(pci_conf, 0x0);
@@ -439,6 +443,14 @@ static int vt82c686b_initfn(PCIDevice *d)
}
}
+ memory_region_init_io(&vt82c->superio, OBJECT(d), &superio_ops,
+ &vt82c->superio_conf, "superio", 2);
+ memory_region_set_enabled(&vt82c->superio, false);
+ /* The floppy also uses 0x3f0 and 0x3f1.
+ * But we do not emulate a floppy, so just set it here. */
+ memory_region_add_subregion(isa_bus->address_space_io, 0x3f0,
+ &vt82c->superio);
+
qemu_register_reset(vt82c686b_reset, d);
return 0;
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-26 08:45:20 +0000