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-rw-r--r--hw/intc/spapr_xive.c25
-rw-r--r--hw/intc/xics_spapr.c18
2 files changed, 43 insertions, 0 deletions
diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index b67e9c3245..9338daba3d 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -495,10 +495,33 @@ static Property spapr_xive_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
+static int spapr_xive_cpu_intc_create(SpaprInterruptController *intc,
+ PowerPCCPU *cpu, Error **errp)
+{
+ SpaprXive *xive = SPAPR_XIVE(intc);
+ Object *obj;
+ SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu);
+
+ obj = xive_tctx_create(OBJECT(cpu), XIVE_ROUTER(xive), errp);
+ if (!obj) {
+ return -1;
+ }
+
+ spapr_cpu->tctx = XIVE_TCTX(obj);
+
+ /*
+ * (TCG) Early setting the OS CAM line for hotplugged CPUs as they
+ * don't beneficiate from the reset of the XIVE IRQ backend
+ */
+ spapr_xive_set_tctx_os_cam(spapr_cpu->tctx);
+ return 0;
+}
+
static void spapr_xive_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
XiveRouterClass *xrc = XIVE_ROUTER_CLASS(klass);
+ SpaprInterruptControllerClass *sicc = SPAPR_INTC_CLASS(klass);
dc->desc = "sPAPR XIVE Interrupt Controller";
dc->props = spapr_xive_properties;
@@ -511,6 +534,8 @@ static void spapr_xive_class_init(ObjectClass *klass, void *data)
xrc->get_nvt = spapr_xive_get_nvt;
xrc->write_nvt = spapr_xive_write_nvt;
xrc->get_tctx = spapr_xive_get_tctx;
+
+ sicc->cpu_intc_create = spapr_xive_cpu_intc_create;
}
static const TypeInfo spapr_xive_info = {
diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
index 4874e6be55..946311b858 100644
--- a/hw/intc/xics_spapr.c
+++ b/hw/intc/xics_spapr.c
@@ -330,13 +330,31 @@ void spapr_dt_xics(SpaprMachineState *spapr, uint32_t nr_servers, void *fdt,
_FDT(fdt_setprop_cell(fdt, node, "phandle", phandle));
}
+static int xics_spapr_cpu_intc_create(SpaprInterruptController *intc,
+ PowerPCCPU *cpu, Error **errp)
+{
+ ICSState *ics = ICS_SPAPR(intc);
+ Object *obj;
+ SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu);
+
+ obj = icp_create(OBJECT(cpu), TYPE_ICP, ics->xics, errp);
+ if (!obj) {
+ return -1;
+ }
+
+ spapr_cpu->icp = ICP(obj);
+ return 0;
+}
+
static void ics_spapr_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ICSStateClass *isc = ICS_CLASS(klass);
+ SpaprInterruptControllerClass *sicc = SPAPR_INTC_CLASS(klass);
device_class_set_parent_realize(dc, ics_spapr_realize,
&isc->parent_realize);
+ sicc->cpu_intc_create = xics_spapr_cpu_intc_create;
}
static const TypeInfo ics_spapr_info = {