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-rw-r--r--hw/i386/acpi-build.c8
-rw-r--r--hw/i386/acpi-dsdt.dsl2
-rw-r--r--hw/i386/acpi-dsdt.hex.generated4
-rw-r--r--hw/i386/pc.c39
-rw-r--r--hw/i386/pc_piix.c31
-rw-r--r--hw/i386/pc_q35.c34
-rw-r--r--hw/i386/q35-acpi-dsdt.dsl2
-rw-r--r--hw/i386/q35-acpi-dsdt.hex.generated4
-rw-r--r--hw/i386/smbios.c14
9 files changed, 104 insertions, 34 deletions
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index befc39f253..48312f5a83 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -924,10 +924,16 @@ build_mcfg_q35(GArray *table_data, GArray *linker, AcpiMcfgInfo *info)
static void
build_dsdt(GArray *table_data, GArray *linker, AcpiMiscInfo *misc)
{
- void *dsdt;
+ AcpiTableHeader *dsdt;
+
assert(misc->dsdt_code && misc->dsdt_size);
+
dsdt = acpi_data_push(table_data, misc->dsdt_size);
memcpy(dsdt, misc->dsdt_code, misc->dsdt_size);
+
+ memset(dsdt, 0, sizeof *dsdt);
+ build_header(linker, table_data, dsdt, ACPI_DSDT_SIGNATURE,
+ misc->dsdt_size, 1);
}
/* Build final rsdt table */
diff --git a/hw/i386/acpi-dsdt.dsl b/hw/i386/acpi-dsdt.dsl
index 90efce0d18..a377424f39 100644
--- a/hw/i386/acpi-dsdt.dsl
+++ b/hw/i386/acpi-dsdt.dsl
@@ -235,7 +235,7 @@ DefinitionBlock (
}
Return (0x0B)
}
- Method(IQCR, 1, NotSerialized) {
+ Method(IQCR, 1, Serialized) {
// _CRS method - get current settings
Name(PRR0, ResourceTemplate() {
Interrupt(, Level, ActiveHigh, Shared) { 0 }
diff --git a/hw/i386/acpi-dsdt.hex.generated b/hw/i386/acpi-dsdt.hex.generated
index 2c011070c4..f8bd4ea1b5 100644
--- a/hw/i386/acpi-dsdt.hex.generated
+++ b/hw/i386/acpi-dsdt.hex.generated
@@ -8,7 +8,7 @@ static unsigned char AcpiDsdtAmlCode[] = {
0x0,
0x0,
0x1,
-0xe0,
+0xd8,
0x42,
0x58,
0x50,
@@ -3379,7 +3379,7 @@ static unsigned char AcpiDsdtAmlCode[] = {
0x51,
0x43,
0x52,
-0x1,
+0x9,
0x8,
0x50,
0x52,
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 12c436e7f1..3cd8f383f3 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1093,21 +1093,13 @@ PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
return guest_info;
}
-void pc_init_pci64_hole(PcPciInfo *pci_info, uint64_t pci_hole64_start,
- uint64_t pci_hole64_size)
+/* setup pci memory address space mapping into system address space */
+void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
+ MemoryRegion *pci_address_space)
{
- if ((sizeof(hwaddr) == 4) || (!pci_hole64_size)) {
- return;
- }
- /*
- * BIOS does not set MTRR entries for the 64 bit window, so no need to
- * align address to power of two. Align address at 1G, this makes sure
- * it can be exactly covered with a PAT entry even when using huge
- * pages.
- */
- pci_info->w64.begin = ROUND_UP(pci_hole64_start, 0x1ULL << 30);
- pci_info->w64.end = pci_info->w64.begin + pci_hole64_size;
- assert(pci_info->w64.begin <= pci_info->w64.end);
+ /* Set to lower priority than RAM */
+ memory_region_add_subregion_overlap(system_memory, 0x0,
+ pci_address_space, -1);
}
void pc_acpi_init(const char *default_dsdt)
@@ -1261,7 +1253,8 @@ static const MemoryRegionOps ioportF0_io_ops = {
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
ISADevice **rtc_state,
ISADevice **floppy,
- bool no_vmport)
+ bool no_vmport,
+ uint32 hpet_irqs)
{
int i;
DriveInfo *fd[MAX_FD];
@@ -1288,9 +1281,21 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
* when the HPET wants to take over. Thus we have to disable the latter.
*/
if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
- hpet = sysbus_try_create_simple("hpet", HPET_BASE, NULL);
-
+ /* In order to set property, here not using sysbus_try_create_simple */
+ hpet = qdev_try_create(NULL, TYPE_HPET);
if (hpet) {
+ /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7
+ * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23,
+ * IRQ8 and IRQ2.
+ */
+ uint8_t compat = object_property_get_int(OBJECT(hpet),
+ HPET_INTCAP, NULL);
+ if (!compat) {
+ qdev_prop_set_uint32(hpet, HPET_INTCAP, hpet_irqs);
+ }
+ qdev_init_nofail(hpet);
+ sysbus_mmio_map(SYS_BUS_DEVICE(hpet), 0, HPET_BASE);
+
for (i = 0; i < GSI_NUM_PINS; i++) {
sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]);
}
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index ab562853b8..4e0dae7981 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -28,6 +28,7 @@
#include "hw/loader.h"
#include "hw/i386/pc.h"
#include "hw/i386/apic.h"
+#include "hw/i386/smbios.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_ids.h"
#include "hw/usb.h"
@@ -59,6 +60,7 @@ static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
static bool has_pci_info;
static bool has_acpi_build = true;
+static bool smbios_type1_defaults = true;
/* PC hardware initialisation */
static void pc_init1(QEMUMachineInitArgs *args,
@@ -114,7 +116,7 @@ static void pc_init1(QEMUMachineInitArgs *args,
if (pci_enabled) {
pci_memory = g_new(MemoryRegion, 1);
- memory_region_init(pci_memory, NULL, "pci", INT64_MAX);
+ memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
rom_memory = pci_memory;
} else {
pci_memory = NULL;
@@ -128,6 +130,12 @@ static void pc_init1(QEMUMachineInitArgs *args,
guest_info->has_pci_info = has_pci_info;
guest_info->isapc_ram_fw = !pci_enabled;
+ if (smbios_type1_defaults) {
+ /* These values are guest ABI, do not change */
+ smbios_set_type1_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
+ args->machine->name);
+ }
+
/* allocate ram and load rom/bios */
if (!xen_enabled()) {
fw_cfg = pc_memory_init(system_memory,
@@ -149,8 +157,6 @@ static void pc_init1(QEMUMachineInitArgs *args,
if (pci_enabled) {
pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi,
system_memory, system_io, args->ram_size,
- below_4g_mem_size,
- 0x100000000ULL - below_4g_mem_size,
above_4g_mem_size,
pci_memory, ram_memory);
} else {
@@ -183,7 +189,8 @@ static void pc_init1(QEMUMachineInitArgs *args,
pc_vga_init(isa_bus, pci_enabled ? pci_bus : NULL);
/* init basic PC hardware */
- pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, xen_enabled());
+ pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, xen_enabled(),
+ 0x4);
pc_nic_init(isa_bus, pci_bus);
@@ -235,8 +242,14 @@ static void pc_init_pci(QEMUMachineInitArgs *args)
pc_init1(args, 1, 1);
}
+static void pc_compat_1_7(QEMUMachineInitArgs *args)
+{
+ smbios_type1_defaults = false;
+}
+
static void pc_compat_1_6(QEMUMachineInitArgs *args)
{
+ pc_compat_1_7(args);
has_pci_info = false;
rom_file_in_ram = false;
has_acpi_build = false;
@@ -267,6 +280,12 @@ static void pc_compat_1_2(QEMUMachineInitArgs *args)
disable_kvm_pv_eoi();
}
+static void pc_init_pci_1_7(QEMUMachineInitArgs *args)
+{
+ pc_compat_1_7(args);
+ pc_init_pci(args);
+}
+
static void pc_init_pci_1_6(QEMUMachineInitArgs *args)
{
pc_compat_1_6(args);
@@ -303,6 +322,7 @@ static void pc_init_pci_no_kvmclock(QEMUMachineInitArgs *args)
{
has_pci_info = false;
has_acpi_build = false;
+ smbios_type1_defaults = false;
disable_kvm_pv_eoi();
enable_compat_apic_id_mode();
pc_init1(args, 1, 0);
@@ -312,6 +332,7 @@ static void pc_init_isa(QEMUMachineInitArgs *args)
{
has_pci_info = false;
has_acpi_build = false;
+ smbios_type1_defaults = false;
if (!args->cpu_model) {
args->cpu_model = "486";
}
@@ -356,7 +377,7 @@ static QEMUMachine pc_i440fx_machine_v2_0 = {
static QEMUMachine pc_i440fx_machine_v1_7 = {
PC_I440FX_1_7_MACHINE_OPTIONS,
.name = "pc-i440fx-1.7",
- .init = pc_init_pci,
+ .init = pc_init_pci_1_7,
};
#define PC_I440FX_1_6_MACHINE_OPTIONS PC_I440FX_MACHINE_OPTIONS
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 97aa84264c..07f38ff704 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -39,6 +39,7 @@
#include "hw/pci-host/q35.h"
#include "exec/address-spaces.h"
#include "hw/i386/ich9.h"
+#include "hw/i386/smbios.h"
#include "hw/ide/pci.h"
#include "hw/ide/ahci.h"
#include "hw/usb.h"
@@ -49,6 +50,7 @@
static bool has_pci_info;
static bool has_acpi_build = true;
+static bool smbios_type1_defaults = true;
/* PC hardware initialisation */
static void pc_q35_init(QEMUMachineInitArgs *args)
@@ -101,7 +103,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
/* pci enabled */
if (pci_enabled) {
pci_memory = g_new(MemoryRegion, 1);
- memory_region_init(pci_memory, NULL, "pci", INT64_MAX);
+ memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
rom_memory = pci_memory;
} else {
pci_memory = NULL;
@@ -113,6 +115,12 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
guest_info->isapc_ram_fw = false;
guest_info->has_acpi_build = has_acpi_build;
+ if (smbios_type1_defaults) {
+ /* These values are guest ABI, do not change */
+ smbios_set_type1_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
+ args->machine->name);
+ }
+
/* allocate ram and load rom/bios */
if (!xen_enabled()) {
pc_memory_init(get_system_memory(),
@@ -182,7 +190,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
pc_register_ferr_irq(gsi[13]);
/* init basic PC hardware */
- pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, false);
+ pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, false, 0xff0104);
/* connect pm stuff to lpc */
ich9_lpc_pm_init(lpc);
@@ -217,8 +225,14 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
}
}
+static void pc_compat_1_7(QEMUMachineInitArgs *args)
+{
+ smbios_type1_defaults = false;
+}
+
static void pc_compat_1_6(QEMUMachineInitArgs *args)
{
+ pc_compat_1_7(args);
has_pci_info = false;
rom_file_in_ram = false;
has_acpi_build = false;
@@ -236,6 +250,12 @@ static void pc_compat_1_4(QEMUMachineInitArgs *args)
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
}
+static void pc_q35_init_1_7(QEMUMachineInitArgs *args)
+{
+ pc_compat_1_7(args);
+ pc_q35_init(args);
+}
+
static void pc_q35_init_1_6(QEMUMachineInitArgs *args)
{
pc_compat_1_6(args);
@@ -275,7 +295,11 @@ static QEMUMachine pc_q35_machine_v2_0 = {
static QEMUMachine pc_q35_machine_v1_7 = {
PC_Q35_1_7_MACHINE_OPTIONS,
.name = "pc-q35-1.7",
- .init = pc_q35_init,
+ .init = pc_q35_init_1_7,
+ .compat_props = (GlobalProperty[]) {
+ PC_Q35_COMPAT_1_7,
+ { /* end of list */ }
+ },
};
#define PC_Q35_1_6_MACHINE_OPTIONS PC_Q35_MACHINE_OPTIONS
@@ -285,7 +309,7 @@ static QEMUMachine pc_q35_machine_v1_6 = {
.name = "pc-q35-1.6",
.init = pc_q35_init_1_6,
.compat_props = (GlobalProperty[]) {
- PC_COMPAT_1_6,
+ PC_Q35_COMPAT_1_6,
{ /* end of list */ }
},
};
@@ -295,7 +319,7 @@ static QEMUMachine pc_q35_machine_v1_5 = {
.name = "pc-q35-1.5",
.init = pc_q35_init_1_5,
.compat_props = (GlobalProperty[]) {
- PC_COMPAT_1_5,
+ PC_Q35_COMPAT_1_5,
{ /* end of list */ }
},
};
diff --git a/hw/i386/q35-acpi-dsdt.dsl b/hw/i386/q35-acpi-dsdt.dsl
index 21c89b098b..575c5d7376 100644
--- a/hw/i386/q35-acpi-dsdt.dsl
+++ b/hw/i386/q35-acpi-dsdt.dsl
@@ -333,7 +333,7 @@ DefinitionBlock (
}
Return (0x0B)
}
- Method(IQCR, 1, NotSerialized) {
+ Method(IQCR, 1, Serialized) {
// _CRS method - get current settings
Name(PRR0, ResourceTemplate() {
Interrupt(, Level, ActiveHigh, Shared) { 0 }
diff --git a/hw/i386/q35-acpi-dsdt.hex.generated b/hw/i386/q35-acpi-dsdt.hex.generated
index 32c16ff86f..111ad3e9c2 100644
--- a/hw/i386/q35-acpi-dsdt.hex.generated
+++ b/hw/i386/q35-acpi-dsdt.hex.generated
@@ -8,7 +8,7 @@ static unsigned char Q35AcpiDsdtAmlCode[] = {
0x0,
0x0,
0x1,
-0x6,
+0xfe,
0x42,
0x58,
0x50,
@@ -5338,7 +5338,7 @@ static unsigned char Q35AcpiDsdtAmlCode[] = {
0x51,
0x43,
0x52,
-0x1,
+0x9,
0x8,
0x50,
0x52,
diff --git a/hw/i386/smbios.c b/hw/i386/smbios.c
index d3f1ee65c6..e8f41ad435 100644
--- a/hw/i386/smbios.c
+++ b/hw/i386/smbios.c
@@ -256,6 +256,20 @@ static void smbios_build_type_1_fields(void)
}
}
+void smbios_set_type1_defaults(const char *manufacturer,
+ const char *product, const char *version)
+{
+ if (!type1.manufacturer) {
+ type1.manufacturer = manufacturer;
+ }
+ if (!type1.product) {
+ type1.product = product;
+ }
+ if (!type1.version) {
+ type1.version = version;
+ }
+}
+
uint8_t *smbios_get_table(size_t *length)
{
if (!smbios_immutable) {