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-rw-r--r--hw/dma/xilinx_axidma.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c
index 0a7f5acb4b..306da46699 100644
--- a/hw/dma/xilinx_axidma.c
+++ b/hw/dma/xilinx_axidma.c
@@ -128,8 +128,8 @@ struct XilinxAXIDMA {
AddressSpace as;
uint32_t freqhz;
- StreamSlave *tx_data_dev;
- StreamSlave *tx_control_dev;
+ StreamSink *tx_data_dev;
+ StreamSink *tx_control_dev;
XilinxAXIDMAStreamSlave rx_data_dev;
XilinxAXIDMAStreamSlave rx_control_dev;
@@ -261,8 +261,8 @@ static void stream_complete(struct Stream *s)
ptimer_transaction_commit(s->ptimer);
}
-static void stream_process_mem2s(struct Stream *s, StreamSlave *tx_data_dev,
- StreamSlave *tx_control_dev)
+static void stream_process_mem2s(struct Stream *s, StreamSink *tx_data_dev,
+ StreamSink *tx_control_dev)
{
uint32_t prev_d;
uint32_t txlen;
@@ -384,7 +384,7 @@ static void xilinx_axidma_reset(DeviceState *dev)
}
static size_t
-xilinx_axidma_control_stream_push(StreamSlave *obj, unsigned char *buf,
+xilinx_axidma_control_stream_push(StreamSink *obj, unsigned char *buf,
size_t len, bool eop)
{
XilinxAXIDMAStreamSlave *cs = XILINX_AXI_DMA_CONTROL_STREAM(obj);
@@ -400,7 +400,7 @@ xilinx_axidma_control_stream_push(StreamSlave *obj, unsigned char *buf,
}
static bool
-xilinx_axidma_data_stream_can_push(StreamSlave *obj,
+xilinx_axidma_data_stream_can_push(StreamSink *obj,
StreamCanPushNotifyFn notify,
void *notify_opaque)
{
@@ -417,7 +417,7 @@ xilinx_axidma_data_stream_can_push(StreamSlave *obj,
}
static size_t
-xilinx_axidma_data_stream_push(StreamSlave *obj, unsigned char *buf, size_t len,
+xilinx_axidma_data_stream_push(StreamSink *obj, unsigned char *buf, size_t len,
bool eop)
{
XilinxAXIDMAStreamSlave *ds = XILINX_AXI_DMA_DATA_STREAM(obj);
@@ -588,9 +588,9 @@ static void xilinx_axidma_init(Object *obj)
static Property axidma_properties[] = {
DEFINE_PROP_UINT32("freqhz", XilinxAXIDMA, freqhz, 50000000),
DEFINE_PROP_LINK("axistream-connected", XilinxAXIDMA,
- tx_data_dev, TYPE_STREAM_SLAVE, StreamSlave *),
+ tx_data_dev, TYPE_STREAM_SINK, StreamSink *),
DEFINE_PROP_LINK("axistream-control-connected", XilinxAXIDMA,
- tx_control_dev, TYPE_STREAM_SLAVE, StreamSlave *),
+ tx_control_dev, TYPE_STREAM_SINK, StreamSink *),
DEFINE_PROP_END_OF_LIST(),
};
@@ -603,21 +603,21 @@ static void axidma_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, axidma_properties);
}
-static StreamSlaveClass xilinx_axidma_data_stream_class = {
+static StreamSinkClass xilinx_axidma_data_stream_class = {
.push = xilinx_axidma_data_stream_push,
.can_push = xilinx_axidma_data_stream_can_push,
};
-static StreamSlaveClass xilinx_axidma_control_stream_class = {
+static StreamSinkClass xilinx_axidma_control_stream_class = {
.push = xilinx_axidma_control_stream_push,
};
static void xilinx_axidma_stream_class_init(ObjectClass *klass, void *data)
{
- StreamSlaveClass *ssc = STREAM_SLAVE_CLASS(klass);
+ StreamSinkClass *ssc = STREAM_SINK_CLASS(klass);
- ssc->push = ((StreamSlaveClass *)data)->push;
- ssc->can_push = ((StreamSlaveClass *)data)->can_push;
+ ssc->push = ((StreamSinkClass *)data)->push;
+ ssc->can_push = ((StreamSinkClass *)data)->can_push;
}
static const TypeInfo axidma_info = {
@@ -635,7 +635,7 @@ static const TypeInfo xilinx_axidma_data_stream_info = {
.class_init = xilinx_axidma_stream_class_init,
.class_data = &xilinx_axidma_data_stream_class,
.interfaces = (InterfaceInfo[]) {
- { TYPE_STREAM_SLAVE },
+ { TYPE_STREAM_SINK },
{ }
}
};
@@ -647,7 +647,7 @@ static const TypeInfo xilinx_axidma_control_stream_info = {
.class_init = xilinx_axidma_stream_class_init,
.class_data = &xilinx_axidma_control_stream_class,
.interfaces = (InterfaceInfo[]) {
- { TYPE_STREAM_SLAVE },
+ { TYPE_STREAM_SINK },
{ }
}
};