diff options
Diffstat (limited to 'hw/cirrus_vga.c')
| -rw-r--r-- | hw/cirrus_vga.c | 78 |
1 files changed, 8 insertions, 70 deletions
diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c index ad23c4ad84..4f57b92f57 100644 --- a/hw/cirrus_vga.c +++ b/hw/cirrus_vga.c @@ -2827,12 +2827,11 @@ static void cirrus_vga_ioport_write(void *opaque, uint32_t addr, uint32_t val) * ***************************************/ -static uint32_t cirrus_mmio_readb(void *opaque, target_phys_addr_t addr) +static uint64_t cirrus_mmio_read(void *opaque, target_phys_addr_t addr, + unsigned size) { CirrusVGAState *s = opaque; - addr &= CIRRUS_PNPMMIO_SIZE - 1; - if (addr >= 0x100) { return cirrus_mmio_blt_read(s, addr - 0x100); } else { @@ -2840,33 +2839,11 @@ static uint32_t cirrus_mmio_readb(void *opaque, target_phys_addr_t addr) } } -static uint32_t cirrus_mmio_readw(void *opaque, target_phys_addr_t addr) -{ - uint32_t v; - - v = cirrus_mmio_readb(opaque, addr); - v |= cirrus_mmio_readb(opaque, addr + 1) << 8; - return v; -} - -static uint32_t cirrus_mmio_readl(void *opaque, target_phys_addr_t addr) -{ - uint32_t v; - - v = cirrus_mmio_readb(opaque, addr); - v |= cirrus_mmio_readb(opaque, addr + 1) << 8; - v |= cirrus_mmio_readb(opaque, addr + 2) << 16; - v |= cirrus_mmio_readb(opaque, addr + 3) << 24; - return v; -} - -static void cirrus_mmio_writeb(void *opaque, target_phys_addr_t addr, - uint32_t val) +static void cirrus_mmio_write(void *opaque, target_phys_addr_t addr, + uint64_t val, unsigned size) { CirrusVGAState *s = opaque; - addr &= CIRRUS_PNPMMIO_SIZE - 1; - if (addr >= 0x100) { cirrus_mmio_blt_write(s, addr - 0x100, val); } else { @@ -2874,53 +2851,14 @@ static void cirrus_mmio_writeb(void *opaque, target_phys_addr_t addr, } } -static void cirrus_mmio_writew(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - cirrus_mmio_writeb(opaque, addr, val & 0xff); - cirrus_mmio_writeb(opaque, addr + 1, (val >> 8) & 0xff); -} - -static void cirrus_mmio_writel(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - cirrus_mmio_writeb(opaque, addr, val & 0xff); - cirrus_mmio_writeb(opaque, addr + 1, (val >> 8) & 0xff); - cirrus_mmio_writeb(opaque, addr + 2, (val >> 16) & 0xff); - cirrus_mmio_writeb(opaque, addr + 3, (val >> 24) & 0xff); -} - - -static uint64_t cirrus_mmio_read(void *opaque, target_phys_addr_t addr, - unsigned size) -{ - CirrusVGAState *s = opaque; - - switch (size) { - case 1: return cirrus_mmio_readb(s, addr); - case 2: return cirrus_mmio_readw(s, addr); - case 4: return cirrus_mmio_readl(s, addr); - default: abort(); - } -}; - -static void cirrus_mmio_write(void *opaque, target_phys_addr_t addr, - uint64_t data, unsigned size) -{ - CirrusVGAState *s = opaque; - - switch (size) { - case 1: return cirrus_mmio_writeb(s, addr, data); - case 2: return cirrus_mmio_writew(s, addr, data); - case 4: return cirrus_mmio_writel(s, addr, data); - default: abort(); - } -}; - static const MemoryRegionOps cirrus_mmio_io_ops = { .read = cirrus_mmio_read, .write = cirrus_mmio_write, .endianness = DEVICE_LITTLE_ENDIAN, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, }; /* load/save state */ |