diff options
Diffstat (limited to 'hw/cadence_ttc.c')
| -rw-r--r-- | hw/cadence_ttc.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/cadence_ttc.c b/hw/cadence_ttc.c index dd02f86eb9..9e1cb1f152 100644 --- a/hw/cadence_ttc.c +++ b/hw/cadence_ttc.c @@ -17,7 +17,7 @@ */ #include "sysbus.h" -#include "qemu-timer.h" +#include "qemu/timer.h" #ifdef CADENCE_TTC_ERR_DEBUG #define DB_PRINT(...) do { \ @@ -76,7 +76,7 @@ static void cadence_timer_update(CadenceTimerState *s) } static CadenceTimerState *cadence_timer_from_addr(void *opaque, - target_phys_addr_t offset) + hwaddr offset) { unsigned int index; CadenceTTCState *s = (CadenceTTCState *)opaque; @@ -224,7 +224,7 @@ static void cadence_timer_tick(void *opaque) cadence_timer_run(s); } -static uint32_t cadence_ttc_read_imp(void *opaque, target_phys_addr_t offset) +static uint32_t cadence_ttc_read_imp(void *opaque, hwaddr offset) { CadenceTimerState *s = cadence_timer_from_addr(opaque, offset); uint32_t value; @@ -274,6 +274,7 @@ static uint32_t cadence_ttc_read_imp(void *opaque, target_phys_addr_t offset) /* cleared after read */ value = s->reg_intr; s->reg_intr = 0; + cadence_timer_update(s); return value; case 0x60: /* interrupt enable */ @@ -296,7 +297,7 @@ static uint32_t cadence_ttc_read_imp(void *opaque, target_phys_addr_t offset) } } -static uint64_t cadence_ttc_read(void *opaque, target_phys_addr_t offset, +static uint64_t cadence_ttc_read(void *opaque, hwaddr offset, unsigned size) { uint32_t ret = cadence_ttc_read_imp(opaque, offset); @@ -305,7 +306,7 @@ static uint64_t cadence_ttc_read(void *opaque, target_phys_addr_t offset, return ret; } -static void cadence_ttc_write(void *opaque, target_phys_addr_t offset, +static void cadence_ttc_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { CadenceTimerState *s = cadence_timer_from_addr(opaque, offset); @@ -355,7 +356,6 @@ static void cadence_ttc_write(void *opaque, target_phys_addr_t offset, case 0x54: /* interrupt register */ case 0x58: case 0x5c: - s->reg_intr &= (~value & 0xfff); break; case 0x60: /* interrupt enable */ |