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-rw-r--r--hw/arm/omap1.c17
-rw-r--r--hw/arm/spitz.c2
-rw-r--r--hw/arm/stellaris.c2
-rw-r--r--hw/arm/strongarm.c2
4 files changed, 12 insertions, 11 deletions
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index 99ed43e3be..56844c3030 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -110,7 +110,7 @@ static inline uint32_t omap_timer_read(struct omap_mpu_timer_s *timer)
if (timer->st && timer->enable && timer->rate)
return timer->val - muldiv64(distance >> (timer->ptv + 1),
- timer->rate, get_ticks_per_sec());
+ timer->rate, NANOSECONDS_PER_SECOND);
else
return timer->val;
}
@@ -128,7 +128,7 @@ static inline void omap_timer_update(struct omap_mpu_timer_s *timer)
if (timer->enable && timer->st && timer->rate) {
timer->val = timer->reset_val; /* Should skip this on clk enable */
expires = muldiv64((uint64_t) timer->val << (timer->ptv + 1),
- get_ticks_per_sec(), timer->rate);
+ NANOSECONDS_PER_SECOND, timer->rate);
/* If timer expiry would be sooner than in about 1 ms and
* auto-reload isn't set, then fire immediately. This is a hack
@@ -136,10 +136,11 @@ static inline void omap_timer_update(struct omap_mpu_timer_s *timer)
* sets the interval to a very low value and polls the status bit
* in a busy loop when it wants to sleep just a couple of CPU
* ticks. */
- if (expires > (get_ticks_per_sec() >> 10) || timer->ar)
+ if (expires > (NANOSECONDS_PER_SECOND >> 10) || timer->ar) {
timer_mod(timer->timer, timer->time + expires);
- else
+ } else {
qemu_bh_schedule(timer->tick);
+ }
} else
timer_del(timer->timer);
}
@@ -616,14 +617,14 @@ static void omap_ulpd_pm_write(void *opaque, hwaddr addr,
now -= s->ulpd_gauge_start;
/* 32-kHz ticks */
- ticks = muldiv64(now, 32768, get_ticks_per_sec());
+ ticks = muldiv64(now, 32768, NANOSECONDS_PER_SECOND);
s->ulpd_pm_regs[0x00 >> 2] = (ticks >> 0) & 0xffff;
s->ulpd_pm_regs[0x04 >> 2] = (ticks >> 16) & 0xffff;
if (ticks >> 32) /* OVERFLOW_32K */
s->ulpd_pm_regs[0x14 >> 2] |= 1 << 2;
/* High frequency ticks */
- ticks = muldiv64(now, 12000000, get_ticks_per_sec());
+ ticks = muldiv64(now, 12000000, NANOSECONDS_PER_SECOND);
s->ulpd_pm_regs[0x08 >> 2] = (ticks >> 0) & 0xffff;
s->ulpd_pm_regs[0x0c >> 2] = (ticks >> 16) & 0xffff;
if (ticks >> 32) /* OVERFLOW_HI_FREQ */
@@ -3029,7 +3030,7 @@ static void omap_mcbsp_source_tick(void *opaque)
omap_mcbsp_rx_newdata(s);
timer_mod(s->source_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- get_ticks_per_sec());
+ NANOSECONDS_PER_SECOND);
}
static void omap_mcbsp_rx_start(struct omap_mcbsp_s *s)
@@ -3075,7 +3076,7 @@ static void omap_mcbsp_sink_tick(void *opaque)
omap_mcbsp_tx_newdata(s);
timer_mod(s->sink_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- get_ticks_per_sec());
+ NANOSECONDS_PER_SECOND);
}
static void omap_mcbsp_tx_start(struct omap_mcbsp_s *s)
diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c
index 50949d06af..bf61d63b58 100644
--- a/hw/arm/spitz.c
+++ b/hw/arm/spitz.c
@@ -405,7 +405,7 @@ static void spitz_keyboard_tick(void *opaque)
}
timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- get_ticks_per_sec() / 32);
+ NANOSECONDS_PER_SECOND / 32);
}
static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 3caeb0679b..c1766f856a 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -101,7 +101,7 @@ static void gptm_reload(gptm_state *s, int n, int reset)
tick += (int64_t)count * system_clock_scale;
} else if (s->config == 1) {
/* 32-bit RTC. 1Hz tick. */
- tick += get_ticks_per_sec();
+ tick += NANOSECONDS_PER_SECOND;
} else if (s->mode[n] == 0xa) {
/* PWM mode. Not implemented. */
} else {
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 24240995ff..80041280e2 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -1025,7 +1025,7 @@ static void strongarm_uart_update_parameters(StrongARMUARTState *s)
ssp.parity = parity;
ssp.data_bits = data_bits;
ssp.stop_bits = stop_bits;
- s->char_transmit_time = (get_ticks_per_sec() / speed) * frame_size;
+ s->char_transmit_time = (NANOSECONDS_PER_SECOND / speed) * frame_size;
if (s->chr) {
qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
}