aboutsummaryrefslogtreecommitdiff
path: root/hw/apic.c
diff options
context:
space:
mode:
Diffstat (limited to 'hw/apic.c')
-rw-r--r--hw/apic.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/hw/apic.c b/hw/apic.c
index 5a76498729..d63d74b822 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -280,6 +280,8 @@ void cpu_set_apic_base(CPUState *env, uint64_t val)
#ifdef DEBUG_APIC
printf("cpu_set_apic_base: %016" PRIx64 "\n", val);
#endif
+ if (!s)
+ return;
s->apicbase = (val & 0xfffff000) |
(s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE));
/* if disabled, cannot be enabled again */
@@ -294,14 +296,17 @@ uint64_t cpu_get_apic_base(CPUState *env)
{
APICState *s = env->apic_state;
#ifdef DEBUG_APIC
- printf("cpu_get_apic_base: %016" PRIx64 "\n", (uint64_t)s->apicbase);
+ printf("cpu_get_apic_base: %016" PRIx64 "\n",
+ s ? (uint64_t)s->apicbase: 0);
#endif
- return s->apicbase;
+ return s ? s->apicbase : 0;
}
void cpu_set_apic_tpr(CPUX86State *env, uint8_t val)
{
APICState *s = env->apic_state;
+ if (!s)
+ return;
s->tpr = (val & 0x0f) << 4;
apic_update_irq(s);
}
@@ -309,7 +314,7 @@ void cpu_set_apic_tpr(CPUX86State *env, uint8_t val)
uint8_t cpu_get_apic_tpr(CPUX86State *env)
{
APICState *s = env->apic_state;
- return s->tpr >> 4;
+ return s ? s->tpr >> 4 : 0;
}
/* return -1 if no bit is set */