diff options
Diffstat (limited to 'hw/acpi.h')
-rw-r--r-- | hw/acpi.h | 48 |
1 files changed, 29 insertions, 19 deletions
@@ -78,8 +78,9 @@ typedef struct ACPIPMTimer ACPIPMTimer; typedef struct ACPIPM1EVT ACPIPM1EVT; typedef struct ACPIPM1CNT ACPIPM1CNT; typedef struct ACPIGPE ACPIGPE; +typedef struct ACPIREGS ACPIREGS; -typedef void (*acpi_update_sci_fn)(ACPIPMTimer *tmr); +typedef void (*acpi_update_sci_fn)(ACPIREGS *ar); struct ACPIPMTimer { QEMUTimer *timer; @@ -106,12 +107,21 @@ struct ACPIGPE { uint8_t *en; }; +struct ACPIREGS { + ACPIPMTimer tmr; + ACPIGPE gpe; + struct { + ACPIPM1EVT evt; + ACPIPM1CNT cnt; + } pm1; +}; + /* PM_TMR */ -void acpi_pm_tmr_update(ACPIPMTimer *tmr, bool enable); -void acpi_pm_tmr_calc_overflow_time(ACPIPMTimer *tmr); -uint32_t acpi_pm_tmr_get(ACPIPMTimer *tmr); -void acpi_pm_tmr_init(ACPIPMTimer *tmr, acpi_update_sci_fn update_sci); -void acpi_pm_tmr_reset(ACPIPMTimer *tmr); +void acpi_pm_tmr_update(ACPIREGS *ar, bool enable); +void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar); +uint32_t acpi_pm_tmr_get(ACPIREGS *ar); +void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci); +void acpi_pm_tmr_reset(ACPIREGS *ar); #include "qemu-timer.h" static inline int64_t acpi_pm_tmr_get_clock(void) @@ -121,24 +131,24 @@ static inline int64_t acpi_pm_tmr_get_clock(void) } /* PM1a_EVT: piix and ich9 don't implement PM1b. */ -uint16_t acpi_pm1_evt_get_sts(ACPIPM1EVT *pm1, int64_t overflow_time); -void acpi_pm1_evt_write_sts(ACPIPM1EVT *pm1, ACPIPMTimer *tmr, uint16_t val); -void acpi_pm1_evt_power_down(ACPIPM1EVT *pm1, ACPIPMTimer *tmr); -void acpi_pm1_evt_reset(ACPIPM1EVT *pm1); +uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar, int64_t overflow_time); +void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val); +void acpi_pm1_evt_power_down(ACPIREGS *ar); +void acpi_pm1_evt_reset(ACPIREGS *ar); /* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */ -void acpi_pm1_cnt_init(ACPIPM1CNT *pm1_cnt, qemu_irq cmos_s3); -void acpi_pm1_cnt_write(ACPIPM1EVT *pm1a, ACPIPM1CNT *pm1_cnt, uint16_t val); -void acpi_pm1_cnt_update(ACPIPM1CNT *pm1_cnt, +void acpi_pm1_cnt_init(ACPIREGS *ar, qemu_irq cmos_s3); +void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val); +void acpi_pm1_cnt_update(ACPIREGS *ar, bool sci_enable, bool sci_disable); -void acpi_pm1_cnt_reset(ACPIPM1CNT *pm1_cnt); +void acpi_pm1_cnt_reset(ACPIREGS *ar); /* GPE0 */ -void acpi_gpe_init(ACPIGPE *gpe, uint8_t len); -void acpi_gpe_blk(ACPIGPE *gpe, uint32_t blk); -void acpi_gpe_reset(ACPIGPE *gpe); +void acpi_gpe_init(ACPIREGS *ar, uint8_t len); +void acpi_gpe_blk(ACPIREGS *ar, uint32_t blk); +void acpi_gpe_reset(ACPIREGS *ar); -void acpi_gpe_ioport_writeb(ACPIGPE *gpe, uint32_t addr, uint32_t val); -uint32_t acpi_gpe_ioport_readb(ACPIGPE *gpe, uint32_t addr); +void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val); +uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr); #endif /* !QEMU_HW_ACPI_H */ |