diff options
Diffstat (limited to 'disas/libvixl/a64/instructions-a64.cc')
-rw-r--r-- | disas/libvixl/a64/instructions-a64.cc | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/disas/libvixl/a64/instructions-a64.cc b/disas/libvixl/a64/instructions-a64.cc index e9caceb37b..1f08c781eb 100644 --- a/disas/libvixl/a64/instructions-a64.cc +++ b/disas/libvixl/a64/instructions-a64.cc @@ -57,7 +57,7 @@ static uint64_t RepeatBitsAcrossReg(unsigned reg_size, // Logical immediates can't encode zero, so a return value of zero is used to // indicate a failure case. Specifically, where the constraints on imm_s are // not met. -uint64_t Instruction::ImmLogical() { +uint64_t Instruction::ImmLogical() const { unsigned reg_size = SixtyFourBits() ? kXRegSize : kWRegSize; int64_t n = BitN(); int64_t imm_s = ImmSetBits(); @@ -108,7 +108,7 @@ uint64_t Instruction::ImmLogical() { } -float Instruction::ImmFP32() { +float Instruction::ImmFP32() const { // ImmFP: abcdefgh (8 bits) // Single: aBbb.bbbc.defg.h000.0000.0000.0000.0000 (32 bits) // where B is b ^ 1 @@ -122,7 +122,7 @@ float Instruction::ImmFP32() { } -double Instruction::ImmFP64() { +double Instruction::ImmFP64() const { // ImmFP: abcdefgh (8 bits) // Double: aBbb.bbbb.bbcd.efgh.0000.0000.0000.0000 // 0000.0000.0000.0000.0000.0000.0000.0000 (64 bits) @@ -148,8 +148,8 @@ LSDataSize CalcLSPairDataSize(LoadStorePairOp op) { } -Instruction* Instruction::ImmPCOffsetTarget() { - Instruction * base = this; +const Instruction* Instruction::ImmPCOffsetTarget() const { + const Instruction * base = this; ptrdiff_t offset; if (IsPCRelAddressing()) { // ADR and ADRP. @@ -182,7 +182,7 @@ inline int Instruction::ImmBranch() const { } -void Instruction::SetImmPCOffsetTarget(Instruction* target) { +void Instruction::SetImmPCOffsetTarget(const Instruction* target) { if (IsPCRelAddressing()) { SetPCRelImmTarget(target); } else { @@ -191,7 +191,7 @@ void Instruction::SetImmPCOffsetTarget(Instruction* target) { } -void Instruction::SetPCRelImmTarget(Instruction* target) { +void Instruction::SetPCRelImmTarget(const Instruction* target) { int32_t imm21; if ((Mask(PCRelAddressingMask) == ADR)) { imm21 = target - this; @@ -207,7 +207,7 @@ void Instruction::SetPCRelImmTarget(Instruction* target) { } -void Instruction::SetBranchImmTarget(Instruction* target) { +void Instruction::SetBranchImmTarget(const Instruction* target) { VIXL_ASSERT(((target - this) & 3) == 0); Instr branch_imm = 0; uint32_t imm_mask = 0; @@ -239,9 +239,9 @@ void Instruction::SetBranchImmTarget(Instruction* target) { } -void Instruction::SetImmLLiteral(Instruction* source) { - VIXL_ASSERT(((source - this) & 3) == 0); - int offset = (source - this) >> kLiteralEntrySizeLog2; +void Instruction::SetImmLLiteral(const Instruction* source) { + VIXL_ASSERT(IsWordAligned(source)); + ptrdiff_t offset = (source - this) >> kLiteralEntrySizeLog2; Instr imm = Assembler::ImmLLiteral(offset); Instr mask = ImmLLiteral_mask; |