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-rw-r--r--hw/ssi/aspeed_smc.c36
-rw-r--r--include/hw/ssi/aspeed_smc.h1
2 files changed, 37 insertions, 0 deletions
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 7a0cd7607f..5c3436db5e 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -870,6 +870,36 @@ static void aspeed_smc_dma_calibration(AspeedSMCState *s)
}
/*
+ * Emulate read errors in the DMA Checksum Register for high
+ * frequencies and optimistic settings of the Read Timing Compensation
+ * Register. This will help in tuning the SPI timing calibration
+ * algorithm.
+ */
+static bool aspeed_smc_inject_read_failure(AspeedSMCState *s)
+{
+ uint8_t delay =
+ (s->regs[R_DMA_CTRL] >> DMA_CTRL_DELAY_SHIFT) & DMA_CTRL_DELAY_MASK;
+ uint8_t hclk_mask =
+ (s->regs[R_DMA_CTRL] >> DMA_CTRL_FREQ_SHIFT) & DMA_CTRL_FREQ_MASK;
+
+ /*
+ * Typical values of a palmetto-bmc machine.
+ */
+ switch (aspeed_smc_hclk_divisor(hclk_mask)) {
+ case 4 ... 16:
+ return false;
+ case 3: /* at least one HCLK cycle delay */
+ return (delay & 0x7) < 1;
+ case 2: /* at least two HCLK cycle delay */
+ return (delay & 0x7) < 2;
+ case 1: /* (> 100MHz) is above the max freq of the controller */
+ return true;
+ default:
+ g_assert_not_reached();
+ }
+}
+
+/*
* Accumulate the result of the reads to provide a checksum that will
* be used to validate the read timing settings.
*/
@@ -905,6 +935,11 @@ static void aspeed_smc_dma_checksum(AspeedSMCState *s)
s->regs[R_DMA_FLASH_ADDR] += 4;
s->regs[R_DMA_LEN] -= 4;
}
+
+ if (s->inject_failure && aspeed_smc_inject_read_failure(s)) {
+ s->regs[R_DMA_CHECKSUM] = 0xbadc0de;
+ }
+
}
static void aspeed_smc_dma_rw(AspeedSMCState *s)
@@ -1185,6 +1220,7 @@ static const VMStateDescription vmstate_aspeed_smc = {
static Property aspeed_smc_properties[] = {
DEFINE_PROP_UINT32("num-cs", AspeedSMCState, num_cs, 1),
+ DEFINE_PROP_BOOL("inject-failure", AspeedSMCState, inject_failure, false),
DEFINE_PROP_UINT64("sdram-base", AspeedSMCState, sdram_base, 0),
DEFINE_PROP_LINK("dram", AspeedSMCState, dram_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
index 32ce6916f6..5176ff6bf9 100644
--- a/include/hw/ssi/aspeed_smc.h
+++ b/include/hw/ssi/aspeed_smc.h
@@ -88,6 +88,7 @@ typedef struct AspeedSMCState {
uint32_t num_cs;
qemu_irq *cs_lines;
+ bool inject_failure;
SSIBus *spi;