diff options
| -rw-r--r-- | hw/isa/vt82c686.c | 41 |
1 files changed, 19 insertions, 22 deletions
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index e0c235c3c2..223b947939 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -50,13 +50,13 @@ typedef struct VT82C686BState { static void superio_ioport_writeb(void *opaque, hwaddr addr, uint64_t data, unsigned size) { - int can_write; SuperIOConfig *superio_conf = opaque; DPRINTF("superio_ioport_writeb address 0x%x val 0x%x\n", addr, data); if (addr == 0x3f0) { superio_conf->index = data & 0xff; } else { + bool can_write = true; /* 0x3f1 */ switch (superio_conf->index) { case 0x00 ... 0xdf: @@ -68,30 +68,27 @@ static void superio_ioport_writeb(void *opaque, hwaddr addr, uint64_t data, case 0xf7: case 0xf9 ... 0xfb: case 0xfd ... 0xff: - can_write = 0; + can_write = false; break; - default: - can_write = 1; - - if (can_write) { - switch (superio_conf->index) { - case 0xe7: - if ((data & 0xff) != 0xfe) { - DPRINTF("chage uart 1 base. unsupported yet\n"); - } - break; - case 0xe8: - if ((data & 0xff) != 0xbe) { - DPRINTF("chage uart 2 base. unsupported yet\n"); - } - break; - - default: - superio_conf->config[superio_conf->index] = data & 0xff; - } + case 0xe7: + if ((data & 0xff) != 0xfe) { + DPRINTF("change uart 1 base. unsupported yet\n"); + can_write = false; + } + break; + case 0xe8: + if ((data & 0xff) != 0xbe) { + DPRINTF("change uart 2 base. unsupported yet\n"); + can_write = false; } + break; + default: + break; + + } + if (can_write) { + superio_conf->config[superio_conf->index] = data & 0xff; } - superio_conf->config[superio_conf->index] = data & 0xff; } } |