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-rw-r--r--target/arm/translate-a64.c12
-rw-r--r--target/arm/translate.c16
2 files changed, 5 insertions, 23 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 3decc8da57..9bed336b47 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -2219,17 +2219,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
* it is required for halting debug disabled: it will UNDEF.
* Secondly, "HLT 0xf000" is the A64 semihosting syscall instruction.
*/
- if (semihosting_enabled(false) && imm16 == 0xf000) {
-#ifndef CONFIG_USER_ONLY
- /* In system mode, don't allow userspace access to semihosting,
- * to provide some semblance of security (and for consistency
- * with our 32-bit semihosting).
- */
- if (s->current_el == 0) {
- unallocated_encoding(s);
- break;
- }
-#endif
+ if (semihosting_enabled(s->current_el == 0) && imm16 == 0xf000) {
gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
} else {
unallocated_encoding(s);
diff --git a/target/arm/translate.c b/target/arm/translate.c
index b1e013270d..5aaccbbf71 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1169,10 +1169,7 @@ static inline void gen_hlt(DisasContext *s, int imm)
* semihosting, to provide some semblance of security
* (and for consistency with our 32-bit semihosting).
*/
- if (semihosting_enabled(false) &&
-#ifndef CONFIG_USER_ONLY
- s->current_el != 0 &&
-#endif
+ if (semihosting_enabled(s->current_el != 0) &&
(imm == (s->thumb ? 0x3c : 0xf000))) {
gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
return;
@@ -6556,10 +6553,7 @@ static bool trans_BKPT(DisasContext *s, arg_BKPT *a)
/* BKPT is OK with ECI set and leaves it untouched */
s->eci_handled = true;
if (arm_dc_feature(s, ARM_FEATURE_M) &&
- semihosting_enabled(false) &&
-#ifndef CONFIG_USER_ONLY
- !IS_USER(s) &&
-#endif
+ semihosting_enabled(s->current_el == 0) &&
(a->imm == 0xab)) {
gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
} else {
@@ -8764,10 +8758,8 @@ static bool trans_SVC(DisasContext *s, arg_SVC *a)
{
const uint32_t semihost_imm = s->thumb ? 0xab : 0x123456;
- if (!arm_dc_feature(s, ARM_FEATURE_M) && semihosting_enabled(false) &&
-#ifndef CONFIG_USER_ONLY
- !IS_USER(s) &&
-#endif
+ if (!arm_dc_feature(s, ARM_FEATURE_M) &&
+ semihosting_enabled(s->current_el == 0) &&
(a->imm == semihost_imm)) {
gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
} else {