diff options
| -rw-r--r-- | target-i386/Makefile.objs | 1 | ||||
| -rw-r--r-- | target-i386/helper.h | 22 | ||||
| -rw-r--r-- | target-i386/svm_helper.c | 181 | ||||
| -rw-r--r-- | target-i386/translate.c | 21 |
4 files changed, 110 insertions, 115 deletions
diff --git a/target-i386/Makefile.objs b/target-i386/Makefile.objs index d39ec8e935..a3450f6c37 100644 --- a/target-i386/Makefile.objs +++ b/target-i386/Makefile.objs @@ -7,7 +7,6 @@ obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o -$(obj)/svm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/smm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-i386/helper.h b/target-i386/helper.h index 67c81bff0b..601b8dd4c7 100644 --- a/target-i386/helper.h +++ b/target-i386/helper.h @@ -95,17 +95,17 @@ DEF_HELPER_1(inw, tl, i32) DEF_HELPER_2(outl, void, i32, i32) DEF_HELPER_1(inl, tl, i32) -DEF_HELPER_2(svm_check_intercept_param, void, i32, i64) -DEF_HELPER_2(vmexit, void, i32, i64) -DEF_HELPER_3(svm_check_io, void, i32, i32, i32) -DEF_HELPER_2(vmrun, void, int, int) -DEF_HELPER_0(vmmcall, void) -DEF_HELPER_1(vmload, void, int) -DEF_HELPER_1(vmsave, void, int) -DEF_HELPER_0(stgi, void) -DEF_HELPER_0(clgi, void) -DEF_HELPER_0(skinit, void) -DEF_HELPER_1(invlpga, void, int) +DEF_HELPER_3(svm_check_intercept_param, void, env, i32, i64) +DEF_HELPER_3(vmexit, void, env, i32, i64) +DEF_HELPER_4(svm_check_io, void, env, i32, i32, i32) +DEF_HELPER_3(vmrun, void, env, int, int) +DEF_HELPER_1(vmmcall, void, env) +DEF_HELPER_2(vmload, void, env, int) +DEF_HELPER_2(vmsave, void, env, int) +DEF_HELPER_1(stgi, void, env) +DEF_HELPER_1(clgi, void, env) +DEF_HELPER_1(skinit, void, env) +DEF_HELPER_2(invlpga, void, env, int) /* x86 FPU */ diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c index 64d842c82c..f370ac53c5 100644 --- a/target-i386/svm_helper.c +++ b/target-i386/svm_helper.c @@ -18,46 +18,46 @@ */ #include "cpu.h" -#include "dyngen-exec.h" +#include "cpu-all.h" #include "helper.h" /* Secure Virtual Machine helpers */ #if defined(CONFIG_USER_ONLY) -void helper_vmrun(int aflag, int next_eip_addend) +void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) { } -void helper_vmmcall(void) +void helper_vmmcall(CPUX86State *env) { } -void helper_vmload(int aflag) +void helper_vmload(CPUX86State *env, int aflag) { } -void helper_vmsave(int aflag) +void helper_vmsave(CPUX86State *env, int aflag) { } -void helper_stgi(void) +void helper_stgi(CPUX86State *env) { } -void helper_clgi(void) +void helper_clgi(CPUX86State *env) { } -void helper_skinit(void) +void helper_skinit(CPUX86State *env) { } -void helper_invlpga(int aflag) +void helper_invlpga(CPUX86State *env, int aflag) { } -void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) +void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) { } @@ -65,7 +65,8 @@ void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, uint64_t exit_info_1) { } -void helper_svm_check_intercept_param(uint32_t type, uint64_t param) +void helper_svm_check_intercept_param(CPUX86State *env, uint32_t type, + uint64_t param) { } @@ -74,13 +75,13 @@ void cpu_svm_check_intercept_param(CPUX86State *env, uint32_t type, { } -void helper_svm_check_io(uint32_t port, uint32_t param, +void helper_svm_check_io(CPUX86State *env, uint32_t port, uint32_t param, uint32_t next_eip_addend) { } #else -static inline void svm_save_seg(target_phys_addr_t addr, +static inline void svm_save_seg(CPUX86State *env, target_phys_addr_t addr, const SegmentCache *sc) { stw_phys(addr + offsetof(struct vmcb_seg, selector), @@ -93,7 +94,8 @@ static inline void svm_save_seg(target_phys_addr_t addr, ((sc->flags >> 8) & 0xff) | ((sc->flags >> 12) & 0x0f00)); } -static inline void svm_load_seg(target_phys_addr_t addr, SegmentCache *sc) +static inline void svm_load_seg(CPUX86State *env, target_phys_addr_t addr, + SegmentCache *sc) { unsigned int flags; @@ -104,23 +106,23 @@ static inline void svm_load_seg(target_phys_addr_t addr, SegmentCache *sc) sc->flags = ((flags & 0xff) << 8) | ((flags & 0x0f00) << 12); } -static inline void svm_load_seg_cache(target_phys_addr_t addr, - CPUX86State *env, int seg_reg) +static inline void svm_load_seg_cache(CPUX86State *env, target_phys_addr_t addr, + int seg_reg) { SegmentCache sc1, *sc = &sc1; - svm_load_seg(addr, sc); + svm_load_seg(env, addr, sc); cpu_x86_load_seg_cache(env, seg_reg, sc->selector, sc->base, sc->limit, sc->flags); } -void helper_vmrun(int aflag, int next_eip_addend) +void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) { target_ulong addr; uint32_t event_inj; uint32_t int_ctl; - helper_svm_check_intercept_param(SVM_EXIT_VMRUN, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_VMRUN, 0); if (aflag == 2) { addr = EAX; @@ -154,13 +156,13 @@ void helper_vmrun(int aflag, int next_eip_addend) stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rflags), cpu_compute_eflags(env)); - svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.es), + svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.es), &env->segs[R_ES]); - svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.cs), + svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.cs), &env->segs[R_CS]); - svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.ss), + svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.ss), &env->segs[R_SS]); - svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.ds), + svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.ds), &env->segs[R_DS]); stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip), @@ -233,14 +235,14 @@ void helper_vmrun(int aflag, int next_eip_addend) ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); CC_OP = CC_OP_EFLAGS; - svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.es), - env, R_ES); - svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.cs), - env, R_CS); - svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.ss), - env, R_SS); - svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.ds), - env, R_DS); + svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.es), + R_ES); + svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.cs), + R_CS); + svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.ss), + R_SS); + svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.ds), + R_DS); EIP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip)); env->eip = EIP; @@ -320,17 +322,17 @@ void helper_vmrun(int aflag, int next_eip_addend) } } -void helper_vmmcall(void) +void helper_vmmcall(CPUX86State *env) { - helper_svm_check_intercept_param(SVM_EXIT_VMMCALL, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_VMMCALL, 0); raise_exception(env, EXCP06_ILLOP); } -void helper_vmload(int aflag) +void helper_vmload(CPUX86State *env, int aflag) { target_ulong addr; - helper_svm_check_intercept_param(SVM_EXIT_VMLOAD, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_VMLOAD, 0); if (aflag == 2) { addr = EAX; @@ -340,17 +342,14 @@ void helper_vmload(int aflag) qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmload! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n", - addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)), + addr, ldq_phys(addr + offsetof(struct vmcb, + save.fs.base)), env->segs[R_FS].base); - svm_load_seg_cache(addr + offsetof(struct vmcb, save.fs), - env, R_FS); - svm_load_seg_cache(addr + offsetof(struct vmcb, save.gs), - env, R_GS); - svm_load_seg(addr + offsetof(struct vmcb, save.tr), - &env->tr); - svm_load_seg(addr + offsetof(struct vmcb, save.ldtr), - &env->ldt); + svm_load_seg_cache(env, addr + offsetof(struct vmcb, save.fs), R_FS); + svm_load_seg_cache(env, addr + offsetof(struct vmcb, save.gs), R_GS); + svm_load_seg(env, addr + offsetof(struct vmcb, save.tr), &env->tr); + svm_load_seg(env, addr + offsetof(struct vmcb, save.ldtr), &env->ldt); #ifdef TARGET_X86_64 env->kernelgsbase = ldq_phys(addr + offsetof(struct vmcb, @@ -367,11 +366,11 @@ void helper_vmload(int aflag) save.sysenter_eip)); } -void helper_vmsave(int aflag) +void helper_vmsave(CPUX86State *env, int aflag) { target_ulong addr; - helper_svm_check_intercept_param(SVM_EXIT_VMSAVE, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_VMSAVE, 0); if (aflag == 2) { addr = EAX; @@ -384,13 +383,13 @@ void helper_vmsave(int aflag) addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)), env->segs[R_FS].base); - svm_save_seg(addr + offsetof(struct vmcb, save.fs), + svm_save_seg(env, addr + offsetof(struct vmcb, save.fs), &env->segs[R_FS]); - svm_save_seg(addr + offsetof(struct vmcb, save.gs), + svm_save_seg(env, addr + offsetof(struct vmcb, save.gs), &env->segs[R_GS]); - svm_save_seg(addr + offsetof(struct vmcb, save.tr), + svm_save_seg(env, addr + offsetof(struct vmcb, save.tr), &env->tr); - svm_save_seg(addr + offsetof(struct vmcb, save.ldtr), + svm_save_seg(env, addr + offsetof(struct vmcb, save.ldtr), &env->ldt); #ifdef TARGET_X86_64 @@ -408,30 +407,30 @@ void helper_vmsave(int aflag) env->sysenter_eip); } -void helper_stgi(void) +void helper_stgi(CPUX86State *env) { - helper_svm_check_intercept_param(SVM_EXIT_STGI, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_STGI, 0); env->hflags2 |= HF2_GIF_MASK; } -void helper_clgi(void) +void helper_clgi(CPUX86State *env) { - helper_svm_check_intercept_param(SVM_EXIT_CLGI, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_CLGI, 0); env->hflags2 &= ~HF2_GIF_MASK; } -void helper_skinit(void) +void helper_skinit(CPUX86State *env) { - helper_svm_check_intercept_param(SVM_EXIT_SKINIT, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_SKINIT, 0); /* XXX: not implemented */ raise_exception(env, EXCP06_ILLOP); } -void helper_invlpga(int aflag) +void helper_invlpga(CPUX86State *env, int aflag) { target_ulong addr; - helper_svm_check_intercept_param(SVM_EXIT_INVLPGA, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_INVLPGA, 0); if (aflag == 2) { addr = EAX; @@ -444,7 +443,8 @@ void helper_invlpga(int aflag) tlb_flush_page(env, addr); } -void helper_svm_check_intercept_param(uint32_t type, uint64_t param) +void helper_svm_check_intercept_param(CPUX86State *env, uint32_t type, + uint64_t param) { if (likely(!(env->hflags & HF_SVMI_MASK))) { return; @@ -452,27 +452,27 @@ void helper_svm_check_intercept_param(uint32_t type, uint64_t param) switch (type) { case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR0 + 8: if (env->intercept_cr_read & (1 << (type - SVM_EXIT_READ_CR0))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR0 + 8: if (env->intercept_cr_write & (1 << (type - SVM_EXIT_WRITE_CR0))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR0 + 7: if (env->intercept_dr_read & (1 << (type - SVM_EXIT_READ_DR0))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR0 + 7: if (env->intercept_dr_write & (1 << (type - SVM_EXIT_WRITE_DR0))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 31: if (env->intercept_exceptions & (1 << (type - SVM_EXIT_EXCP_BASE))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; case SVM_EXIT_MSR: @@ -499,36 +499,31 @@ void helper_svm_check_intercept_param(uint32_t type, uint64_t param) t0 %= 8; break; default: - helper_vmexit(type, param); + helper_vmexit(env, type, param); t0 = 0; t1 = 0; break; } if (ldub_phys(addr + t1) & ((1 << param) << t0)) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } } break; default: if (env->intercept & (1ULL << (type - SVM_EXIT_INTR))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; } } -void cpu_svm_check_intercept_param(CPUX86State *env1, uint32_t type, +void cpu_svm_check_intercept_param(CPUX86State *env, uint32_t type, uint64_t param) { - CPUX86State *saved_env; - - saved_env = env; - env = env1; - helper_svm_check_intercept_param(type, param); - env = saved_env; + helper_svm_check_intercept_param(env, type, param); } -void helper_svm_check_io(uint32_t port, uint32_t param, +void helper_svm_check_io(CPUX86State *env, uint32_t port, uint32_t param, uint32_t next_eip_addend) { if (env->intercept & (1ULL << (SVM_EXIT_IOIO - SVM_EXIT_INTR))) { @@ -541,13 +536,13 @@ void helper_svm_check_io(uint32_t port, uint32_t param, /* next EIP */ stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2), env->eip + next_eip_addend); - helper_vmexit(SVM_EXIT_IOIO, param | (port << 16)); + helper_vmexit(env, SVM_EXIT_IOIO, param | (port << 16)); } } } /* Note: currently only 32 bits of exit_code are used */ -void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) +void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) { uint32_t int_ctl; @@ -567,13 +562,13 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) } /* Save the VM state in the vmcb */ - svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.es), + svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.es), &env->segs[R_ES]); - svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.cs), + svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.cs), &env->segs[R_CS]); - svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.ss), + svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.ss), &env->segs[R_SS]); - svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.ds), + svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.ds), &env->segs[R_DS]); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base), @@ -602,7 +597,8 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rflags), cpu_compute_eflags(env)); - stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip), env->eip); + stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip), + env->eip); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp), ESP); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax), EAX); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr7), env->dr[7]); @@ -645,14 +641,14 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); CC_OP = CC_OP_EFLAGS; - svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.es), - env, R_ES); - svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.cs), - env, R_CS); - svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.ss), - env, R_SS); - svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.ds), - env, R_DS); + svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.es), + R_ES); + svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.cs), + R_CS); + svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.ss), + R_SS); + svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.ds), + R_DS); EIP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip)); ESP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rsp)); @@ -707,10 +703,9 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) cpu_loop_exit(env); } -void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, uint64_t exit_info_1) +void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) { - env = nenv; - helper_vmexit(exit_code, exit_info_1); + helper_vmexit(env, exit_code, exit_info_1); } #endif diff --git a/target-i386/translate.c b/target-i386/translate.c index 37732e0fad..9f4c7120cb 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -754,7 +754,8 @@ static void gen_check_io(DisasContext *s, int ot, target_ulong cur_eip, svm_flags |= (1 << (4 + ot)); next_eip = s->pc - s->cs_base; tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_svm_check_io(cpu_tmp2_i32, tcg_const_i32(svm_flags), + gen_helper_svm_check_io(cpu_env, cpu_tmp2_i32, + tcg_const_i32(svm_flags), tcg_const_i32(next_eip - cur_eip)); } } @@ -2465,7 +2466,7 @@ gen_svm_check_intercept_param(DisasContext *s, target_ulong pc_start, if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_svm_check_intercept_param(tcg_const_i32(type), + gen_helper_svm_check_intercept_param(cpu_env, tcg_const_i32(type), tcg_const_i64(param)); } @@ -7225,7 +7226,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_vmrun(tcg_const_i32(s->aflag), + gen_helper_vmrun(cpu_env, tcg_const_i32(s->aflag), tcg_const_i32(s->pc - pc_start)); tcg_gen_exit_tb(0); s->is_jmp = DISAS_TB_JUMP; @@ -7234,7 +7235,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 1: /* VMMCALL */ if (!(s->flags & HF_SVME_MASK)) goto illegal_op; - gen_helper_vmmcall(); + gen_helper_vmmcall(cpu_env); break; case 2: /* VMLOAD */ if (!(s->flags & HF_SVME_MASK) || !s->pe) @@ -7243,7 +7244,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_vmload(tcg_const_i32(s->aflag)); + gen_helper_vmload(cpu_env, tcg_const_i32(s->aflag)); } break; case 3: /* VMSAVE */ @@ -7253,7 +7254,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_vmsave(tcg_const_i32(s->aflag)); + gen_helper_vmsave(cpu_env, tcg_const_i32(s->aflag)); } break; case 4: /* STGI */ @@ -7265,7 +7266,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_stgi(); + gen_helper_stgi(cpu_env); } break; case 5: /* CLGI */ @@ -7275,7 +7276,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_clgi(); + gen_helper_clgi(cpu_env); } break; case 6: /* SKINIT */ @@ -7283,7 +7284,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) !(s->cpuid_ext3_features & CPUID_EXT3_SKINIT)) || !s->pe) goto illegal_op; - gen_helper_skinit(); + gen_helper_skinit(cpu_env); break; case 7: /* INVLPGA */ if (!(s->flags & HF_SVME_MASK) || !s->pe) @@ -7292,7 +7293,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_invlpga(tcg_const_i32(s->aflag)); + gen_helper_invlpga(cpu_env, tcg_const_i32(s->aflag)); } break; default: |