diff options
| -rw-r--r-- | hw/ppc_chrp.c | 6 | ||||
| -rw-r--r-- | hw/ppc_prep.c | 21 | ||||
| -rw-r--r-- | target-ppc/helper.c | 5 |
3 files changed, 20 insertions, 12 deletions
diff --git a/hw/ppc_chrp.c b/hw/ppc_chrp.c index 9c6ac84a4f..653f7c3a7c 100644 --- a/hw/ppc_chrp.c +++ b/hw/ppc_chrp.c @@ -327,9 +327,6 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, /* init CPUs */ env = cpu_init(); - qemu_register_reset(&cpu_ppc_reset, env); - register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); - if (cpu_model == NULL) cpu_model = "default"; ppc_find_by_name(cpu_model, &def); @@ -338,9 +335,12 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, } for (i = 0; i < smp_cpus; i++) { cpu_ppc_register(env, def); + cpu_ppc_reset(env); /* Set time-base frequency to 100 Mhz */ cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); env->osi_call = vga_osi_call; + qemu_register_reset(&cpu_ppc_reset, env); + register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); envs[i] = env; } diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c index 504ca33a9c..9e2a4403a5 100644 --- a/hw/ppc_prep.c +++ b/hw/ppc_prep.c @@ -26,6 +26,9 @@ //#define HARD_DEBUG_PPC_IO //#define DEBUG_PPC_IO +/* SMP is not enabled, for now */ +#define MAX_CPUS 1 + #define BIOS_FILENAME "ppc_rom.bin" #define KERNEL_LOAD_ADDR 0x01000000 #define INITRD_LOAD_ADDR 0x01800000 @@ -521,7 +524,7 @@ static void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device, const char *initrd_filename, const char *cpu_model) { - CPUState *env; + CPUState *env, *envs[MAX_CPUS]; char buf[1024]; m48t59_t *nvram; int PPC_io_memory; @@ -539,20 +542,22 @@ static void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device, linux_boot = (kernel_filename != NULL); /* init CPUs */ - env = cpu_init(); - qemu_register_reset(&cpu_ppc_reset, env); - register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); - if (cpu_model == NULL) cpu_model = "default"; ppc_find_by_name(cpu_model, &def); if (def == NULL) { cpu_abort(env, "Unable to find PowerPC CPU definition\n"); } - cpu_ppc_register(env, def); - /* Set time-base frequency to 100 Mhz */ - cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); + for (i = 0; i < smp_cpus; i++) { + cpu_ppc_register(env, def); + cpu_ppc_reset(env); + /* Set time-base frequency to 100 Mhz */ + cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); + qemu_register_reset(&cpu_ppc_reset, env); + register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); + envs[i] = env; + } /* allocate RAM */ cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); diff --git a/target-ppc/helper.c b/target-ppc/helper.c index 438cad42a6..daee4c7a18 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -2789,7 +2789,11 @@ void cpu_ppc_reset (void *opaque) msr_fp = 1; /* Allow floating point exceptions */ msr_pr = 1; #else +#if defined(TARGET_PPC64) + env->nip = 0x00000100; +#else env->nip = 0xFFFFFFFC; +#endif ppc_tlb_invalidate_all(env); #endif do_compute_hflags(env); @@ -2810,7 +2814,6 @@ CPUPPCState *cpu_ppc_init (void) if (!env) return NULL; cpu_exec_init(env); - cpu_ppc_reset(env); return env; } |