diff options
| -rw-r--r-- | target/arm/cpu.h | 2 | ||||
| -rw-r--r-- | target/arm/translate-sve.c | 5 |
2 files changed, 4 insertions, 3 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index e890ee074d..5168e3d837 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3387,7 +3387,7 @@ static inline uint64_t *aa64_vfp_qreg(CPUARMState *env, unsigned regno) } /* Shared between translate-sve.c and sve_helper.c. */ -extern const uint64_t pred_esz_masks[4]; +extern const uint64_t pred_esz_masks[5]; /* Helper for the macros below, validating the argument type. */ static inline MemTxAttrs *typecheck_memtxattrs(MemTxAttrs *x) diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 41f8b12259..621a2abb22 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -529,9 +529,10 @@ static void do_predtest(DisasContext *s, int dofs, int gofs, int words) } /* For each element size, the bits within a predicate word that are active. */ -const uint64_t pred_esz_masks[4] = { +const uint64_t pred_esz_masks[5] = { 0xffffffffffffffffull, 0x5555555555555555ull, - 0x1111111111111111ull, 0x0101010101010101ull + 0x1111111111111111ull, 0x0101010101010101ull, + 0x0001000100010001ull, }; static bool trans_INVALID(DisasContext *s, arg_INVALID *a) |