diff options
| -rw-r--r-- | target/mips/cpu.c | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 39eafafc5c..3ffa342187 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -57,9 +57,11 @@ static bool mips_cpu_has_work(CPUState *cs) CPUMIPSState *env = &cpu->env; bool has_work = false; - /* Prior to MIPS Release 6 it is implementation dependent if non-enabled - interrupts wake-up the CPU, however most of the implementations only - check for interrupts that can be taken. */ + /* + * Prior to MIPS Release 6 it is implementation dependent if non-enabled + * interrupts wake-up the CPU, however most of the implementations only + * check for interrupts that can be taken. + */ if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && cpu_mips_hw_interrupts_pending(env)) { if (cpu_mips_hw_interrupts_enabled(env) || @@ -70,8 +72,10 @@ static bool mips_cpu_has_work(CPUState *cs) /* MIPS-MT has the ability to halt the CPU. */ if (env->CP0_Config3 & (1 << CP0C3_MT)) { - /* The QEMU model will issue an _WAKE request whenever the CPUs - should be woken up. */ + /* + * The QEMU model will issue an _WAKE request whenever the CPUs + * should be woken up. + */ if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { has_work = true; } @@ -112,7 +116,8 @@ static void mips_cpu_reset(CPUState *s) #endif } -static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) { +static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) +{ MIPSCPU *cpu = MIPS_CPU(s); CPUMIPSState *env = &cpu->env; |