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-rw-r--r--hw/char/cadence_uart.c4
-rw-r--r--hw/ppc/ppc.c6
-rw-r--r--hw/ppc/ppc405_uc.c2
-rw-r--r--hw/ppc/ppc_booke.c4
-rw-r--r--hw/timer/m48t59.c4
-rw-r--r--include/hw/char/serial.h4
-rw-r--r--include/hw/ppc/ppc.h4
-rw-r--r--target-alpha/cpu-qom.h2
-rw-r--r--target-mips/cpu.h2
-rw-r--r--target-openrisc/cpu.h2
-rw-r--r--target-sparc/cpu.h2
-rw-r--r--ui/console.c2
12 files changed, 19 insertions, 19 deletions
diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index f8ccbdd13a..f18db53bca 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -120,8 +120,8 @@ typedef struct {
uint64_t char_tx_time;
CharDriverState *chr;
qemu_irq irq;
- struct QEMUTimer *fifo_trigger_handle;
- struct QEMUTimer *tx_time_handle;
+ QEMUTimer *fifo_trigger_handle;
+ QEMUTimer *tx_time_handle;
} UartState;
static void uart_update_status(UartState *s)
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index bf2d3d4b35..114be64480 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -684,7 +684,7 @@ static inline void cpu_ppc_hdecr_excp(PowerPCCPU *cpu)
}
static void __cpu_ppc_store_decr(PowerPCCPU *cpu, uint64_t *nextp,
- struct QEMUTimer *timer,
+ QEMUTimer *timer,
void (*raise_excp)(PowerPCCPU *),
uint32_t decr, uint32_t value,
int is_excp)
@@ -856,9 +856,9 @@ typedef struct ppc40x_timer_t ppc40x_timer_t;
struct ppc40x_timer_t {
uint64_t pit_reload; /* PIT auto-reload value */
uint64_t fit_next; /* Tick for next FIT interrupt */
- struct QEMUTimer *fit_timer;
+ QEMUTimer *fit_timer;
uint64_t wdt_next; /* Tick for next WDT interrupt */
- struct QEMUTimer *wdt_timer;
+ QEMUTimer *wdt_timer;
/* 405 have the PIT, 440 have a DECR. */
unsigned int decr_excp;
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index 6d6a7f1203..8109f92200 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -1234,7 +1234,7 @@ struct ppc4xx_gpt_t {
MemoryRegion iomem;
int64_t tb_offset;
uint32_t tb_freq;
- struct QEMUTimer *timer;
+ QEMUTimer *timer;
qemu_irq irqs[5];
uint32_t oe;
uint32_t ol;
diff --git a/hw/ppc/ppc_booke.c b/hw/ppc/ppc_booke.c
index b421620708..d8399602d6 100644
--- a/hw/ppc/ppc_booke.c
+++ b/hw/ppc/ppc_booke.c
@@ -64,10 +64,10 @@ typedef struct booke_timer_t booke_timer_t;
struct booke_timer_t {
uint64_t fit_next;
- struct QEMUTimer *fit_timer;
+ QEMUTimer *fit_timer;
uint64_t wdt_next;
- struct QEMUTimer *wdt_timer;
+ QEMUTimer *wdt_timer;
uint32_t flags;
};
diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
index d3d78ec5a8..be0592b53d 100644
--- a/hw/timer/m48t59.c
+++ b/hw/timer/m48t59.c
@@ -61,8 +61,8 @@ struct M48t59State {
time_t stop_time;
/* Alarm & watchdog */
struct tm alarm;
- struct QEMUTimer *alrm_timer;
- struct QEMUTimer *wd_timer;
+ QEMUTimer *alrm_timer;
+ QEMUTimer *wd_timer;
/* NVRAM storage */
uint8_t *buffer;
/* Model parameters */
diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h
index 85f58acd51..f431764bf5 100644
--- a/include/hw/char/serial.h
+++ b/include/hw/char/serial.h
@@ -65,13 +65,13 @@ struct SerialState {
/* Interrupt trigger level for recv_fifo */
uint8_t recv_fifo_itl;
- struct QEMUTimer *fifo_timeout_timer;
+ QEMUTimer *fifo_timeout_timer;
int timeout_ipending; /* timeout interrupt pending state */
uint64_t char_transmit_time; /* time to transmit a char in ticks */
int poll_msl;
- struct QEMUTimer *modem_status_poll;
+ QEMUTimer *modem_status_poll;
MemoryRegion io;
};
diff --git a/include/hw/ppc/ppc.h b/include/hw/ppc/ppc.h
index 132ab97b58..835418aeb0 100644
--- a/include/hw/ppc/ppc.h
+++ b/include/hw/ppc/ppc.h
@@ -24,10 +24,10 @@ struct ppc_tb_t {
/* Decrementer management */
uint64_t decr_next; /* Tick for next decr interrupt */
uint32_t decr_freq; /* decrementer frequency */
- struct QEMUTimer *decr_timer;
+ QEMUTimer *decr_timer;
/* Hypervisor decrementer management */
uint64_t hdecr_next; /* Tick for next hdecr interrupt */
- struct QEMUTimer *hdecr_timer;
+ QEMUTimer *hdecr_timer;
uint64_t purr_load;
uint64_t purr_start;
void *opaque;
diff --git a/target-alpha/cpu-qom.h b/target-alpha/cpu-qom.h
index 2ebc9bcacb..198f1b13a3 100644
--- a/target-alpha/cpu-qom.h
+++ b/target-alpha/cpu-qom.h
@@ -62,7 +62,7 @@ typedef struct AlphaCPU {
CPUAlphaState env;
/* This alarm doesn't exist in real hardware; we wish it did. */
- struct QEMUTimer *alarm_timer;
+ QEMUTimer *alarm_timer;
} AlphaCPU;
static inline AlphaCPU *alpha_env_get_cpu(CPUAlphaState *env)
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index a29c82faf1..9caf4474b9 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -476,7 +476,7 @@ struct CPUMIPSState {
const mips_def_t *cpu_model;
void *irq[8];
- struct QEMUTimer *timer; /* Internal timer */
+ QEMUTimer *timer; /* Internal timer */
};
#include "cpu-qom.h"
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index 0f9efdf6de..51d6afd153 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -307,7 +307,7 @@ typedef struct CPUOpenRISCState {
#ifndef CONFIG_USER_ONLY
CPUOpenRISCTLBContext * tlb;
- struct QEMUTimer *timer;
+ QEMUTimer *timer;
uint32_t ttmr; /* Timer tick mode register */
uint32_t ttcr; /* Timer tick count register */
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 41194ec06b..c519063ba9 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -370,7 +370,7 @@ struct CPUTimer
uint32_t disabled;
uint64_t disabled_mask;
int64_t clock_offset;
- struct QEMUTimer *qtimer;
+ QEMUTimer *qtimer;
};
typedef struct CPUTimer CPUTimer;
diff --git a/ui/console.c b/ui/console.c
index 586fc6d6f1..502e1600ab 100644
--- a/ui/console.c
+++ b/ui/console.c
@@ -161,7 +161,7 @@ struct QemuConsole {
};
struct DisplayState {
- struct QEMUTimer *gui_timer;
+ QEMUTimer *gui_timer;
uint64_t last_update;
uint64_t update_interval;
bool refreshing;
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-28 14:14:02 +0000