diff options
-rw-r--r-- | hw/dma.c | 4 | ||||
-rw-r--r-- | hw/heathrow_pic.c | 4 | ||||
-rw-r--r-- | hw/mips_r4k.c | 32 | ||||
-rw-r--r-- | hw/openpic.c | 8 | ||||
-rw-r--r-- | hw/pci.c | 12 | ||||
-rw-r--r-- | hw/pckbd.c | 8 | ||||
-rw-r--r-- | hw/ppc_chrp.c | 56 | ||||
-rw-r--r-- | hw/ppc_prep.c | 40 | ||||
-rw-r--r-- | hw/slavio_intctl.c | 10 | ||||
-rw-r--r-- | hw/sun4m.c | 11 | ||||
-rw-r--r-- | hw/sun4u.c | 11 | ||||
-rw-r--r-- | linux-user/main.c | 6 | ||||
-rw-r--r-- | target-sparc/op_helper.c | 4 | ||||
-rw-r--r-- | target-sparc/translate.c | 9 | ||||
-rw-r--r-- | tests/qruncom.c | 2 |
15 files changed, 129 insertions, 88 deletions
@@ -427,7 +427,9 @@ int DMA_write_memory (int nchan, void *buf, int pos, int len) /* request the emulator to transfer a new DMA memory block ASAP */ void DMA_schedule(int nchan) { - cpu_interrupt(cpu_single_env, CPU_INTERRUPT_EXIT); + CPUState *env = cpu_single_env; + if (env) + cpu_interrupt(env, CPU_INTERRUPT_EXIT); } static void dma_reset(void *opaque) diff --git a/hw/heathrow_pic.c b/hw/heathrow_pic.c index d65da9a9fe..4980cef467 100644 --- a/hw/heathrow_pic.c +++ b/hw/heathrow_pic.c @@ -45,9 +45,9 @@ static inline int check_irq(HeathrowPIC *pic) static void heathrow_pic_update(HeathrowPICS *s) { if (check_irq(&s->pics[0]) || check_irq(&s->pics[1])) { - cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); + cpu_interrupt(first_cpu, CPU_INTERRUPT_HARD); } else { - cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); + cpu_reset_interrupt(first_cpu, CPU_INTERRUPT_HARD); } } diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c index bf3376d4f6..cfb907efe7 100644 --- a/hw/mips_r4k.c +++ b/hw/mips_r4k.c @@ -11,12 +11,13 @@ static PITState *pit; static void pic_irq_request(void *opaque, int level) { + CPUState *env = first_cpu; if (level) { - cpu_single_env->CP0_Cause |= 0x00000400; - cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); + env->CP0_Cause |= 0x00000400; + cpu_interrupt(env, CPU_INTERRUPT_HARD); } else { - cpu_single_env->CP0_Cause &= ~0x00000400; - cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); + env->CP0_Cause &= ~0x00000400; + cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); } } @@ -74,8 +75,8 @@ void cpu_mips_store_count (CPUState *env, uint32_t value) void cpu_mips_store_compare (CPUState *env, uint32_t value) { cpu_mips_update_count(env, cpu_mips_get_count(env), value); - cpu_single_env->CP0_Cause &= ~0x00008000; - cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); + env->CP0_Cause &= ~0x00008000; + cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); } static void mips_timer_cb (void *opaque) @@ -89,8 +90,8 @@ static void mips_timer_cb (void *opaque) } #endif cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare); - cpu_single_env->CP0_Cause |= 0x00008000; - cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); + env->CP0_Cause |= 0x00008000; + cpu_interrupt(env, CPU_INTERRUPT_HARD); } void cpu_mips_clock_init (CPUState *env) @@ -181,9 +182,14 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, int io_memory; int linux_boot; int ret; + CPUState *env; printf("%s: start\n", __func__); linux_boot = (kernel_filename != NULL); + + env = cpu_init(); + register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); + /* allocate RAM */ cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); bios_offset = ram_size + vga_ram_size; @@ -198,9 +204,9 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, BIOS_SIZE, bios_offset | IO_MEM_ROM); #if 0 memcpy(phys_ram_base + 0x10000, phys_ram_base + bios_offset, BIOS_SIZE); - cpu_single_env->PC = 0x80010004; + env->PC = 0x80010004; #else - cpu_single_env->PC = 0xBFC00004; + env->PC = 0xBFC00004; #endif if (linux_boot) { kernel_base = KERNEL_LOAD_ADDR; @@ -226,7 +232,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, initrd_base = 0; initrd_size = 0; } - cpu_single_env->PC = KERNEL_LOAD_ADDR; + env->PC = KERNEL_LOAD_ADDR; } else { kernel_base = 0; kernel_size = 0; @@ -235,7 +241,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, } /* Init internal devices */ - cpu_mips_clock_init(cpu_single_env); + cpu_mips_clock_init(env); cpu_mips_irqctrl_init(); /* Register 64 KB of ISA IO space at 0x14000000 */ @@ -243,7 +249,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, cpu_register_physical_memory(0x14000000, 0x00010000, io_memory); isa_mem_base = 0x10000000; - isa_pic = pic_init(pic_irq_request, cpu_single_env); + isa_pic = pic_init(pic_irq_request, env); pit = pit_init(0x40, 0); serial_init(0x3f8, 4, serial_hds[0]); vga_initialize(NULL, ds, phys_ram_base + ram_size, ram_size, diff --git a/hw/openpic.c b/hw/openpic.c index 08fb9bd126..8068e7e590 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -265,7 +265,8 @@ static void IRQ_local_pipe (openpic_t *opp, int n_CPU, int n_IRQ) if (priority > dst->raised.priority) { IRQ_get_next(opp, &dst->raised); DPRINTF("Raise CPU IRQ\n"); - cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); + /* XXX: choose the correct cpu */ + cpu_interrupt(first_cpu, CPU_INTERRUPT_HARD); } } @@ -532,7 +533,7 @@ static void openpic_gbl_write (void *opaque, uint32_t addr, uint32_t val) /* XXX: Should be able to reset any CPU */ if (val & 1) { DPRINTF("Reset CPU IRQ\n"); - // cpu_interrupt(cpu_single_env, CPU_INTERRUPT_RESET); + // cpu_interrupt(first_cpu, CPU_INTERRUPT_RESET); } break; #if MAX_IPI > 0 @@ -781,7 +782,8 @@ static void openpic_cpu_write (void *opaque, uint32_t addr, uint32_t val) src = &opp->src[n_IRQ]; if (IPVP_PRIORITY(src->ipvp) > dst->servicing.priority) { DPRINTF("Raise CPU IRQ\n"); - cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); + /* XXX: choose cpu */ + cpu_interrupt(first_cpu, CPU_INTERRUPT_HARD); } } break; @@ -1616,32 +1616,32 @@ void pci_info(void) static __attribute__((unused)) uint32_t isa_inb(uint32_t addr) { - return cpu_inb(cpu_single_env, addr); + return cpu_inb(NULL, addr); } static void isa_outb(uint32_t val, uint32_t addr) { - cpu_outb(cpu_single_env, addr, val); + cpu_outb(NULL, addr, val); } static __attribute__((unused)) uint32_t isa_inw(uint32_t addr) { - return cpu_inw(cpu_single_env, addr); + return cpu_inw(NULL, addr); } static __attribute__((unused)) void isa_outw(uint32_t val, uint32_t addr) { - cpu_outw(cpu_single_env, addr, val); + cpu_outw(NULL, addr, val); } static __attribute__((unused)) uint32_t isa_inl(uint32_t addr) { - return cpu_inl(cpu_single_env, addr); + return cpu_inl(NULL, addr); } static __attribute__((unused)) void isa_outl(uint32_t val, uint32_t addr) { - cpu_outl(cpu_single_env, addr, val); + cpu_outl(NULL, addr, val); } static void pci_config_writel(PCIDevice *d, uint32_t addr, uint32_t val) diff --git a/hw/pckbd.c b/hw/pckbd.c index be559eb4f6..1be1560eff 100644 --- a/hw/pckbd.c +++ b/hw/pckbd.c @@ -254,7 +254,7 @@ static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val) case KBD_CCMD_READ_OUTPORT: /* XXX: check that */ #ifdef TARGET_I386 - val = 0x01 | (((cpu_single_env->a20_mask >> 20) & 1) << 1); + val = 0x01 | (ioport_get_a20() << 1); #else val = 0x01; #endif @@ -266,10 +266,10 @@ static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val) break; #ifdef TARGET_I386 case KBD_CCMD_ENABLE_A20: - cpu_x86_set_a20(cpu_single_env, 1); + ioport_set_a20(1); break; case KBD_CCMD_DISABLE_A20: - cpu_x86_set_a20(cpu_single_env, 0); + ioport_set_a20(0); break; #endif case KBD_CCMD_RESET: @@ -611,7 +611,7 @@ void kbd_write_data(void *opaque, uint32_t addr, uint32_t val) break; case KBD_CCMD_WRITE_OUTPORT: #ifdef TARGET_I386 - cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1); + ioport_set_a20((val >> 1) & 1); #endif if (!(val & 1)) { qemu_system_reset_request(); diff --git a/hw/ppc_chrp.c b/hw/ppc_chrp.c index 46e9031688..a0dfbf6b93 100644 --- a/hw/ppc_chrp.c +++ b/hw/ppc_chrp.c @@ -300,6 +300,7 @@ static void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, const char *initrd_filename, int is_heathrow) { + CPUState *env; char buf[1024]; SetIRQFunc *set_irq; void *pic; @@ -315,6 +316,36 @@ static void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, linux_boot = (kernel_filename != NULL); + /* init CPUs */ + env = cpu_init(); + register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); + + /* Register CPU as a 74x/75x */ + /* XXX: CPU model (or PVR) should be provided on command line */ + // ppc_find_by_name("750gx", &def); // Linux boot OK + // ppc_find_by_name("750fx", &def); // Linux boot OK + /* Linux does not boot on 750cxe (and probably other 750cx based) + * because it assumes it has 8 IBAT & DBAT pairs as it only have 4. + */ + // ppc_find_by_name("750cxe", &def); + // ppc_find_by_name("750p", &def); + // ppc_find_by_name("740p", &def); + ppc_find_by_name("750", &def); + // ppc_find_by_name("740", &def); + // ppc_find_by_name("G3", &def); + // ppc_find_by_name("604r", &def); + // ppc_find_by_name("604e", &def); + // ppc_find_by_name("604", &def); + if (def == NULL) { + cpu_abort(env, "Unable to find PowerPC CPU definition\n"); + } + cpu_ppc_register(env, def); + + /* Set time-base frequency to 100 Mhz */ + cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); + + env->osi_call = vga_osi_call; + /* allocate RAM */ cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); @@ -381,31 +412,6 @@ static void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, initrd_base = 0; initrd_size = 0; } - /* Register CPU as a 74x/75x */ - /* XXX: CPU model (or PVR) should be provided on command line */ - // ppc_find_by_name("750gx", &def); // Linux boot OK - // ppc_find_by_name("750fx", &def); // Linux boot OK - /* Linux does not boot on 750cxe (and probably other 750cx based) - * because it assumes it has 8 IBAT & DBAT pairs as it only have 4. - */ - // ppc_find_by_name("750cxe", &def); - // ppc_find_by_name("750p", &def); - // ppc_find_by_name("740p", &def); - ppc_find_by_name("750", &def); - // ppc_find_by_name("740", &def); - // ppc_find_by_name("G3", &def); - // ppc_find_by_name("604r", &def); - // ppc_find_by_name("604e", &def); - // ppc_find_by_name("604", &def); - if (def == NULL) { - cpu_abort(cpu_single_env, "Unable to find PowerPC CPU definition\n"); - } - cpu_ppc_register(cpu_single_env, def); - - /* Set time-base frequency to 100 Mhz */ - cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL); - - cpu_single_env->osi_call = vga_osi_call; if (is_heathrow) { isa_mem_base = 0x80000000; diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c index 017457df2d..2e401e2a6c 100644 --- a/hw/ppc_prep.c +++ b/hw/ppc_prep.c @@ -99,9 +99,9 @@ static uint32_t speaker_ioport_read(void *opaque, uint32_t addr) static void pic_irq_request(void *opaque, int level) { if (level) - cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); + cpu_interrupt(first_cpu, CPU_INTERRUPT_HARD); else - cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); + cpu_reset_interrupt(first_cpu, CPU_INTERRUPT_HARD); } /* PCI intack register */ @@ -294,7 +294,7 @@ static void PREP_io_800_writeb (void *opaque, uint32_t addr, uint32_t val) /* Special port 92 */ /* Check soft reset asked */ if (val & 0x01) { - // cpu_interrupt(cpu_single_env, CPU_INTERRUPT_RESET); + // cpu_interrupt(first_cpu, CPU_INTERRUPT_RESET); } /* Check LE mode */ if (val & 0x02) { @@ -331,7 +331,7 @@ static void PREP_io_800_writeb (void *opaque, uint32_t addr, uint32_t val) break; case 0x0814: /* L2 invalidate register */ - // tlb_flush(cpu_single_env, 1); + // tlb_flush(first_cpu, 1); break; case 0x081C: /* system control register */ @@ -523,6 +523,7 @@ static void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename) { + CPUState *env; char buf[1024]; m48t59_t *nvram; int PPC_io_memory; @@ -537,6 +538,23 @@ static void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device, return; linux_boot = (kernel_filename != NULL); + + /* init CPUs */ + + env = cpu_init(); + register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); + + /* Register CPU as a 604 */ + /* XXX: CPU model (or PVR) should be provided on command line */ + // ppc_find_by_name("604r", &def); + // ppc_find_by_name("604e", &def); + ppc_find_by_name("604", &def); + if (def == NULL) { + cpu_abort(env, "Unable to find PowerPC CPU definition\n"); + } + cpu_ppc_register(env, def); + /* Set time-base frequency to 100 Mhz */ + cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); /* allocate RAM */ cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); @@ -584,18 +602,6 @@ static void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device, initrd_size = 0; } - /* Register CPU as a 604 */ - /* XXX: CPU model (or PVR) should be provided on command line */ - // ppc_find_by_name("604r", &def); - // ppc_find_by_name("604e", &def); - ppc_find_by_name("604", &def); - if (def == NULL) { - cpu_abort(cpu_single_env, "Unable to find PowerPC CPU definition\n"); - } - cpu_ppc_register(cpu_single_env, def); - /* Set time-base frequency to 100 Mhz */ - cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL); - isa_mem_base = 0xc0000000; pci_bus = pci_prep_init(); // pci_bus = i440fx_init(); @@ -609,7 +615,7 @@ static void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device, vga_ram_size, 0, 0); rtc_init(0x70, 8); // openpic = openpic_init(0x00000000, 0xF0000000, 1); - isa_pic = pic_init(pic_irq_request, cpu_single_env); + isa_pic = pic_init(pic_irq_request, first_cpu); // pit = pit_init(0x40, 0); serial_init(0x3f8, 4, serial_hds[0]); diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c index 8a5db5c3cd..9780785a47 100644 --- a/hw/slavio_intctl.c +++ b/hw/slavio_intctl.c @@ -213,6 +213,7 @@ static const uint32_t intbit_to_level[32] = { static void slavio_check_interrupts(void *opaque) { + CPUState *env; SLAVIO_INTCTLState *s = opaque; uint32_t pending = s->intregm_pending; unsigned int i, max = 0; @@ -226,16 +227,17 @@ static void slavio_check_interrupts(void *opaque) max = intbit_to_level[i]; } } - if (cpu_single_env->interrupt_index == 0) { + env = first_cpu; + if (env->interrupt_index == 0) { DPRINTF("Triggered pil %d\n", max); #ifdef DEBUG_IRQ_COUNT s->irq_count[max]++; #endif - cpu_single_env->interrupt_index = TT_EXTINT | max; - cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); + env->interrupt_index = TT_EXTINT | max; + cpu_interrupt(env, CPU_INTERRUPT_HARD); } else - DPRINTF("Not triggered (pending %x), pending exception %x\n", pending, cpu_single_env->interrupt_index); + DPRINTF("Not triggered (pending %x), pending exception %x\n", pending, env->interrupt_index); } else DPRINTF("Not triggered (pending %x), disabled %x\n", pending, s->intregm_disabled); diff --git a/hw/sun4m.c b/hw/sun4m.c index 7174c23cb5..3ac0886a40 100644 --- a/hw/sun4m.c +++ b/hw/sun4m.c @@ -210,12 +210,19 @@ void qemu_system_powerdown(void) slavio_set_power_fail(slavio_misc, 1); } +static void main_cpu_reset(void *opaque) +{ + CPUState *env = opaque; + cpu_reset(env); +} + /* Sun4m hardware initialisation */ static void sun4m_init(int ram_size, int vga_ram_size, int boot_device, DisplayState *ds, const char **fd_filename, int snapshot, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename) { + CPUState *env; char buf[1024]; int ret, linux_boot; unsigned int i; @@ -223,6 +230,10 @@ static void sun4m_init(int ram_size, int vga_ram_size, int boot_device, linux_boot = (kernel_filename != NULL); + env = cpu_init(); + register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); + qemu_register_reset(main_cpu_reset, env); + /* allocate RAM */ cpu_register_physical_memory(0, ram_size, 0); diff --git a/hw/sun4u.c b/hw/sun4u.c index 40d70a9ca2..51db1f9bda 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -235,6 +235,12 @@ void qemu_system_powerdown(void) { } +static void main_cpu_reset(void *opaque) +{ + CPUState *env = opaque; + cpu_reset(env); +} + static const int ide_iobase[2] = { 0x1f0, 0x170 }; static const int ide_iobase2[2] = { 0x3f6, 0x376 }; static const int ide_irq[2] = { 14, 15 }; @@ -253,6 +259,7 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename) { + CPUState *env; char buf[1024]; m48t59_t *nvram; int ret, linux_boot; @@ -262,6 +269,10 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, linux_boot = (kernel_filename != NULL); + env = cpu_init(); + register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); + qemu_register_reset(main_cpu_reset, env); + /* allocate RAM */ cpu_register_physical_memory(0, ram_size, 0); diff --git a/linux-user/main.c b/linux-user/main.c index 468cb9b89f..1ae4656d3a 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -997,8 +997,6 @@ void usage(void) /* XXX: currently only used for async signals (see signal.c) */ CPUState *global_env; -/* used only if single thread */ -CPUState *cpu_single_env = NULL; /* used to free thread contexts */ TaskState *first_task_state; @@ -1228,10 +1226,10 @@ int main(int argc, char **argv) // ppc_find_by_name("604e", &def); // ppc_find_by_name("604", &def); if (def == NULL) { - cpu_abort(cpu_single_env, + cpu_abort(env, "Unable to find PowerPC CPU definition\n"); } - cpu_ppc_register(cpu_single_env, def); + cpu_ppc_register(env, def); for (i = 0; i < 32; i++) { if (i != 12 && i != 6 && i != 13) diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index eaf5cb64e0..030b2f78ad 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -942,7 +942,7 @@ void do_interrupt(int intno) #endif #if !defined(CONFIG_USER_ONLY) if (env->tl == MAXTL) { - cpu_abort(cpu_single_env, "Trap 0x%04x while trap level is MAXTL, Error state", env->exception_index); + cpu_abort(env, "Trap 0x%04x while trap level is MAXTL, Error state", env->exception_index); return; } #endif @@ -996,7 +996,7 @@ void do_interrupt(int intno) #endif #if !defined(CONFIG_USER_ONLY) if (env->psret == 0) { - cpu_abort(cpu_single_env, "Trap 0x%02x while interrupts disabled, Error state", env->exception_index); + cpu_abort(env, "Trap 0x%02x while interrupts disabled, Error state", env->exception_index); return; } #endif diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 6340e15225..8a8620fcf2 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -2672,11 +2672,10 @@ CPUSPARCState *cpu_sparc_init(void) { CPUSPARCState *env; - cpu_exec_init(); - - if (!(env = malloc(sizeof(CPUSPARCState)))) - return (NULL); - cpu_single_env = env; + env = qemu_mallocz(sizeof(CPUSPARCState)); + if (!env) + return NULL; + cpu_exec_init(env); cpu_reset(env); return (env); } diff --git a/tests/qruncom.c b/tests/qruncom.c index fcc069f6d0..92b28ea68a 100644 --- a/tests/qruncom.c +++ b/tests/qruncom.c @@ -15,8 +15,6 @@ //#define SIGTEST -CPUState *cpu_single_env = NULL; - void cpu_outb(CPUState *env, int addr, int val) { fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val); |